tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_GCC_ARM/startup_MK64F12.S

   1 /* K64F startup ARM GCC
   2  * Purpose: startup file for Cortex-M4 devices. Should use with
   3  *   GCC for ARM Embedded Processors
   4  * Version: V1.2
   5  * Date: 15 Nov 2011
   6  *
   7  * Copyright (c) 2011, ARM Limited
   8  * All rights reserved.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are met:
  12     * Redistributions of source code must retain the above copyright
  13       notice, this list of conditions and the following disclaimer.
  14     * Redistributions in binary form must reproduce the above copyright
  15       notice, this list of conditions and the following disclaimer in the
  16       documentation and/or other materials provided with the distribution.
  17     * Neither the name of the ARM Limited nor the
  18       names of its contributors may be used to endorse or promote products
  19       derived from this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24  * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
  25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32     .syntax unified
  33     .arch armv7-m
  34
  35 /* Memory Model
  36    The HEAP starts at the end of the DATA section and grows upward.
  37
  38    The STACK starts at the end of the RAM and grows downward.
  39
  40    The HEAP and stack STACK are only checked at compile time:
  41    (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
  42
  43    This is just a check for the bare minimum for the Heap+Stack area before
  44    aborting compilation, it is not the run time limit:
  45    Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
  46  */
  47     .section .stack
  48     .align 3
  49 #ifdef __STACK_SIZE
  50     .equ    Stack_Size, __STACK_SIZE
  51 #else
  52     .equ    Stack_Size, 0xC00
  53 #endif
  54     .globl    __StackTop
  55     .globl    __StackLimit
  56 __StackLimit:
  57     .space    Stack_Size
  58     .size __StackLimit, . - __StackLimit
  59 __StackTop:
  60     .size __StackTop, . - __StackTop
  61
  62     .section .heap
  63     .align 3
  64 #ifdef __HEAP_SIZE
  65     .equ    Heap_Size, __HEAP_SIZE
  66 #else
  67     .equ    Heap_Size, 0x400
  68 #endif
  69     .globl    __HeapBase
  70     .globl    __HeapLimit
  71 __HeapBase:
  72     .space    Heap_Size
  73     .size __HeapBase, . - __HeapBase
  74 __HeapLimit:
  75     .size __HeapLimit, . - __HeapLimit
  76
  77     .section .vector_table,"a",%progbits
  78     .align 2
  79     .globl __isr_vector
  80 __isr_vector:
  81     .long   __StackTop                  /* Top of Stack */
  82     .long   Reset_Handler               /* Reset Handler */
  83     .long   NMI_Handler                 /* NMI Handler                  */
  84     .long   HardFault_Handler           /* Hard Fault Handler           */
  85     .long   MemManage_Handler           /* MPU Fault Handler            */
  86     .long   BusFault_Handler            /* Bus Fault Handler            */
  87     .long   UsageFault_Handler          /* Usage Fault Handler          */
  88     .long   0                           /* Reserved                     */
  89     .long   0                           /* Reserved                     */
  90     .long   0                           /* Reserved                     */
  91     .long   0                           /* Reserved                     */
  92     .long   SVC_Handler                 /* SVCall Handler               */
  93     .long   DebugMon_Handler            /* Debug Monitor Handler        */
  94     .long   0                           /* Reserved                     */
  95     .long   PendSV_Handler              /* PendSV Handler               */
  96     .long   SysTick_Handler             /* SysTick Handler              */
  97
  98     /* External Interrupts */
  99     .long   DMA0_IRQHandler  /* DMA Channel 0 Transfer Complete */
 100     .long   DMA1_IRQHandler  /* DMA Channel 1 Transfer Complete */
 101     .long   DMA2_IRQHandler  /* DMA Channel 2 Transfer Complete */
 102     .long   DMA3_IRQHandler  /* DMA Channel 3 Transfer Complete */
 103     .long   DMA4_IRQHandler  /* DMA Channel 4 Transfer Complete */
 104     .long   DMA5_IRQHandler  /* DMA Channel 5 Transfer Complete */
 105     .long   DMA6_IRQHandler  /* DMA Channel 6 Transfer Complete */
 106     .long   DMA7_IRQHandler  /* DMA Channel 7 Transfer Complete */
 107     .long   DMA8_IRQHandler  /* DMA Channel 8 Transfer Complete */
 108     .long   DMA9_IRQHandler  /* DMA Channel 9 Transfer Complete */
 109     .long   DMA10_IRQHandler  /* DMA Channel 10 Transfer Complete */
 110     .long   DMA11_IRQHandler  /* DMA Channel 11 Transfer Complete */
 111     .long   DMA12_IRQHandler  /* DMA Channel 12 Transfer Complete */
 112     .long   DMA13_IRQHandler  /* DMA Channel 13 Transfer Complete */
 113     .long   DMA14_IRQHandler  /* DMA Channel 14 Transfer Complete */
 114     .long   DMA15_IRQHandler  /* DMA Channel 15 Transfer Complete */
 115     .long   DMA_Error_IRQHandler  /* DMA Error Interrupt */
 116     .long   MCM_IRQHandler  /* Normal Interrupt */
 117     .long   FTFE_IRQHandler  /* FTFE Command complete interrupt */
 118     .long   Read_Collision_IRQHandler  /* Read Collision Interrupt */
 119     .long   LVD_LVW_IRQHandler  /* Low Voltage Detect, Low Voltage Warning */
 120     .long   LLW_IRQHandler  /* Low Leakage Wakeup */
 121     .long   Watchdog_IRQHandler  /* WDOG Interrupt */
 122     .long   RNG_IRQHandler  /* RNG Interrupt */
 123     .long   I2C0_IRQHandler  /* I2C0 interrupt */
 124     .long   I2C1_IRQHandler  /* I2C1 interrupt */
 125     .long   SPI0_IRQHandler  /* SPI0 Interrupt */
 126     .long   SPI1_IRQHandler  /* SPI1 Interrupt */
 127     .long   I2S0_Tx_IRQHandler  /* I2S0 transmit interrupt */
 128     .long   I2S0_Rx_IRQHandler  /* I2S0 receive interrupt */
 129     .long   UART0_LON_IRQHandler  /* UART0 LON interrupt */
 130     .long   UART0_RX_TX_IRQHandler  /* UART0 Receive/Transmit interrupt */
 131     .long   UART0_ERR_IRQHandler  /* UART0 Error interrupt */
 132     .long   UART1_RX_TX_IRQHandler  /* UART1 Receive/Transmit interrupt */
 133     .long   UART1_ERR_IRQHandler  /* UART1 Error interrupt */
 134     .long   UART2_RX_TX_IRQHandler  /* UART2 Receive/Transmit interrupt */
 135     .long   UART2_ERR_IRQHandler  /* UART2 Error interrupt */
 136     .long   UART3_RX_TX_IRQHandler  /* UART3 Receive/Transmit interrupt */
 137     .long   UART3_ERR_IRQHandler  /* UART3 Error interrupt */
 138     .long   ADC0_IRQHandler  /* ADC0 interrupt */
 139     .long   CMP0_IRQHandler  /* CMP0 interrupt */
 140     .long   CMP1_IRQHandler  /* CMP1 interrupt */
 141     .long   FTM0_IRQHandler  /* FTM0 fault, overflow and channels interrupt */
 142     .long   FTM1_IRQHandler  /* FTM1 fault, overflow and channels interrupt */
 143     .long   FTM2_IRQHandler  /* FTM2 fault, overflow and channels interrupt */
 144     .long   CMT_IRQHandler  /* CMT interrupt */
 145     .long   RTC_IRQHandler  /* RTC interrupt */
 146     .long   RTC_Seconds_IRQHandler  /* RTC seconds interrupt */
 147     .long   PIT0_IRQHandler  /* PIT timer channel 0 interrupt */
 148     .long   PIT1_IRQHandler  /* PIT timer channel 1 interrupt */
 149     .long   PIT2_IRQHandler  /* PIT timer channel 2 interrupt */
 150     .long   PIT3_IRQHandler  /* PIT timer channel 3 interrupt */
 151     .long   PDB0_IRQHandler  /* PDB0 Interrupt */
 152     .long   USB0_IRQHandler  /* USB0 interrupt */
 153     .long   USBDCD_IRQHandler  /* USBDCD Interrupt */
 154     .long   Reserved71_IRQHandler  /* Reserved interrupt 71 */
 155     .long   DAC0_IRQHandler  /* DAC0 interrupt */
 156     .long   MCG_IRQHandler  /* MCG Interrupt */
 157     .long   LPTimer_IRQHandler  /* LPTimer interrupt */
 158     .long   PORTA_IRQHandler  /* Port A interrupt */
 159     .long   PORTB_IRQHandler  /* Port B interrupt */
 160     .long   PORTC_IRQHandler  /* Port C interrupt */
 161     .long   PORTD_IRQHandler  /* Port D interrupt */
 162     .long   PORTE_IRQHandler  /* Port E interrupt */
 163     .long   SWI_IRQHandler  /* Software interrupt */
 164     .long   SPI2_IRQHandler  /* SPI2 Interrupt */
 165     .long   UART4_RX_TX_IRQHandler  /* UART4 Receive/Transmit interrupt */
 166     .long   UART4_ERR_IRQHandler  /* UART4 Error interrupt */
 167     .long   UART5_RX_TX_IRQHandler  /* UART5 Receive/Transmit interrupt */
 168     .long   UART5_ERR_IRQHandler  /* UART5 Error interrupt */
 169     .long   CMP2_IRQHandler  /* CMP2 interrupt */
 170     .long   FTM3_IRQHandler  /* FTM3 fault, overflow and channels interrupt */
 171     .long   DAC1_IRQHandler  /* DAC1 interrupt */
 172     .long   ADC1_IRQHandler  /* ADC1 interrupt */
 173     .long   I2C2_IRQHandler  /* I2C2 interrupt */
 174     .long   CAN0_ORed_Message_buffer_IRQHandler  /* CAN0 OR'd message buffers interrupt */
 175     .long   CAN0_Bus_Off_IRQHandler  /* CAN0 bus off interrupt */
 176     .long   CAN0_Error_IRQHandler  /* CAN0 error interrupt */
 177     .long   CAN0_Tx_Warning_IRQHandler  /* CAN0 Tx warning interrupt */
 178     .long   CAN0_Rx_Warning_IRQHandler  /* CAN0 Rx warning interrupt */
 179     .long   CAN0_Wake_Up_IRQHandler  /* CAN0 wake up interrupt */
 180     .long   SDHC_IRQHandler  /* SDHC interrupt */
 181     .long   ENET_1588_Timer_IRQHandler  /* Ethernet MAC IEEE 1588 Timer Interrupt */
 182     .long   ENET_Transmit_IRQHandler  /* Ethernet MAC Transmit Interrupt */
 183     .long   ENET_Receive_IRQHandler  /* Ethernet MAC Receive Interrupt */
 184     .long   ENET_Error_IRQHandler  /* Ethernet MAC Error and miscelaneous Interrupt */
 185
 186     .size    __isr_vector, . - __isr_vector
 187
 188     .section .text.Reset_Handler
 189     .thumb
 190     .thumb_func
 191     .align  2
 192     .globl   Reset_Handler
 193     .type    Reset_Handler, %function
 194 Reset_Handler:
 195 /*     Loop to copy data from read only memory to RAM. The ranges
 196  *      of copy from/to are specified by following symbols evaluated in
 197  *      linker script.
 198  *      __etext: End of code section, i.e., begin of data sections to copy from.
 199  *      __data_start__/__data_end__: RAM address range that data should be
 200  *      copied to. Both must be aligned to 4 bytes boundary.  */
 201
 202 disable_watchdog:
 203     /* unlock */
 204     ldr r1, =0x4005200e
 205     ldr r0, =0xc520
 206     strh r0, [r1]
 207     ldr r0, =0xd928
 208     strh r0, [r1]
 209     /* disable */
 210     ldr r1, =0x40052000
 211     ldr r0, =0x01d2
 212     strh r0, [r1]
 213
 214     ldr    r1, =__etext
 215     ldr    r2, =__data_start__
 216     ldr    r3, =__data_end__
 217
 218     subs   r3, r2
 219     ble    .Lflash_to_ram_loop_end
 220
 221     movs    r4, 0
 222 .Lflash_to_ram_loop:
 223     ldr    r0, [r1,r4]
 224     str    r0, [r2,r4]
 225     adds   r4, 4
 226     cmp    r4, r3
 227     blt    .Lflash_to_ram_loop
 228 .Lflash_to_ram_loop_end:
 229
 230     ldr   r0, =SystemInit
 231     blx   r0
 232     ldr   r0, =_start
 233     bx    r0
 234     .pool
 235     .size Reset_Handler, . - Reset_Handler
 236
 237     .text
 238 /*    Macro to define default handlers. Default handler
 239  *    will be weak symbol and just dead loops. They can be
 240  *    overwritten by other handlers */
 241     .macro    def_default_handler    handler_name
 242     .align 1
 243     .thumb_func
 244     .weak    \handler_name
 245     .type    \handler_name, %function
 246 \handler_name :
 247     b    .
 248     .size    \handler_name, . - \handler_name
 249     .endm
 250
 251 /* Exception Handlers */
 252
 253     def_default_handler    NMI_Handler
 254     def_default_handler    HardFault_Handler
 255     def_default_handler    MemManage_Handler
 256     def_default_handler    BusFault_Handler
 257     def_default_handler    UsageFault_Handler
 258     def_default_handler    SVC_Handler
 259     def_default_handler    DebugMon_Handler
 260     def_default_handler    PendSV_Handler
 261     def_default_handler    SysTick_Handler
 262     def_default_handler    Default_Handler
 263
 264     .macro    def_irq_default_handler    handler_name
 265     .weak     \handler_name
 266     .set      \handler_name, Default_Handler
 267     .endm
 268
 269 /* IRQ Handlers */
 270     def_irq_default_handler     DMA0_IRQHandler
 271     def_irq_default_handler     DMA1_IRQHandler
 272     def_irq_default_handler     DMA2_IRQHandler
 273     def_irq_default_handler     DMA3_IRQHandler
 274     def_irq_default_handler     DMA4_IRQHandler
 275     def_irq_default_handler     DMA5_IRQHandler
 276     def_irq_default_handler     DMA6_IRQHandler
 277     def_irq_default_handler     DMA7_IRQHandler
 278     def_irq_default_handler     DMA8_IRQHandler
 279     def_irq_default_handler     DMA9_IRQHandler
 280     def_irq_default_handler     DMA10_IRQHandler
 281     def_irq_default_handler     DMA11_IRQHandler
 282     def_irq_default_handler     DMA12_IRQHandler
 283     def_irq_default_handler     DMA13_IRQHandler
 284     def_irq_default_handler     DMA14_IRQHandler
 285     def_irq_default_handler     DMA15_IRQHandler
 286     def_irq_default_handler     DMA_Error_IRQHandler
 287     def_irq_default_handler     MCM_IRQHandler
 288     def_irq_default_handler     FTFE_IRQHandler
 289     def_irq_default_handler     Read_Collision_IRQHandler
 290     def_irq_default_handler     LVD_LVW_IRQHandler
 291     def_irq_default_handler     LLW_IRQHandler
 292     def_irq_default_handler     Watchdog_IRQHandler
 293     def_irq_default_handler     RNG_IRQHandler
 294     def_irq_default_handler     I2C0_IRQHandler
 295     def_irq_default_handler     I2C1_IRQHandler
 296     def_irq_default_handler     SPI0_IRQHandler
 297     def_irq_default_handler     SPI1_IRQHandler
 298     def_irq_default_handler     I2S0_Tx_IRQHandler
 299     def_irq_default_handler     I2S0_Rx_IRQHandler
 300     def_irq_default_handler     UART0_LON_IRQHandler
 301     def_irq_default_handler     UART0_RX_TX_IRQHandler
 302     def_irq_default_handler     UART0_ERR_IRQHandler
 303     def_irq_default_handler     UART1_RX_TX_IRQHandler
 304     def_irq_default_handler     UART1_ERR_IRQHandler
 305     def_irq_default_handler     UART2_RX_TX_IRQHandler
 306     def_irq_default_handler     UART2_ERR_IRQHandler
 307     def_irq_default_handler     UART3_RX_TX_IRQHandler
 308     def_irq_default_handler     UART3_ERR_IRQHandler
 309     def_irq_default_handler     ADC0_IRQHandler
 310     def_irq_default_handler     CMP0_IRQHandler
 311     def_irq_default_handler     CMP1_IRQHandler
 312     def_irq_default_handler     FTM0_IRQHandler
 313     def_irq_default_handler     FTM1_IRQHandler
 314     def_irq_default_handler     FTM2_IRQHandler
 315     def_irq_default_handler     CMT_IRQHandler
 316     def_irq_default_handler     RTC_IRQHandler
 317     def_irq_default_handler     RTC_Seconds_IRQHandler
 318     def_irq_default_handler     PIT0_IRQHandler
 319     def_irq_default_handler     PIT1_IRQHandler
 320     def_irq_default_handler     PIT2_IRQHandler
 321     def_irq_default_handler     PIT3_IRQHandler
 322     def_irq_default_handler     PDB0_IRQHandler
 323     def_irq_default_handler     USB0_IRQHandler
 324     def_irq_default_handler     USBDCD_IRQHandler
 325     def_irq_default_handler     Reserved71_IRQHandler
 326     def_irq_default_handler     DAC0_IRQHandler
 327     def_irq_default_handler     MCG_IRQHandler
 328     def_irq_default_handler     LPTimer_IRQHandler
 329     def_irq_default_handler     PORTA_IRQHandler
 330     def_irq_default_handler     PORTB_IRQHandler
 331     def_irq_default_handler     PORTC_IRQHandler
 332     def_irq_default_handler     PORTD_IRQHandler
 333     def_irq_default_handler     PORTE_IRQHandler
 334     def_irq_default_handler     SWI_IRQHandler
 335     def_irq_default_handler     SPI2_IRQHandler
 336     def_irq_default_handler     UART4_RX_TX_IRQHandler
 337     def_irq_default_handler     UART4_ERR_IRQHandler
 338     def_irq_default_handler     UART5_RX_TX_IRQHandler
 339     def_irq_default_handler     UART5_ERR_IRQHandler
 340     def_irq_default_handler     CMP2_IRQHandler
 341     def_irq_default_handler     FTM3_IRQHandler
 342     def_irq_default_handler     DAC1_IRQHandler
 343     def_irq_default_handler     ADC1_IRQHandler
 344     def_irq_default_handler     I2C2_IRQHandler
 345     def_irq_default_handler     CAN0_ORed_Message_buffer_IRQHandler
 346     def_irq_default_handler     CAN0_Bus_Off_IRQHandler
 347     def_irq_default_handler     CAN0_Error_IRQHandler
 348     def_irq_default_handler     CAN0_Tx_Warning_IRQHandler
 349     def_irq_default_handler     CAN0_Rx_Warning_IRQHandler
 350     def_irq_default_handler     CAN0_Wake_Up_IRQHandler
 351     def_irq_default_handler     SDHC_IRQHandler
 352     def_irq_default_handler     ENET_1588_Timer_IRQHandler
 353     def_irq_default_handler     ENET_Transmit_IRQHandler
 354     def_irq_default_handler     ENET_Receive_IRQHandler
 355     def_irq_default_handler     ENET_Error_IRQHandler
 356     def_irq_default_handler     DefaultISR
 357
 358 /* Flash protection region, placed at 0x400 */
 359     .text
 360     .thumb
 361     .align 2
 362     .section .kinetis_flash_config_field,"a",%progbits
 363 kinetis_flash_config:
 364     .long 0xffffffff
 365     .long 0xffffffff
 366     .long 0xffffffff
 367     .long 0xfffffdfe
 368
 369     .end