1 ; mbed Microcontroller Library
2 ; Copyright (c) 2013 Nordic Semiconductor.
3 ;Licensed under the Apache License, Version 2.0 (the "License");
4 ;you may not use this file except in compliance with the License.
5 ;You may obtain a copy of the License at
6 ;http://www.apache.org/licenses/LICENSE-2.0
7 ;Unless required by applicable law or agreed to in writing, software
8 ;distributed under the License is distributed on an "AS IS" BASIS,
9 ;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 ;See the License for the specific language governing permissions and
11 ;limitations under the License.
15 __initial_sp EQU 0x20008000
21 ; Vector Table Mapped to Address 0 at Reset
23 AREA RESET, DATA, READONLY
28 __Vectors DCD __initial_sp ; Top of Stack
29 DCD Reset_Handler ; Reset Handler
30 DCD NMI_Handler ; NMI Handler
31 DCD HardFault_Handler ; Hard Fault Handler
39 DCD SVC_Handler ; SVCall Handler
42 DCD PendSV_Handler ; PendSV Handler
43 DCD SysTick_Handler ; SysTick Handler
46 DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
47 DCD RADIO_IRQHandler ;RADIO
48 DCD UART0_IRQHandler ;UART0
49 DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
50 DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
52 DCD GPIOTE_IRQHandler ;GPIOTE
53 DCD ADC_IRQHandler ;ADC
54 DCD TIMER0_IRQHandler ;TIMER0
55 DCD TIMER1_IRQHandler ;TIMER1
56 DCD TIMER2_IRQHandler ;TIMER2
57 DCD RTC0_IRQHandler ;RTC0
58 DCD TEMP_IRQHandler ;TEMP
59 DCD RNG_IRQHandler ;RNG
60 DCD ECB_IRQHandler ;ECB
61 DCD CCM_AAR_IRQHandler ;CCM_AAR
62 DCD WDT_IRQHandler ;WDT
63 DCD RTC1_IRQHandler ;RTC1
64 DCD QDEC_IRQHandler ;QDEC
65 DCD LPCOMP_IRQHandler ;LPCOMP
66 DCD SWI0_IRQHandler ;SWI0
67 DCD SWI1_IRQHandler ;SWI1
68 DCD SWI2_IRQHandler ;SWI2
69 DCD SWI3_IRQHandler ;SWI3
70 DCD SWI4_IRQHandler ;SWI4
71 DCD SWI5_IRQHandler ;SWI5
82 __Vectors_Size EQU __Vectors_End - __Vectors
84 AREA |.text|, CODE, READONLY
88 NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
89 NRF_POWER_RAMONB_ADDRESS EQU 0x40000554 ; NRF_POWER->RAMONB address
90 NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
93 EXPORT Reset_Handler [WEAK]
97 MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
99 LDR R0, =NRF_POWER_RAMON_ADDRESS
104 LDR R0, =NRF_POWER_RAMONB_ADDRESS
115 ; Dummy Exception Handlers (infinite loops which can be modified)
118 EXPORT NMI_Handler [WEAK]
123 EXPORT HardFault_Handler [WEAK]
127 EXPORT SVC_Handler [WEAK]
131 EXPORT PendSV_Handler [WEAK]
135 EXPORT SysTick_Handler [WEAK]
141 EXPORT POWER_CLOCK_IRQHandler [WEAK]
142 EXPORT RADIO_IRQHandler [WEAK]
143 EXPORT UART0_IRQHandler [WEAK]
144 EXPORT SPI0_TWI0_IRQHandler [WEAK]
145 EXPORT SPI1_TWI1_IRQHandler [WEAK]
146 EXPORT GPIOTE_IRQHandler [WEAK]
147 EXPORT ADC_IRQHandler [WEAK]
148 EXPORT TIMER0_IRQHandler [WEAK]
149 EXPORT TIMER1_IRQHandler [WEAK]
150 EXPORT TIMER2_IRQHandler [WEAK]
151 EXPORT RTC0_IRQHandler [WEAK]
152 EXPORT TEMP_IRQHandler [WEAK]
153 EXPORT RNG_IRQHandler [WEAK]
154 EXPORT ECB_IRQHandler [WEAK]
155 EXPORT CCM_AAR_IRQHandler [WEAK]
156 EXPORT WDT_IRQHandler [WEAK]
157 EXPORT RTC1_IRQHandler [WEAK]
158 EXPORT QDEC_IRQHandler [WEAK]
159 EXPORT LPCOMP_IRQHandler [WEAK]
160 EXPORT SWI0_IRQHandler [WEAK]
161 EXPORT SWI1_IRQHandler [WEAK]
162 EXPORT SWI2_IRQHandler [WEAK]
163 EXPORT SWI3_IRQHandler [WEAK]
164 EXPORT SWI4_IRQHandler [WEAK]
165 EXPORT SWI5_IRQHandler [WEAK]
166 POWER_CLOCK_IRQHandler