tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/TOOLCHAIN_GCC_CR/LPC1549.ld

   1 /*Based on following file*/
   2 /*
   3  * GENERATED FILE - DO NOT EDIT
   4  * (c) Code Red Technologies Ltd, 2008-13
   5  * (c) NXP Semiconductors 2013-2014
   6  * Generated linker script file for LPC1549
   7  * Created from generic_c.ld (LPCXpresso v7.2 (0 [Build 153] [2014-05-19] ))
   8  * By LPCXpresso v7.2.0 [Build 153] [2014-05-19]  on Tue Jun 10 00:20:53 JST 2014
   9  */
  10
  11 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
  12
  13 MEMORY
  14 {
  15   /* Define each memory region */
  16   MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes */
  17   Ram0_16 (rwx) : ORIGIN = 0x2000000+0x100, LENGTH = 0x4000-0x100 /* 16K bytes */
  18   Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes */
  19   Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes */
  20
  21 }
  22   /* Define a symbol for the top of each memory region */
  23   __top_MFlash256 = 0x0 + 0x40000;
  24   __top_Ram0_16 = 0x2000000 + 0x4000;
  25   __top_Ram1_16 = 0x2004000 + 0x4000;
  26   __top_Ram2_4 = 0x2008000 + 0x1000;
  27
  28 ENTRY(ResetISR)
  29
  30 SECTIONS
  31 {
  32
  33     /* MAIN TEXT SECTION */
  34     .text : ALIGN(4)
  35     {
  36         FILL(0xff)
  37         KEEP(*(.isr_vector))
  38
  39         /* Global Section Table */
  40         . = ALIGN(4) ;
  41         __section_table_start = .;
  42         __data_section_table = .;
  43         LONG(LOADADDR(.data));
  44         LONG(    ADDR(.data));
  45         LONG(  SIZEOF(.data));
  46         LONG(LOADADDR(.data_RAM2));
  47         LONG(    ADDR(.data_RAM2));
  48         LONG(  SIZEOF(.data_RAM2));
  49         LONG(LOADADDR(.data_RAM3));
  50         LONG(    ADDR(.data_RAM3));
  51         LONG(  SIZEOF(.data_RAM3));
  52         __data_section_table_end = .;
  53         __bss_section_table = .;
  54         LONG(    ADDR(.bss));
  55         LONG(  SIZEOF(.bss));
  56         LONG(    ADDR(.bss_RAM2));
  57         LONG(  SIZEOF(.bss_RAM2));
  58         LONG(    ADDR(.bss_RAM3));
  59         LONG(  SIZEOF(.bss_RAM3));
  60         __bss_section_table_end = .;
  61         __section_table_end = . ;
  62         /* End of Global Section Table */
  63
  64
  65         *(.after_vectors*)
  66
  67         *(.text*)
  68         *(.rodata .rodata.*)
  69         . = ALIGN(4);
  70
  71         /* C++ constructors etc */
  72         . = ALIGN(4);
  73         KEEP(*(.init))
  74
  75         . = ALIGN(4);
  76         __preinit_array_start = .;
  77         KEEP (*(.preinit_array))
  78         __preinit_array_end = .;
  79
  80         . = ALIGN(4);
  81         __init_array_start = .;
  82         KEEP (*(SORT(.init_array.*)))
  83         KEEP (*(.init_array))
  84         __init_array_end = .;
  85
  86         KEEP(*(.fini));
  87
  88         . = ALIGN(0x4);
  89         KEEP (*crtbegin.o(.ctors))
  90         KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
  91         KEEP (*(SORT(.ctors.*)))
  92         KEEP (*crtend.o(.ctors))
  93
  94         . = ALIGN(0x4);
  95         KEEP (*crtbegin.o(.dtors))
  96         KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
  97         KEEP (*(SORT(.dtors.*)))
  98         KEEP (*crtend.o(.dtors))
  99     } > MFlash256
 100
 101     /*
 102      * for exception handling/unwind - some Newlib functions (in common
 103      * with C++ and STDC++) use this.
 104      */
 105     .ARM.extab : ALIGN(4)
 106     {
 107         *(.ARM.extab* .gnu.linkonce.armextab.*)
 108     } > MFlash256
 109     __exidx_start = .;
 110
 111     .ARM.exidx : ALIGN(4)
 112     {
 113         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
 114     } > MFlash256
 115     __exidx_end = .;
 116
 117     _etext = .;
 118
 119     /* DATA section for Ram1_16 */
 120     .data_RAM2 : ALIGN(4)
 121     {
 122        FILL(0xff)
 123        *(.ramfunc.$RAM2)
 124        *(.ramfunc.$Ram1_16)
 125         *(.data.$RAM2*)
 126         *(.data.$Ram1_16*)
 127        . = ALIGN(4) ;
 128     } > Ram1_16 AT>MFlash256
 129
 130     /* DATA section for Ram2_4 */
 131     .data_RAM3 : ALIGN(4)
 132     {
 133        FILL(0xff)
 134        *(.ramfunc.$RAM3)
 135        *(.ramfunc.$Ram2_4)
 136         *(.data.$RAM3*)
 137         *(.data.$Ram2_4*)
 138        . = ALIGN(4) ;
 139     } > Ram2_4 AT>MFlash256
 140
 141     /* MAIN DATA SECTION */
 142     .uninit_RESERVED : ALIGN(4)
 143     {
 144         KEEP(*(.bss.$RESERVED*))
 145         . = ALIGN(4) ;
 146         _end_uninit_RESERVED = .;
 147     } > Ram0_16
 148
 149         /* Main DATA section (Ram0_16) */
 150         .data : ALIGN(4)
 151         {
 152            FILL(0xff)
 153            _data = . ;
 154            *(vtable)
 155            *(.ramfunc*)
 156            *(.data*)
 157            . = ALIGN(4) ;
 158            _edata = . ;
 159         } > Ram0_16 AT>MFlash256
 160
 161     /* BSS section for Ram1_16 */
 162     .bss_RAM2 : ALIGN(4)
 163     {
 164         *(.bss.$RAM2*)
 165         *(.bss.$Ram1_16*)
 166        . = ALIGN(4) ;
 167     } > Ram1_16
 168     /* BSS section for Ram2_4 */
 169     .bss_RAM3 : ALIGN(4)
 170     {
 171         *(.bss.$RAM3*)
 172         *(.bss.$Ram2_4*)
 173        . = ALIGN(4) ;
 174     } > Ram2_4
 175
 176     /* MAIN BSS SECTION */
 177     .bss : ALIGN(4)
 178     {
 179         _bss = .;
 180         *(.bss*)
 181         *(COMMON)
 182         . = ALIGN(4) ;
 183         _ebss = .;
 184         PROVIDE(end = .);
 185         __end__ = .;
 186     } > Ram0_16
 187
 188     /* NOINIT section for Ram1_16 */
 189     .noinit_RAM2 (NOLOAD) : ALIGN(4)
 190     {
 191         *(.noinit.$RAM2*)
 192         *(.noinit.$Ram1_16*)
 193        . = ALIGN(4) ;
 194     } > Ram1_16
 195     /* NOINIT section for Ram2_4 */
 196     .noinit_RAM3 (NOLOAD) : ALIGN(4)
 197     {
 198         *(.noinit.$RAM3*)
 199         *(.noinit.$Ram2_4*)
 200        . = ALIGN(4) ;
 201     } > Ram2_4
 202
 203     /* DEFAULT NOINIT SECTION */
 204     .noinit (NOLOAD): ALIGN(4)
 205     {
 206         _noinit = .;
 207         *(.noinit*)
 208          . = ALIGN(4) ;
 209         _end_noinit = .;
 210     } > Ram0_16
 211
 212     PROVIDE(_pvHeapStart = .);
 213     PROVIDE(_vStackTop = __top_Ram0_16 - 0);
 214 }