tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_cortex.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f0xx_hal_cortex.c
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    11-December-2014
   7   * @brief   CORTEX HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the CORTEX:
  10   *           + Initialization and de-initialization functions
  11   *           + Peripheral Control functions
  12   *
  13   *  @verbatim
  14   ==============================================================================
  15                         ##### How to use this driver #####
  16   ==============================================================================
  17
  18     [..]
  19     *** How to configure Interrupts using CORTEX HAL driver ***
  20     ===========================================================
  21     [..]
  22     This section provides functions allowing to configure the NVIC interrupts (IRQ).
  23     The Cortex-M0 exceptions are managed by CMSIS functions.
  24       (#) Enable and Configure the priority of the selected IRQ Channels.
  25              The priority can be 0..3.
  26
  27         -@- Lower priority values gives higher priority.
  28         -@- Priority Order:
  29             (#@) Lowest priority.
  30             (#@) Lowest hardware priority (IRQn position).
  31
  32       (#)  Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
  33
  34       (#)  Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
  35
  36
  37     [..]
  38     *** How to configure Systick using CORTEX HAL driver ***
  39     ========================================================
  40     [..]
  41     Setup SysTick Timer for time base
  42
  43    (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
  44        is a CMSIS function that:
  45         (++) Configures the SysTick Reload register with value passed as function parameter.
  46         (++) Configures the SysTick IRQ priority to the lowest value (0x03).
  47         (++) Resets the SysTick Counter register.
  48         (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
  49         (++) Enables the SysTick Interrupt.
  50         (++) Starts the SysTick Counter.
  51
  52    (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
  53        __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
  54        HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
  55        inside the stm32f0xx_hal_cortex.h file.
  56
  57    (+) You can change the SysTick IRQ priority by calling the
  58        HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
  59        call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
  60
  61    (+) To adjust the SysTick time base, use the following formula:
  62
  63        Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
  64        (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
  65        (++) Reload Value should not exceed 0xFFFFFF
  66
  67   @endverbatim
  68   ******************************************************************************
  69   * @attention
  70   *
  71   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  72   *
  73   * Redistribution and use in source and binary forms, with or without modification,
  74   * are permitted provided that the following conditions are met:
  75   *   1. Redistributions of source code must retain the above copyright notice,
  76   *      this list of conditions and the following disclaimer.
  77   *   2. Redistributions in binary form must reproduce the above copyright notice,
  78   *      this list of conditions and the following disclaimer in the documentation
  79   *      and/or other materials provided with the distribution.
  80   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  81   *      may be used to endorse or promote products derived from this software
  82   *      without specific prior written permission.
  83   *
  84   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  85   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  86   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  87   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  88   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  89   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  90   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  91   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  92   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  93   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  94   *
  95   ******************************************************************************
  96   */
  97
  98 /* Includes ------------------------------------------------------------------*/
  99 #include "stm32f0xx_hal.h"
 100
 101 /** @addtogroup STM32F0xx_HAL_Driver
 102   * @{
 103   */
 104
 105 /** @defgroup CORTEX CORTEX HAL module driver
 106   * @brief CORTEX CORTEX HAL module driver
 107   * @{
 108   */
 109
 110 #ifdef HAL_CORTEX_MODULE_ENABLED
 111
 112 /* Private typedef -----------------------------------------------------------*/
 113 /* Private define ------------------------------------------------------------*/
 114 /* Private macro -------------------------------------------------------------*/
 115 /* Private variables ---------------------------------------------------------*/
 116 /* Private function prototypes -----------------------------------------------*/
 117 /* Exported functions ---------------------------------------------------------*/
 118
 119 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
 120   * @{
 121   */
 122
 123
 124 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
 125  *  @brief    Initialization and Configuration functions
 126  *
 127 @verbatim
 128   ==============================================================================
 129               ##### Initialization and de-initialization functions #####
 130   ==============================================================================
 131     [..]
 132       This section provides the CORTEX HAL driver functions allowing to configure Interrupts
 133       Systick functionalities
 134
 135 @endverbatim
 136   * @{
 137   */
 138
 139 /**
 140   * @brief  Sets the priority of an interrupt.
 141   * @param  IRQn: External interrupt number .
 142   *         This parameter can be an enumerator of IRQn_Type enumeration
 143   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
 144   * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
 145   *         This parameter can be a value between 0 and 3.
 146   *         A lower priority value indicates a higher priority
 147   * @param  SubPriority: The subpriority level for the IRQ channel.
 148   *         with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
 149   *         no subpriority supported in Cortex M0 based products.
 150   * @retval None
 151   */
 152 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 153 {
 154   /* Check the parameters */
 155   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
 156   NVIC_SetPriority(IRQn,PreemptPriority);
 157 }
 158
 159 /**
 160   * @brief  Enables a device specific interrupt in the NVIC interrupt controller.
 161   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
 162   *         function should be called before.
 163   * @param  IRQn External interrupt number
 164   *         This parameter can be an enumerator of IRQn_Type enumeration
 165   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 166   * @retval None
 167   */
 168 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
 169 {
 170   /* Enable interrupt */
 171   NVIC_EnableIRQ(IRQn);
 172 }
 173
 174 /**
 175   * @brief  Disables a device specific interrupt in the NVIC interrupt controller.
 176   * @param  IRQn External interrupt number
 177   *         This parameter can be an enumerator of IRQn_Type enumeration
 178   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 179   * @retval None
 180   */
 181 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
 182 {
 183   /* Disable interrupt */
 184   NVIC_DisableIRQ(IRQn);
 185 }
 186
 187 /**
 188   * @brief  Initiates a system reset request to reset the MCU.
 189   * @retval None
 190   */
 191 void HAL_NVIC_SystemReset(void)
 192 {
 193   /* System Reset */
 194   NVIC_SystemReset();
 195 }
 196
 197 /**
 198   * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
 199   *         Counter is in free running mode to generate periodic interrupts.
 200   * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
 201   * @retval status:  - 0  Function succeeded.
 202   *                  - 1  Function failed.
 203   */
 204 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 205 {
 206    return SysTick_Config(TicksNumb);
 207 }
 208 /**
 209   * @}
 210   */
 211
 212 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
 213  *  @brief   Cortex control functions
 214  *
 215 @verbatim
 216   ==============================================================================
 217                       ##### Peripheral Control functions #####
 218   ==============================================================================
 219     [..]
 220       This subsection provides a set of functions allowing to control the CORTEX
 221       (NVIC, SYSTICK) functionalities.
 222
 223
 224 @endverbatim
 225   * @{
 226   */
 227
 228
 229 /**
 230   * @brief  Gets the priority of an interrupt.
 231   * @param  IRQn: External interrupt number
 232   *         This parameter can be an enumerator of IRQn_Type enumeration
 233   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 234   * @retval None
 235   */
 236 uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn)
 237 {
 238   /* Get priority for Cortex-M system or device specific interrupts */
 239   return NVIC_GetPriority(IRQn);
 240 }
 241
 242 /**
 243   * @brief  Sets Pending bit of an external interrupt.
 244   * @param  IRQn External interrupt number
 245   *         This parameter can be an enumerator of IRQn_Type enumeration
 246   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 247   * @retval None
 248   */
 249 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
 250 {
 251   /* Set interrupt pending */
 252   NVIC_SetPendingIRQ(IRQn);
 253 }
 254
 255 /**
 256   * @brief  Gets Pending Interrupt (reads the pending register in the NVIC
 257   *         and returns the pending bit for the specified interrupt).
 258   * @param  IRQn External interrupt number
 259   *         This parameter can be an enumerator of IRQn_Type enumeration
 260   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 261   * @retval status: - 0  Interrupt status is not pending.
 262   *                 - 1  Interrupt status is pending.
 263   */
 264 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
 265 {
 266   /* Return 1 if pending else 0 */
 267   return NVIC_GetPendingIRQ(IRQn);
 268 }
 269
 270 /**
 271   * @brief  Clears the pending bit of an external interrupt.
 272   * @param  IRQn External interrupt number
 273   *         This parameter can be an enumerator of IRQn_Type enumeration
 274   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
 275   * @retval None
 276   */
 277 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 278 {
 279   /* Clear pending interrupt */
 280   NVIC_ClearPendingIRQ(IRQn);
 281 }
 282
 283 /**
 284   * @brief  Configures the SysTick clock source.
 285   * @param  CLKSource: specifies the SysTick clock source.
 286   *         This parameter can be one of the following values:
 287   *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
 288   *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
 289   * @retval None
 290   */
 291 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
 292 {
 293   /* Check the parameters */
 294   assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
 295   if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
 296   {
 297     SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
 298   }
 299   else
 300   {
 301     SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
 302   }
 303 }
 304
 305 /**
 306   * @brief  This function handles SYSTICK interrupt request.
 307   * @retval None
 308   */
 309 void HAL_SYSTICK_IRQHandler(void)
 310 {
 311   HAL_SYSTICK_Callback();
 312 }
 313
 314 /**
 315   * @brief  SYSTICK callback.
 316   * @retval None
 317   */
 318 __weak void HAL_SYSTICK_Callback(void)
 319 {
 320   /* NOTE : This function Should not be modified, when the callback is needed,
 321             the HAL_SYSTICK_Callback could be implemented in the user file
 322    */
 323 }
 324
 325 /**
 326   * @}
 327   */
 328
 329 /**
 330   * @}
 331   */
 332
 333 #endif /* HAL_CORTEX_MODULE_ENABLED */
 334 /**
 335   * @}
 336   */
 337
 338 /**
 339   * @}
 340   */
 341
 342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/