tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_tsc.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f0xx_hal_tsc.h
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    11-December-2014
   7   * @brief   This file contains all the functions prototypes for the TSC firmware
   8   *          library.
   9   ******************************************************************************
  10   * @attention
  11   *
  12   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  13   *
  14   * Redistribution and use in source and binary forms, with or without modification,
  15   * are permitted provided that the following conditions are met:
  16   *   1. Redistributions of source code must retain the above copyright notice,
  17   *      this list of conditions and the following disclaimer.
  18   *   2. Redistributions in binary form must reproduce the above copyright notice,
  19   *      this list of conditions and the following disclaimer in the documentation
  20   *      and/or other materials provided with the distribution.
  21   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  22   *      may be used to endorse or promote products derived from this software
  23   *      without specific prior written permission.
  24   *
  25   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  29   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  31   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  32   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35   *
  36   ******************************************************************************
  37   */
  38
  39 /* Define to prevent recursive inclusion -------------------------------------*/
  40 #ifndef __STM32F0xx_TSC_H
  41 #define __STM32F0xx_TSC_H
  42
  43 #ifdef __cplusplus
  44  extern "C" {
  45 #endif
  46
  47 #if defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || \
  48     defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) ||                         \
  49     defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx)
  50
  51 /* Includes ------------------------------------------------------------------*/
  52 #include "stm32f0xx_hal_def.h"
  53
  54 /** @addtogroup STM32F0xx_HAL_Driver
  55   * @{
  56   */
  57
  58 /** @addtogroup TSC
  59   * @{
  60   */
  61
  62 /* Exported types ------------------------------------------------------------*/
  63
  64 /** @defgroup TSC_Exported_Types TSC Exported Types
  65   * @{
  66   */
  67 /**
  68   * @brief TSC state structure definition
  69   */
  70 typedef enum
  71 {
  72   HAL_TSC_STATE_RESET  = 0x00, /*!< TSC registers have their reset value */
  73   HAL_TSC_STATE_READY  = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */
  74   HAL_TSC_STATE_BUSY   = 0x02, /*!< TSC initialization or acquisition is on-going */
  75   HAL_TSC_STATE_ERROR  = 0x03  /*!< Acquisition is completed with max count error */
  76 } HAL_TSC_StateTypeDef;
  77
  78 /**
  79   * @brief TSC group status structure definition
  80   */
  81 typedef enum
  82 {
  83   TSC_GROUP_ONGOING   = 0x00, /*!< Acquisition on group is on-going or not started */
  84   TSC_GROUP_COMPLETED = 0x01  /*!< Acquisition on group is completed with success (no max count error) */
  85 } TSC_GroupStatusTypeDef;
  86
  87 /**
  88   * @brief TSC init structure definition
  89   */
  90 typedef struct
  91 {
  92   uint32_t CTPulseHighLength;       /*!< Charge-transfer high pulse length */
  93   uint32_t CTPulseLowLength;        /*!< Charge-transfer low pulse length */
  94   uint32_t SpreadSpectrum;          /*!< Spread spectrum activation */
  95   uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */
  96   uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */
  97   uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */
  98   uint32_t MaxCountValue;           /*!< Max count value */
  99   uint32_t IODefaultMode;           /*!< IO default mode */
 100   uint32_t SynchroPinPolarity;      /*!< Synchro pin polarity */
 101   uint32_t AcquisitionMode;         /*!< Acquisition mode */
 102   uint32_t MaxCountInterrupt;       /*!< Max count interrupt activation */
 103   uint32_t ChannelIOs;              /*!< Channel IOs mask */
 104   uint32_t ShieldIOs;               /*!< Shield IOs mask */
 105   uint32_t SamplingIOs;             /*!< Sampling IOs mask */
 106 } TSC_InitTypeDef;
 107
 108 /**
 109   * @brief TSC IOs configuration structure definition
 110   */
 111 typedef struct
 112 {
 113   uint32_t ChannelIOs;  /*!< Channel IOs mask */
 114   uint32_t ShieldIOs;   /*!< Shield IOs mask */
 115   uint32_t SamplingIOs; /*!< Sampling IOs mask */
 116 } TSC_IOConfigTypeDef;
 117
 118 /**
 119   * @brief  TSC handle Structure definition
 120   */
 121 typedef struct
 122 {
 123   TSC_TypeDef               *Instance; /*!< Register base address */
 124   TSC_InitTypeDef           Init;      /*!< Initialization parameters */
 125   __IO HAL_TSC_StateTypeDef State;     /*!< Peripheral state */
 126   HAL_LockTypeDef           Lock;      /*!< Lock feature */
 127 } TSC_HandleTypeDef;
 128
 129 /**
 130   * @}
 131   */
 132
 133 /* Exported constants --------------------------------------------------------*/
 134
 135 /** @defgroup TSC_Exported_Constants TSC Exported Constants
 136   * @{
 137   */
 138
 139 /** @defgroup TSC_CTPH_Cycles TSC Charge Transfer Pulse High
 140   * @{
 141   */
 142 #define TSC_CTPH_1CYCLE   ((uint32_t)((uint32_t) 0 << 28))
 143 #define TSC_CTPH_2CYCLES  ((uint32_t)((uint32_t) 1 << 28))
 144 #define TSC_CTPH_3CYCLES  ((uint32_t)((uint32_t) 2 << 28))
 145 #define TSC_CTPH_4CYCLES  ((uint32_t)((uint32_t) 3 << 28))
 146 #define TSC_CTPH_5CYCLES  ((uint32_t)((uint32_t) 4 << 28))
 147 #define TSC_CTPH_6CYCLES  ((uint32_t)((uint32_t) 5 << 28))
 148 #define TSC_CTPH_7CYCLES  ((uint32_t)((uint32_t) 6 << 28))
 149 #define TSC_CTPH_8CYCLES  ((uint32_t)((uint32_t) 7 << 28))
 150 #define TSC_CTPH_9CYCLES  ((uint32_t)((uint32_t) 8 << 28))
 151 #define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28))
 152 #define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28))
 153 #define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28))
 154 #define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28))
 155 #define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28))
 156 #define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28))
 157 #define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28))
 158 #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
 159                           ((VAL) == TSC_CTPH_2CYCLES) || \
 160                           ((VAL) == TSC_CTPH_3CYCLES) || \
 161                           ((VAL) == TSC_CTPH_4CYCLES) || \
 162                           ((VAL) == TSC_CTPH_5CYCLES) || \
 163                           ((VAL) == TSC_CTPH_6CYCLES) || \
 164                           ((VAL) == TSC_CTPH_7CYCLES) || \
 165                           ((VAL) == TSC_CTPH_8CYCLES) || \
 166                           ((VAL) == TSC_CTPH_9CYCLES) || \
 167                           ((VAL) == TSC_CTPH_10CYCLES) || \
 168                           ((VAL) == TSC_CTPH_11CYCLES) || \
 169                           ((VAL) == TSC_CTPH_12CYCLES) || \
 170                           ((VAL) == TSC_CTPH_13CYCLES) || \
 171                           ((VAL) == TSC_CTPH_14CYCLES) || \
 172                           ((VAL) == TSC_CTPH_15CYCLES) || \
 173                           ((VAL) == TSC_CTPH_16CYCLES))
 174 /**
 175   * @}
 176   */
 177
 178 /** @defgroup TSC_CTPL_Cycles TSC Charge Transfer Pulse Low
 179   * @{
 180   */
 181 #define TSC_CTPL_1CYCLE   ((uint32_t)((uint32_t) 0 << 24))
 182 #define TSC_CTPL_2CYCLES  ((uint32_t)((uint32_t) 1 << 24))
 183 #define TSC_CTPL_3CYCLES  ((uint32_t)((uint32_t) 2 << 24))
 184 #define TSC_CTPL_4CYCLES  ((uint32_t)((uint32_t) 3 << 24))
 185 #define TSC_CTPL_5CYCLES  ((uint32_t)((uint32_t) 4 << 24))
 186 #define TSC_CTPL_6CYCLES  ((uint32_t)((uint32_t) 5 << 24))
 187 #define TSC_CTPL_7CYCLES  ((uint32_t)((uint32_t) 6 << 24))
 188 #define TSC_CTPL_8CYCLES  ((uint32_t)((uint32_t) 7 << 24))
 189 #define TSC_CTPL_9CYCLES  ((uint32_t)((uint32_t) 8 << 24))
 190 #define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24))
 191 #define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24))
 192 #define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24))
 193 #define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24))
 194 #define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24))
 195 #define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24))
 196 #define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24))
 197 #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
 198                           ((VAL) == TSC_CTPL_2CYCLES) || \
 199                           ((VAL) == TSC_CTPL_3CYCLES) || \
 200                           ((VAL) == TSC_CTPL_4CYCLES) || \
 201                           ((VAL) == TSC_CTPL_5CYCLES) || \
 202                           ((VAL) == TSC_CTPL_6CYCLES) || \
 203                           ((VAL) == TSC_CTPL_7CYCLES) || \
 204                           ((VAL) == TSC_CTPL_8CYCLES) || \
 205                           ((VAL) == TSC_CTPL_9CYCLES) || \
 206                           ((VAL) == TSC_CTPL_10CYCLES) || \
 207                           ((VAL) == TSC_CTPL_11CYCLES) || \
 208                           ((VAL) == TSC_CTPL_12CYCLES) || \
 209                           ((VAL) == TSC_CTPL_13CYCLES) || \
 210                           ((VAL) == TSC_CTPL_14CYCLES) || \
 211                           ((VAL) == TSC_CTPL_15CYCLES) || \
 212                           ((VAL) == TSC_CTPL_16CYCLES))
 213 /**
 214   * @}
 215   */
 216
 217 /** @defgroup TSC_SS_Prescaler_definition TSC Spread spectrum prescaler definition
 218   * @{
 219   */
 220 #define TSC_SS_PRESC_DIV1 ((uint32_t)0)
 221 #define TSC_SS_PRESC_DIV2  (TSC_CR_SSPSC)
 222 #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
 223
 224 /**
 225   * @}
 226   */
 227
 228 /** @defgroup TSC_PG_Prescaler_definition TSC Pulse Generator prescaler definition
 229   * @{
 230   */
 231 #define TSC_PG_PRESC_DIV1   ((uint32_t)(0 << 12))
 232 #define TSC_PG_PRESC_DIV2   ((uint32_t)(1 << 12))
 233 #define TSC_PG_PRESC_DIV4   ((uint32_t)(2 << 12))
 234 #define TSC_PG_PRESC_DIV8   ((uint32_t)(3 << 12))
 235 #define TSC_PG_PRESC_DIV16  ((uint32_t)(4 << 12))
 236 #define TSC_PG_PRESC_DIV32  ((uint32_t)(5 << 12))
 237 #define TSC_PG_PRESC_DIV64  ((uint32_t)(6 << 12))
 238 #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12))
 239 #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
 240                               ((VAL) == TSC_PG_PRESC_DIV2) || \
 241                               ((VAL) == TSC_PG_PRESC_DIV4) || \
 242                               ((VAL) == TSC_PG_PRESC_DIV8) || \
 243                               ((VAL) == TSC_PG_PRESC_DIV16) || \
 244                               ((VAL) == TSC_PG_PRESC_DIV32) || \
 245                               ((VAL) == TSC_PG_PRESC_DIV64) || \
 246                               ((VAL) == TSC_PG_PRESC_DIV128))
 247 /**
 248   * @}
 249   */
 250
 251 /** @defgroup TSC_MCV_definition TSC Max Count Value definition
 252   * @{
 253   */
 254 #define TSC_MCV_255   ((uint32_t)(0 << 5))
 255 #define TSC_MCV_511   ((uint32_t)(1 << 5))
 256 #define TSC_MCV_1023  ((uint32_t)(2 << 5))
 257 #define TSC_MCV_2047  ((uint32_t)(3 << 5))
 258 #define TSC_MCV_4095  ((uint32_t)(4 << 5))
 259 #define TSC_MCV_8191  ((uint32_t)(5 << 5))
 260 #define TSC_MCV_16383 ((uint32_t)(6 << 5))
 261 #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
 262                          ((VAL) == TSC_MCV_511) || \
 263                          ((VAL) == TSC_MCV_1023) || \
 264                          ((VAL) == TSC_MCV_2047) || \
 265                          ((VAL) == TSC_MCV_4095) || \
 266                          ((VAL) == TSC_MCV_8191) || \
 267                          ((VAL) == TSC_MCV_16383))
 268 /**
 269   * @}
 270   */
 271
 272 /** @defgroup TSC_IO_default_mode_definition TSC I/O default mode definition
 273   * @{
 274   */
 275 #define TSC_IODEF_OUT_PP_LOW ((uint32_t)0)
 276 #define TSC_IODEF_IN_FLOAT   (TSC_CR_IODEF)
 277 #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
 278 /**
 279   * @}
 280   */
 281
 282 /** @defgroup TSC_Synchronization_pin_polarity TSC Synchronization pin polarity
 283   * @{
 284   */
 285 #define TSC_SYNC_POL_FALL      ((uint32_t)0)
 286 #define TSC_SYNC_POL_RISE_HIGH (TSC_CR_SYNCPOL)
 287 #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POL_FALL) || ((VAL) == TSC_SYNC_POL_RISE_HIGH))
 288 /**
 289   * @}
 290   */
 291
 292 /** @defgroup TSC_Acquisition_mode TSC Acquisition mode
 293   * @{
 294   */
 295 #define TSC_ACQ_MODE_NORMAL  ((uint32_t)0)
 296 #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
 297 #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
 298 /**
 299   * @}
 300   */
 301
 302 /** @defgroup TSC_IO_mode_definition TSC I/O mode definition
 303   * @{
 304   */
 305 #define TSC_IOMODE_UNUSED   ((uint32_t)0)
 306 #define TSC_IOMODE_CHANNEL  ((uint32_t)1)
 307 #define TSC_IOMODE_SHIELD   ((uint32_t)2)
 308 #define TSC_IOMODE_SAMPLING ((uint32_t)3)
 309 #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
 310                             ((VAL) == TSC_IOMODE_CHANNEL) || \
 311                             ((VAL) == TSC_IOMODE_SHIELD) || \
 312                             ((VAL) == TSC_IOMODE_SAMPLING))
 313 /**
 314   * @}
 315   */
 316
 317 /** @defgroup TSC_interrupts_definition TSC interrupts definition
 318   * @{
 319   */
 320 #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)
 321 #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)
 322 #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
 323 /**
 324   * @}
 325   */
 326
 327 /** @defgroup TSC_flags_definition TSC Flags Definition
 328   * @{
 329   */
 330 #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
 331 #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
 332 /**
 333   * @}
 334   */
 335
 336 /** @defgroup TSC_groups_definition TSC groups definition
 337   * @{
 338   */
 339 #define TSC_NB_OF_GROUPS (8)
 340
 341 #define TSC_GROUP1 ((uint32_t)0x00000001)
 342 #define TSC_GROUP2 ((uint32_t)0x00000002)
 343 #define TSC_GROUP3 ((uint32_t)0x00000004)
 344 #define TSC_GROUP4 ((uint32_t)0x00000008)
 345 #define TSC_GROUP5 ((uint32_t)0x00000010)
 346 #define TSC_GROUP6 ((uint32_t)0x00000020)
 347 #define TSC_GROUP7 ((uint32_t)0x00000040)
 348 #define TSC_GROUP8 ((uint32_t)0x00000080)
 349 #define TSC_ALL_GROUPS ((uint32_t)0x000000FF)
 350
 351 #define TSC_GROUP1_IDX ((uint32_t)0)
 352 #define TSC_GROUP2_IDX ((uint32_t)1)
 353 #define TSC_GROUP3_IDX ((uint32_t)2)
 354 #define TSC_GROUP4_IDX ((uint32_t)3)
 355 #define TSC_GROUP5_IDX ((uint32_t)4)
 356 #define TSC_GROUP6_IDX ((uint32_t)5)
 357 #define TSC_GROUP7_IDX ((uint32_t)6)
 358 #define TSC_GROUP8_IDX ((uint32_t)7)
 359 #define IS_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS)))
 360
 361 #define TSC_GROUP1_IO1 ((uint32_t)0x00000001)
 362 #define TSC_GROUP1_IO2 ((uint32_t)0x00000002)
 363 #define TSC_GROUP1_IO3 ((uint32_t)0x00000004)
 364 #define TSC_GROUP1_IO4 ((uint32_t)0x00000008)
 365 #define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F)
 366
 367 #define TSC_GROUP2_IO1 ((uint32_t)0x00000010)
 368 #define TSC_GROUP2_IO2 ((uint32_t)0x00000020)
 369 #define TSC_GROUP2_IO3 ((uint32_t)0x00000040)
 370 #define TSC_GROUP2_IO4 ((uint32_t)0x00000080)
 371 #define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0)
 372
 373 #define TSC_GROUP3_IO1 ((uint32_t)0x00000100)
 374 #define TSC_GROUP3_IO2 ((uint32_t)0x00000200)
 375 #define TSC_GROUP3_IO3 ((uint32_t)0x00000400)
 376 #define TSC_GROUP3_IO4 ((uint32_t)0x00000800)
 377 #define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00)
 378
 379 #define TSC_GROUP4_IO1 ((uint32_t)0x00001000)
 380 #define TSC_GROUP4_IO2 ((uint32_t)0x00002000)
 381 #define TSC_GROUP4_IO3 ((uint32_t)0x00004000)
 382 #define TSC_GROUP4_IO4 ((uint32_t)0x00008000)
 383 #define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000)
 384
 385 #define TSC_GROUP5_IO1 ((uint32_t)0x00010000)
 386 #define TSC_GROUP5_IO2 ((uint32_t)0x00020000)
 387 #define TSC_GROUP5_IO3 ((uint32_t)0x00040000)
 388 #define TSC_GROUP5_IO4 ((uint32_t)0x00080000)
 389 #define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000)
 390
 391 #define TSC_GROUP6_IO1 ((uint32_t)0x00100000)
 392 #define TSC_GROUP6_IO2 ((uint32_t)0x00200000)
 393 #define TSC_GROUP6_IO3 ((uint32_t)0x00400000)
 394 #define TSC_GROUP6_IO4 ((uint32_t)0x00800000)
 395 #define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000)
 396
 397 #define TSC_GROUP7_IO1 ((uint32_t)0x01000000)
 398 #define TSC_GROUP7_IO2 ((uint32_t)0x02000000)
 399 #define TSC_GROUP7_IO3 ((uint32_t)0x04000000)
 400 #define TSC_GROUP7_IO4 ((uint32_t)0x08000000)
 401 #define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000)
 402
 403 #define TSC_GROUP8_IO1 ((uint32_t)0x10000000)
 404 #define TSC_GROUP8_IO2 ((uint32_t)0x20000000)
 405 #define TSC_GROUP8_IO3 ((uint32_t)0x40000000)
 406 #define TSC_GROUP8_IO4 ((uint32_t)0x80000000)
 407 #define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000)
 408
 409 #define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF)
 410 /**
 411   * @}
 412   */
 413
 414 /**
 415   * @}
 416   */
 417
 418 /* Private macros -----------------------------------------------------------*/
 419 /** @defgroup TSC_Private_Macros TSC Private Macros
 420  * @{
 421  */
 422 /** @defgroup TSC_Spread_Spectrum  TSC Spread Spectrum
 423   * @{
 424   */
 425 #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
 426
 427 #define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128)))
 428 /**
 429   * @}
 430   */
 431
 432 /**
 433   * @}
 434   */
 435
 436 /* Exported macros -----------------------------------------------------------*/
 437 /** @defgroup TSC_Exported_Macros TSC Exported Macros
 438  * @{
 439  */
 440
 441 /** @brief  Reset TSC handle state
 442   * @param  __HANDLE__: TSC handle.
 443   * @retval None
 444   */
 445 #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
 446
 447 /**
 448   * @brief Enable the TSC peripheral.
 449   * @param  __HANDLE__: TSC handle
 450   * @retval None
 451   */
 452 #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
 453
 454 /**
 455   * @brief Disable the TSC peripheral.
 456   * @param  __HANDLE__: TSC handle
 457   * @retval None
 458   */
 459 #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
 460
 461 /**
 462   * @brief Start acquisition
 463   * @param  __HANDLE__: TSC handle
 464   * @retval None
 465   */
 466 #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
 467
 468 /**
 469   * @brief Stop acquisition
 470   * @param  __HANDLE__: TSC handle
 471   * @retval None
 472   */
 473 #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
 474
 475 /**
 476   * @brief Set IO default mode to output push-pull low
 477   * @param  __HANDLE__: TSC handle
 478   * @retval None
 479   */
 480 #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
 481
 482 /**
 483   * @brief Set IO default mode to input floating
 484   * @param  __HANDLE__: TSC handle
 485   * @retval None
 486   */
 487 #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
 488
 489 /**
 490   * @brief Set synchronization polarity to falling edge
 491   * @param  __HANDLE__: TSC handle
 492   * @retval None
 493   */
 494 #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
 495
 496 /**
 497   * @brief Set synchronization polarity to rising edge and high level
 498   * @param  __HANDLE__: TSC handle
 499   * @retval None
 500   */
 501 #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
 502
 503 /**
 504   * @brief Enable TSC interrupt.
 505   * @param  __HANDLE__: TSC handle
 506   * @param  __INTERRUPT__: TSC interrupt
 507   * @retval None
 508   */
 509 #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
 510
 511 /**
 512   * @brief Disable TSC interrupt.
 513   * @param  __HANDLE__: TSC handle
 514   * @param  __INTERRUPT__: TSC interrupt
 515   * @retval None
 516   */
 517 #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
 518
 519 /** @brief Check if the specified TSC interrupt source is enabled or disabled.
 520   * @param  __HANDLE__: TSC Handle
 521   * @param  __INTERRUPT__: TSC interrupt
 522   * @retval SET or RESET
 523   */
 524 #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 525
 526 /**
 527   * @brief Get the selected TSC's flag status.
 528   * @param  __HANDLE__: TSC handle
 529   * @param  __FLAG__: TSC flag
 530   * @retval SET or RESET
 531   */
 532 #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
 533
 534 /**
 535   * @brief Clear the TSC's pending flag.
 536   * @param  __HANDLE__: TSC handle
 537   * @param  __FLAG__: TSC flag
 538   * @retval None
 539   */
 540 #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
 541
 542 /**
 543   * @brief Enable schmitt trigger hysteresis on a group of IOs
 544   * @param  __HANDLE__: TSC handle
 545   * @param  __GX_IOY_MASK__: IOs mask
 546   * @retval None
 547   */
 548 #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
 549
 550 /**
 551   * @brief Disable schmitt trigger hysteresis on a group of IOs
 552   * @param  __HANDLE__: TSC handle
 553   * @param  __GX_IOY_MASK__: IOs mask
 554   * @retval None
 555   */
 556 #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
 557
 558 /**
 559   * @brief Open analog switch on a group of IOs
 560   * @param  __HANDLE__: TSC handle
 561   * @param  __GX_IOY_MASK__: IOs mask
 562   * @retval None
 563   */
 564 #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
 565
 566 /**
 567   * @brief Close analog switch on a group of IOs
 568   * @param  __HANDLE__: TSC handle
 569   * @param  __GX_IOY_MASK__: IOs mask
 570   * @retval None
 571   */
 572 #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))
 573
 574 /**
 575   * @brief Enable a group of IOs in channel mode
 576   * @param  __HANDLE__: TSC handle
 577   * @param  __GX_IOY_MASK__: IOs mask
 578   * @retval None
 579   */
 580 #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
 581
 582 /**
 583   * @brief Disable a group of channel IOs
 584   * @param  __HANDLE__: TSC handle
 585   * @param  __GX_IOY_MASK__: IOs mask
 586   * @retval None
 587   */
 588 #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
 589
 590 /**
 591   * @brief Enable a group of IOs in sampling mode
 592   * @param  __HANDLE__: TSC handle
 593   * @param  __GX_IOY_MASK__: IOs mask
 594   * @retval None
 595   */
 596 #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
 597
 598 /**
 599   * @brief Disable a group of sampling IOs
 600   * @param  __HANDLE__: TSC handle
 601   * @param  __GX_IOY_MASK__: IOs mask
 602   * @retval None
 603   */
 604 #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
 605
 606 /**
 607   * @brief Enable acquisition groups
 608   * @param  __HANDLE__: TSC handle
 609   * @param  __GX_MASK__: Groups mask
 610   * @retval None
 611   */
 612 #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))
 613
 614 /**
 615   * @brief Disable acquisition groups
 616   * @param  __HANDLE__: TSC handle
 617   * @param  __GX_MASK__: Groups mask
 618   * @retval None
 619   */
 620 #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
 621
 622 /** @brief Gets acquisition group status
 623   * @param  __HANDLE__: TSC Handle
 624   * @param  __GX_INDEX__: Group index
 625   * @retval SET or RESET
 626   */
 627 #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
 628 ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
 629
 630 /**
 631   * @}
 632   */
 633
 634 /* Exported functions --------------------------------------------------------*/
 635 /** @addtogroup TSC_Exported_Functions TSC Exported Functions
 636   * @{
 637   */
 638
 639 /** @addtogroup TSC_Exported_Functions_Group1 Initialization/de-initialization functions
 640  *  @brief    Initialization and Configuration functions
 641  *  @{
 642  */
 643 /* Initialization and de-initialization functions *****************************/
 644 HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
 645 HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
 646 void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
 647 void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
 648 /**
 649   * @}
 650   */
 651
 652 /** @addtogroup TSC_Exported_Functions_Group2 IO operation functions
 653  *  @brief    IO operation functions  *  @{
 654  */
 655 /* IO operation functions *****************************************************/
 656 HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
 657 HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
 658 HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
 659 HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
 660 TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
 661 uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
 662 /**
 663   * @}
 664   */
 665
 666 /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions
 667  *  @brief    Peripheral Control functions
 668  *  @{
 669  */
 670 /* Peripheral Control functions ***********************************************/
 671 HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
 672 HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
 673 /**
 674   * @}
 675   */
 676
 677 /** @addtogroup TSC_Exported_Functions_Group4 State functions
 678  *  @brief   State functions
 679  *  @{
 680  */
 681 /* Peripheral State and Error functions ***************************************/
 682 HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
 683 HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
 684 void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
 685 /**
 686   * @}
 687   */
 688
 689 /** @addtogroup TSC_Exported_Functions_Group5 Callback functions
 690  *  @brief   Callback functions
 691  *  @{
 692  */
 693 /* Callback functions *********************************************************/
 694 void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
 695 void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
 696 /**
 697   * @}
 698   */
 699
 700 /**
 701   * @}
 702   */
 703
 704 /**
 705   * @}
 706   */
 707
 708 /**
 709   * @}
 710   */
 711
 712 #endif /* defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || */
 713        /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || */
 714        /* defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx)    */
 715
 716
 717 #ifdef __cplusplus
 718 }
 719 #endif
 720
 721 #endif /*__STM32F0xx_TSC_H */
 722
 723 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 724