tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/TOOLCHAIN_GCC_ARM/startup_stm32f103xb.s

   1 /**
   2   *************** (C) COPYRIGHT 2014 STMicroelectronics ************************
   3   * @file      startup_stm32f103xb.s
   4   * @author    MCD Application Team
   5   * @version   V4.0.0
   6   * @date      16-December-2014
   7   * @brief     STM32F103xB Devices vector table for Atollic toolchain.
   8   *            This module performs:
   9   *                - Set the initial SP
  10   *                - Set the initial PC == Reset_Handler,
  11   *                - Set the vector table entries with the exceptions ISR address
  12   *                - Configure the clock system
  13   *                - Branches to main in the C library (which eventually
  14   *                  calls main()).
  15   *            After Reset the Cortex-M3 processor is in Thread mode,
  16   *            priority is Privileged, and the Stack is set to Main.
  17   ******************************************************************************
  18   *
  19   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  20   *
  21   * Redistribution and use in source and binary forms, with or without modification,
  22   * are permitted provided that the following conditions are met:
  23   *   1. Redistributions of source code must retain the above copyright notice,
  24   *      this list of conditions and the following disclaimer.
  25   *   2. Redistributions in binary form must reproduce the above copyright notice,
  26   *      this list of conditions and the following disclaimer in the documentation
  27   *      and/or other materials provided with the distribution.
  28   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  29   *      may be used to endorse or promote products derived from this software
  30   *      without specific prior written permission.
  31   *
  32   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  33   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  34   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  36   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  38   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  39   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  40   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  41   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42   *
  43   ******************************************************************************
  44   */
  45
  46   .syntax unified
  47   .cpu cortex-m3
  48   .fpu softvfp
  49   .thumb
  50
  51 .global g_pfnVectors
  52 .global Default_Handler
  53
  54 /* start address for the initialization values of the .data section.
  55 defined in linker script */
  56 .word _sidata
  57 /* start address for the .data section. defined in linker script */
  58 .word _sdata
  59 /* end address for the .data section. defined in linker script */
  60 .word _edata
  61 /* start address for the .bss section. defined in linker script */
  62 .word _sbss
  63 /* end address for the .bss section. defined in linker script */
  64 .word _ebss
  65
  66 .equ  BootRAM, 0xF108F85F
  67 /**
  68  * @brief  This is the code that gets called when the processor first
  69  *          starts execution following a reset event. Only the absolutely
  70  *          necessary set is performed, after which the application
  71  *          supplied main() routine is called.
  72  * @param  None
  73  * @retval : None
  74 */
  75
  76   .section .text.Reset_Handler
  77   .weak Reset_Handler
  78   .type Reset_Handler, %function
  79 Reset_Handler:
  80
  81 /* Copy the data segment initializers from flash to SRAM */
  82   movs r1, #0
  83   b LoopCopyDataInit
  84
  85 CopyDataInit:
  86   ldr r3, =_sidata
  87   ldr r3, [r3, r1]
  88   str r3, [r0, r1]
  89   adds r1, r1, #4
  90
  91 LoopCopyDataInit:
  92   ldr r0, =_sdata
  93   ldr r3, =_edata
  94   adds r2, r0, r1
  95   cmp r2, r3
  96   bcc CopyDataInit
  97   ldr r2, =_sbss
  98   b LoopFillZerobss
  99 /* Zero fill the bss segment. */
 100 FillZerobss:
 101   movs r3, #0
 102   str r3, [r2], #4
 103
 104 LoopFillZerobss:
 105   ldr r3, = _ebss
 106   cmp r2, r3
 107   bcc FillZerobss
 108
 109 /* Call the clock system intitialization function.*/
 110     bl  SystemInit
 111 /* Call static constructors */
 112     bl __libc_init_array
 113 /* Call the application's entry point.*/
 114   bl main
 115   bx lr
 116 .size Reset_Handler, .-Reset_Handler
 117
 118 /**
 119  * @brief  This is the code that gets called when the processor receives an
 120  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 121  *         the system state for examination by a debugger.
 122  *
 123  * @param  None
 124  * @retval : None
 125 */
 126     .section .text.Default_Handler,"ax",%progbits
 127 Default_Handler:
 128 Infinite_Loop:
 129   b Infinite_Loop
 130   .size Default_Handler, .-Default_Handler
 131 /******************************************************************************
 132 *
 133 * The minimal vector table for a Cortex M3.  Note that the proper constructs
 134 * must be placed on this to ensure that it ends up at physical address
 135 * 0x0000.0000.
 136 *
 137 ******************************************************************************/
 138   .section .isr_vector,"a",%progbits
 139   .type g_pfnVectors, %object
 140   .size g_pfnVectors, .-g_pfnVectors
 141
 142
 143 g_pfnVectors:
 144
 145   .word _estack
 146   .word Reset_Handler
 147   .word NMI_Handler
 148   .word HardFault_Handler
 149   .word MemManage_Handler
 150   .word BusFault_Handler
 151   .word UsageFault_Handler
 152   .word 0
 153   .word 0
 154   .word 0
 155   .word 0
 156   .word SVC_Handler
 157   .word DebugMon_Handler
 158   .word 0
 159   .word PendSV_Handler
 160   .word SysTick_Handler
 161   .word WWDG_IRQHandler
 162   .word PVD_IRQHandler
 163   .word TAMPER_IRQHandler
 164   .word RTC_IRQHandler
 165   .word FLASH_IRQHandler
 166   .word RCC_IRQHandler
 167   .word EXTI0_IRQHandler
 168   .word EXTI1_IRQHandler
 169   .word EXTI2_IRQHandler
 170   .word EXTI3_IRQHandler
 171   .word EXTI4_IRQHandler
 172   .word DMA1_Channel1_IRQHandler
 173   .word DMA1_Channel2_IRQHandler
 174   .word DMA1_Channel3_IRQHandler
 175   .word DMA1_Channel4_IRQHandler
 176   .word DMA1_Channel5_IRQHandler
 177   .word DMA1_Channel6_IRQHandler
 178   .word DMA1_Channel7_IRQHandler
 179   .word ADC1_2_IRQHandler
 180   .word USB_HP_CAN1_TX_IRQHandler
 181   .word USB_LP_CAN1_RX0_IRQHandler
 182   .word CAN1_RX1_IRQHandler
 183   .word CAN1_SCE_IRQHandler
 184   .word EXTI9_5_IRQHandler
 185   .word TIM1_BRK_IRQHandler
 186   .word TIM1_UP_IRQHandler
 187   .word TIM1_TRG_COM_IRQHandler
 188   .word TIM1_CC_IRQHandler
 189   .word TIM2_IRQHandler
 190   .word TIM3_IRQHandler
 191   .word TIM4_IRQHandler
 192   .word I2C1_EV_IRQHandler
 193   .word I2C1_ER_IRQHandler
 194   .word I2C2_EV_IRQHandler
 195   .word I2C2_ER_IRQHandler
 196   .word SPI1_IRQHandler
 197   .word SPI2_IRQHandler
 198   .word USART1_IRQHandler
 199   .word USART2_IRQHandler
 200   .word USART3_IRQHandler
 201   .word EXTI15_10_IRQHandler
 202   .word RTC_Alarm_IRQHandler
 203   .word USBWakeUp_IRQHandler
 204   .word 0
 205   .word 0
 206   .word 0
 207   .word 0
 208   .word 0
 209   .word 0
 210   .word 0
 211   .word BootRAM          /* @0x108. This is for boot in RAM mode for
 212                             STM32F10x Medium Density devices. */
 213
 214 /*******************************************************************************
 215 *
 216 * Provide weak aliases for each Exception handler to the Default_Handler.
 217 * As they are weak aliases, any function with the same name will override
 218 * this definition.
 219 *
 220 *******************************************************************************/
 221
 222   .weak NMI_Handler
 223   .thumb_set NMI_Handler,Default_Handler
 224
 225   .weak HardFault_Handler
 226   .thumb_set HardFault_Handler,Default_Handler
 227
 228   .weak MemManage_Handler
 229   .thumb_set MemManage_Handler,Default_Handler
 230
 231   .weak BusFault_Handler
 232   .thumb_set BusFault_Handler,Default_Handler
 233
 234   .weak UsageFault_Handler
 235   .thumb_set UsageFault_Handler,Default_Handler
 236
 237   .weak SVC_Handler
 238   .thumb_set SVC_Handler,Default_Handler
 239
 240   .weak DebugMon_Handler
 241   .thumb_set DebugMon_Handler,Default_Handler
 242
 243   .weak PendSV_Handler
 244   .thumb_set PendSV_Handler,Default_Handler
 245
 246   .weak SysTick_Handler
 247   .thumb_set SysTick_Handler,Default_Handler
 248
 249   .weak WWDG_IRQHandler
 250   .thumb_set WWDG_IRQHandler,Default_Handler
 251
 252   .weak PVD_IRQHandler
 253   .thumb_set PVD_IRQHandler,Default_Handler
 254
 255   .weak TAMPER_IRQHandler
 256   .thumb_set TAMPER_IRQHandler,Default_Handler
 257
 258   .weak RTC_IRQHandler
 259   .thumb_set RTC_IRQHandler,Default_Handler
 260
 261   .weak FLASH_IRQHandler
 262   .thumb_set FLASH_IRQHandler,Default_Handler
 263
 264   .weak RCC_IRQHandler
 265   .thumb_set RCC_IRQHandler,Default_Handler
 266
 267   .weak EXTI0_IRQHandler
 268   .thumb_set EXTI0_IRQHandler,Default_Handler
 269
 270   .weak EXTI1_IRQHandler
 271   .thumb_set EXTI1_IRQHandler,Default_Handler
 272
 273   .weak EXTI2_IRQHandler
 274   .thumb_set EXTI2_IRQHandler,Default_Handler
 275
 276   .weak EXTI3_IRQHandler
 277   .thumb_set EXTI3_IRQHandler,Default_Handler
 278
 279   .weak EXTI4_IRQHandler
 280   .thumb_set EXTI4_IRQHandler,Default_Handler
 281
 282   .weak DMA1_Channel1_IRQHandler
 283   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 284
 285   .weak DMA1_Channel2_IRQHandler
 286   .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 287
 288   .weak DMA1_Channel3_IRQHandler
 289   .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 290
 291   .weak DMA1_Channel4_IRQHandler
 292   .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 293
 294   .weak DMA1_Channel5_IRQHandler
 295   .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 296
 297   .weak DMA1_Channel6_IRQHandler
 298   .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 299
 300   .weak DMA1_Channel7_IRQHandler
 301   .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 302
 303   .weak ADC1_2_IRQHandler
 304   .thumb_set ADC1_2_IRQHandler,Default_Handler
 305
 306   .weak USB_HP_CAN1_TX_IRQHandler
 307   .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
 308
 309   .weak USB_LP_CAN1_RX0_IRQHandler
 310   .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
 311
 312   .weak CAN1_RX1_IRQHandler
 313   .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 314
 315   .weak CAN1_SCE_IRQHandler
 316   .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 317
 318   .weak EXTI9_5_IRQHandler
 319   .thumb_set EXTI9_5_IRQHandler,Default_Handler
 320
 321   .weak TIM1_BRK_IRQHandler
 322   .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 323
 324   .weak TIM1_UP_IRQHandler
 325   .thumb_set TIM1_UP_IRQHandler,Default_Handler
 326
 327   .weak TIM1_TRG_COM_IRQHandler
 328   .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 329
 330   .weak TIM1_CC_IRQHandler
 331   .thumb_set TIM1_CC_IRQHandler,Default_Handler
 332
 333   .weak TIM2_IRQHandler
 334   .thumb_set TIM2_IRQHandler,Default_Handler
 335
 336   .weak TIM3_IRQHandler
 337   .thumb_set TIM3_IRQHandler,Default_Handler
 338
 339   .weak TIM4_IRQHandler
 340   .thumb_set TIM4_IRQHandler,Default_Handler
 341
 342   .weak I2C1_EV_IRQHandler
 343   .thumb_set I2C1_EV_IRQHandler,Default_Handler
 344
 345   .weak I2C1_ER_IRQHandler
 346   .thumb_set I2C1_ER_IRQHandler,Default_Handler
 347
 348   .weak I2C2_EV_IRQHandler
 349   .thumb_set I2C2_EV_IRQHandler,Default_Handler
 350
 351   .weak I2C2_ER_IRQHandler
 352   .thumb_set I2C2_ER_IRQHandler,Default_Handler
 353
 354   .weak SPI1_IRQHandler
 355   .thumb_set SPI1_IRQHandler,Default_Handler
 356
 357   .weak SPI2_IRQHandler
 358   .thumb_set SPI2_IRQHandler,Default_Handler
 359
 360   .weak USART1_IRQHandler
 361   .thumb_set USART1_IRQHandler,Default_Handler
 362
 363   .weak USART2_IRQHandler
 364   .thumb_set USART2_IRQHandler,Default_Handler
 365
 366   .weak USART3_IRQHandler
 367   .thumb_set USART3_IRQHandler,Default_Handler
 368
 369   .weak EXTI15_10_IRQHandler
 370   .thumb_set EXTI15_10_IRQHandler,Default_Handler
 371
 372   .weak RTC_Alarm_IRQHandler
 373   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 374
 375   .weak USBWakeUp_IRQHandler
 376   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 377
 378 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 379