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1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 15-December-2014
7 * @brief Extended FLASH HAL module driver.
8 *
9 * This file provides firmware functions to manage the following
10 * functionalities of the FLASH peripheral:
11 * + Extended Initialization/de-initialization functions
12 * + Extended I/O operation functions
13 * + Extended Peripheral Control functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### Flash peripheral extended features #####
18 ==============================================================================
19
20 ##### How to use this driver #####
21 ==============================================================================
22 [..] This driver provides functions to configure and program the FLASH memory
23 of all STM32F1xxx devices. It includes
24
25 (++) Set/Reset the write protection
26 (++) Program the user Option Bytes
27 (++) Get the Read protection Level
28
29 @endverbatim
30 ******************************************************************************
31 * @attention
32 *
33 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
34 *
35 * Redistribution and use in source and binary forms, with or without modification,
36 * are permitted provided that the following conditions are met:
37 * 1. Redistributions of source code must retain the above copyright notice,
38 * this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright notice,
40 * this list of conditions and the following disclaimer in the documentation
41 * and/or other materials provided with the distribution.
42 * 3. Neither the name of STMicroelectronics nor the names of its contributors
43 * may be used to endorse or promote products derived from this software
44 * without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
53 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
54 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 *
57 ******************************************************************************
58 */
59
60 /* Includes ------------------------------------------------------------------*/
61 #include "stm32f1xx_hal.h"
62
63 /** @addtogroup STM32F1xx_HAL_Driver
64 * @{
65 */
66 #ifdef HAL_FLASH_MODULE_ENABLED
67
68 /** @addtogroup FLASH
69 * @{
70 */
71 /** @addtogroup FLASH_Private_Variables
72 * @{
73 */
74 /* Variables used for Erase pages under interruption*/
75 extern FLASH_ProcessTypeDef pFlash;
76 /**
77 * @}
78 */
79
80 /**
81 * @}
82 */
83
84 /** @defgroup FLASHEx FLASHEx
85 * @brief FLASH Extended HAL module driver
86 * @{
87 */
88
89 /* Private typedef -----------------------------------------------------------*/
90 /* Private define ------------------------------------------------------------*/
91 /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
92 * @{
93 */
94 /**
95 * @}
96 */
97
98 /* Private macro -------------------------------------------------------------*/
99 /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
100 * @{
101 */
102 /**
103 * @}
104 */
105
106 /* Private variables ---------------------------------------------------------*/
107 /* Private function prototypes -----------------------------------------------*/
108 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
109 * @{
110 */
111 /* Erase operations */
112 static void FLASH_MassErase(uint32_t Banks);
113
114 /* Option bytes control */
115 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage);
116 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage);
117 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel);
118 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig);
119 static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
120 static uint32_t FLASH_OB_GetWRP(void);
121 static FlagStatus FLASH_OB_GetRDP(void);
122 static uint8_t FLASH_OB_GetUser(void);
123
124 #if defined(STM32F101xG) || defined(STM32F103xG)
125 /* State operations */
126 static HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout);
127 #endif
128 /**
129 * @}
130 */
131
132 /* Exported functions ---------------------------------------------------------*/
133 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
134 * @{
135 */
136
137 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended Input and Output operation functions
138 * @brief I/O operation functions
139 *
140 @verbatim
141 ===============================================================================
142 ##### IO operation functions #####
143 ===============================================================================
144
145 @endverbatim
146 * @{
147 */
148
149
150 /**
151 * @brief Perform a mass erase or erase the specified FLASH memory pages
152 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
153 * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
154 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
155 * contains the configuration information for the erasing.
156 *
157 * @param[out] PageError: pointer to variable that
158 * contains the configuration information on faulty page in case of error
159 * (0xFFFFFFFF means that all the pages have been correctly erased)
160 *
161 * @retval HAL_StatusTypeDef HAL Status
162 */
163 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
164 {
165 HAL_StatusTypeDef status = HAL_ERROR;
166 uint32_t address = 0;
167
168 /* Process Locked */
169 __HAL_LOCK(&pFlash);
170
171 /* Check the parameters */
172 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
173
174 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
175 {
176 #if defined(STM32F101xG) || defined(STM32F103xG)
177 if (pEraseInit->Banks == FLASH_BANK_BOTH)
178 {
179 /* Mass Erase requested for Bank1 and Bank2 */
180 /* Wait for last operation to be completed */
181 if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
182 (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
183 {
184 /*Mass erase to be done*/
185 FLASH_MassErase(FLASH_BANK_BOTH);
186
187 /* Wait for last operation to be completed */
188 if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
189 (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
190 {
191 status = HAL_OK;
192 }
193
194 /* If the erase operation is completed, disable the MER Bit */
195 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
196 CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
197 }
198 }
199 else if (pEraseInit->Banks == FLASH_BANK_2)
200 {
201 /* Mass Erase requested for Bank2 */
202 /* Wait for last operation to be completed */
203 if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
204 {
205 /*Mass erase to be done*/
206 FLASH_MassErase(FLASH_BANK_2);
207
208 /* Wait for last operation to be completed */
209 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
210
211 /* If the erase operation is completed, disable the MER Bit */
212 CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
213 }
214 }
215 else
216 #endif /* STM32F101xG || STM32F103xG */
217 {
218 /* Mass Erase requested for Bank1 */
219 /* Wait for last operation to be completed */
220 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
221 {
222 /*Mass erase to be done*/
223 FLASH_MassErase(FLASH_BANK_1);
224
225 /* Wait for last operation to be completed */
226 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
227
228 /* If the erase operation is completed, disable the MER Bit */
229 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
230 }
231 }
232 }
233 else
234 {
235 /* Page Erase is requested */
236 /* Check the parameters */
237 assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
238 assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
239
240 #if defined(STM32F101xG) || defined(STM32F103xG)
241 /* Page Erase requested on address located on bank2 */
242 if(pEraseInit->PageAddress > FLASH_BANK1_END)
243 {
244 /* Wait for last operation to be completed */
245 if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
246 {
247 /*Initialization of PageError variable*/
248 *PageError = 0xFFFFFFFF;
249
250 /* Erase by page by page to be done*/
251 for(address = pEraseInit->PageAddress;
252 address < (pEraseInit->PageAddress + (pEraseInit->NbPages)*FLASH_PAGE_SIZE);
253 address += FLASH_PAGE_SIZE)
254 {
255 FLASH_PageErase(address);
256
257 /* Wait for last operation to be completed */
258 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
259
260 /* If the erase operation is completed, disable the PER Bit */
261 CLEAR_BIT(FLASH->CR2, FLASH_CR2_PER);
262
263 if (status != HAL_OK)
264 {
265 /* In case of error, stop erase procedure and return the faulty address */
266 *PageError = address;
267 break;
268 }
269 }
270 }
271 }
272 else
273 #endif /* STM32F101xG || STM32F103xG */
274 {
275 /* Page Erase requested on address located on bank1 */
276 /* Wait for last operation to be completed */
277 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
278 {
279 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
280 {
281 /*Mass erase to be done*/
282 FLASH_MassErase(pEraseInit->Banks);
283
284 /* Wait for last operation to be completed */
285 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
286
287 /* If the erase operation is completed, disable the MER Bit */
288 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
289 }
290 else
291 {
292 /*Initialization of PageError variable*/
293 *PageError = 0xFFFFFFFF;
294
295 /* Erase by page by page to be done*/
296 for(address = pEraseInit->PageAddress;
297 address < (pEraseInit->PageAddress + (pEraseInit->NbPages)*FLASH_PAGE_SIZE);
298 address += FLASH_PAGE_SIZE)
299 {
300 FLASH_PageErase(address);
301
302 /* Wait for last operation to be completed */
303 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
304
305 /* If the erase operation is completed, disable the PER Bit */
306 CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
307
308 if (status != HAL_OK)
309 {
310 /* In case of error, stop erase procedure and return the faulty address */
311 *PageError = address;
312 break;
313 }
314 }
315 }
316 }
317 }
318 }
319
320 /* Process Unlocked */
321 __HAL_UNLOCK(&pFlash);
322
323 return status;
324 }
325
326 /**
327 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
328 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
329 * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
330 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
331 * contains the configuration information for the erasing.
332 *
333 * @retval HAL_StatusTypeDef HAL Status
334 */
335 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
336 {
337 HAL_StatusTypeDef status = HAL_OK;
338
339 /* Process Locked */
340 __HAL_LOCK(&pFlash);
341
342 /* If procedure already ongoing, reject the next one */
343 if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
344 {
345 return HAL_ERROR;
346 }
347
348 /* Check the parameters */
349 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
350
351 /* Enable End of FLASH Operation and Error source interrupts */
352 __HAL_FLASH_ENABLE_IT((FLASH_IT_EOP | FLASH_IT_ERR));
353
354 #if defined(STM32F101xG) || defined(STM32F103xG)
355 /* Enable End of FLASH Operation and Error source interrupts */
356 __HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK2 | FLASH_IT_ERR_BANK2));
357 #endif
358
359 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
360 {
361 /*Mass erase to be done*/
362 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
363 FLASH_MassErase(pEraseInit->Banks);
364 }
365 else
366 {
367 /* Erase by page to be done*/
368
369 /* Check the parameters */
370 assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
371 assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
372
373 pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
374 pFlash.DataRemaining = pEraseInit->NbPages;
375 pFlash.Address = pEraseInit->PageAddress;
376
377 /*Erase 1st page and wait for IT*/
378 FLASH_PageErase(pEraseInit->PageAddress);
379 }
380
381 return status;
382 }
383
384 /**
385 * @}
386 */
387
388 /** @defgroup FLASHEx_Exported_Functions_Group2 Extended Peripheral Control functions
389 * @brief Peripheral Control functions
390 *
391 @verbatim
392 ===============================================================================
393 ##### Peripheral Control functions #####
394 ===============================================================================
395 [..]
396 This subsection provides a set of functions allowing to control the FLASH
397 memory operations.
398
399 @endverbatim
400 * @{
401 */
402
403 /**
404 * @brief Erases the FLASH option bytes.
405 * @note This functions erases all option bytes except the Read protection (RDP).
406 * The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
407 * The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
408 * The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
409 * (system reset will occur)
410 * @retval HAL status
411 */
412
413 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
414 {
415 uint8_t rdptmp = OB_RDP_LEVEL_0;
416 HAL_StatusTypeDef status = HAL_ERROR;
417
418 /* Get the actual read protection Option Byte value */
419 if(FLASH_OB_GetRDP() != RESET)
420 {
421 rdptmp = OB_RDP_LEVEL_1;
422 }
423
424 /* Wait for last operation to be completed */
425 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
426
427 if(status == HAL_OK)
428 {
429 /* Clean the error context */
430 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
431
432 /* If the previous operation is completed, proceed to erase the option bytes */
433 SET_BIT(FLASH->CR, FLASH_CR_OPTER);
434 SET_BIT(FLASH->CR, FLASH_CR_STRT);
435
436 /* Wait for last operation to be completed */
437 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
438
439 /* If the erase operation is completed, disable the OPTER Bit */
440 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
441
442 if(status == HAL_OK)
443 {
444 /* Restore the last read protection Option Byte value */
445 status = FLASH_OB_RDP_LevelConfig(rdptmp);
446 }
447 }
448
449 /* Return the erase status */
450 return status;
451 }
452
453 /**
454 * @brief Program option bytes
455 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
456 * The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
457 * The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
458 * (system reset will occur)
459 *
460 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
461 * contains the configuration information for the programming.
462 *
463 * @retval HAL_StatusTypeDef HAL Status
464 */
465 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
466 {
467 HAL_StatusTypeDef status = HAL_ERROR;
468
469 /* Check the parameters */
470 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
471
472 /* Write protection configuration */
473 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
474 {
475 assert_param(IS_WRPSTATE(pOBInit->WRPState));
476 if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
477 {
478 /* Enable of Write protection on the selected page */
479 status = FLASH_OB_EnableWRP(pOBInit->WRPPage);
480 }
481 else
482 {
483 /* Disable of Write protection on the selected page */
484 status = FLASH_OB_DisableWRP(pOBInit->WRPPage);
485 }
486 }
487
488 /* Read protection configuration */
489 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
490 {
491 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
492 }
493
494 /* USER configuration */
495 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
496 {
497 status = FLASH_OB_UserConfig(pOBInit->USERConfig);
498 }
499
500 /* DATA configuration*/
501 if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA)
502 {
503 status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData);
504 }
505
506 return status;
507 }
508
509 /**
510 * @brief Get the Option byte configuration
511 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
512 * contains the configuration information for the programming.
513 *
514 * @retval None
515 */
516 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
517 {
518 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER;
519
520 /*Get WRP*/
521 pOBInit->WRPPage = FLASH_OB_GetWRP();
522
523 /*Get RDP Level*/
524 pOBInit->RDPLevel = FLASH_OB_GetRDP();
525
526 /*Get USER*/
527 pOBInit->USERConfig = FLASH_OB_GetUser();
528 }
529
530 /**
531 * @}
532 */
533
534 /**
535 * @}
536 */
537
538 /** @addtogroup FLASHEx_Private_Functions
539 * @{
540 */
541
542 /**
543 * @brief Full erase of FLASH memory Bank
544 * @param Banks: Banks to be erased
545 * This parameter can be one of the following values:
546 * @arg FLASH_BANK_1: Bank1 to be erased
547 * @arg FLASH_BANK_2: Bank2 to be erased
548 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
549 *
550 * @retval HAL Status
551 */
552 static void FLASH_MassErase(uint32_t Banks)
553 {
554 /* Check the parameters */
555 assert_param(IS_FLASH_BANK(Banks));
556
557 /* Clean the error context */
558 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
559
560 #if defined(STM32F101xG) || defined(STM32F103xG)
561 if(Banks == FLASH_BANK_BOTH)
562 {
563 /* bank1 & bank2 will be erased*/
564 SET_BIT(FLASH->CR, FLASH_CR_MER);
565 SET_BIT(FLASH->CR2, FLASH_CR2_MER);
566 SET_BIT(FLASH->CR, FLASH_CR_STRT);
567 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
568 }
569 else if(Banks == FLASH_BANK_2)
570 {
571 /*Only bank2 will be erased*/
572 SET_BIT(FLASH->CR2, FLASH_CR2_MER);
573 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
574 }
575 else
576 {
577 #endif /* STM32F101xG || STM32F103xG */
578 /*Only bank1 will be erased*/
579 SET_BIT(FLASH->CR, FLASH_CR_MER);
580 SET_BIT(FLASH->CR, FLASH_CR_STRT);
581 #if defined(STM32F101xG) || defined(STM32F103xG)
582 }
583 #endif /* STM32F101xG || STM32F103xG */
584 }
585
586 /**
587 * @brief Enable the write protection of the desired pages
588 * @note When the memory read protection level is selected (RDP level = 1),
589 * it is not possible to program or erase the flash page i if CortexM4
590 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
591 *
592 * @param WriteProtectPage: specifies the page(s) to be write protected.
593 * The value of this parameter depend on device used within the same series
594 * @retval HAL status
595 */
596 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage)
597 {
598 HAL_StatusTypeDef status = HAL_OK;
599 uint16_t WRP0_Data = 0xFFFF;
600 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) || \
601 defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
602 defined(STM32F101xG) || defined(STM32F103xG) || \
603 defined(STM32F105xC) || defined(STM32F107xC)
604 uint16_t WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
605 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB || */
606 /* STM32F100xE || STM32F101xE || STM32F103xE || */
607 /* STM32F101xG || STM32F103xG || */
608 /* STM32F105xC || STM32F107xC */
609
610 /* Check the parameters */
611 assert_param(IS_OB_WRP(WriteProtectPage));
612
613 WriteProtectPage = (uint32_t)(~WriteProtectPage);
614
615 /* Low Density and Medium Density */
616 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \
617 defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
618 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
619 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 || */
620 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
621
622 /* Medium Density */
623 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
624 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8);
625 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16);
626 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24);
627 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
628
629 /* High Density, XL Density and Connectivity line devices*/
630 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
631 defined(STM32F101xG) || defined(STM32F103xG) || \
632 defined(STM32F105xC) || defined(STM32F107xC)
633 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
634 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8);
635 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16);
636 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
637 /* STM32F101xG || STM32F103xG */
638 /* STM32F105xC || STM32F107xC */
639
640 /* High Density */
641 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
642 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24);
643 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
644
645 /* XL Density */
646 #if defined(STM32F101xG) || defined(STM32F103xG)
647 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24);
648 #endif /* STM32F101xG || STM32F103xG */
649
650 /* Connectivity line devices */
651 #if defined(STM32F105xC) || defined(STM32F107xC)
652 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24);
653 #endif /* STM32F105xC || STM32F107xC */
654
655 /* Wait for last operation to be completed */
656 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
657
658 if(status == HAL_OK)
659 {
660 /* Clean the error context */
661 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
662
663 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
664
665 if(WRP0_Data != 0xFF)
666 {
667 OB->WRP0 &= WRP0_Data;
668
669 /* Wait for last operation to be completed */
670 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
671 }
672
673 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) || \
674 defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
675 defined(STM32F101xG) || defined(STM32F103xG) || \
676 defined(STM32F105xC) || defined(STM32F107xC)
677
678 if((status == HAL_OK) && (WRP1_Data != 0xFF))
679 {
680 OB->WRP1 &= WRP1_Data;
681
682 /* Wait for last operation to be completed */
683 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
684 }
685
686 if((status == HAL_OK) && (WRP2_Data != 0xFF))
687 {
688 OB->WRP2 &= WRP2_Data;
689
690 /* Wait for last operation to be completed */
691 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
692 }
693
694 if((status == HAL_OK) && (WRP3_Data != 0xFF))
695 {
696 OB->WRP3 &= WRP3_Data;
697
698 /* Wait for last operation to be completed */
699 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
700 }
701 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB || */
702 /* STM32F100xE || STM32F101xE || STM32F103xE || */
703 /* STM32F101xG || STM32F103xG || */
704 /* STM32F105xC || STM32F107xC */
705
706 /* if the program operation is completed, disable the OPTPG Bit */
707 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
708 }
709
710 return status;
711 }
712
713 /**
714 * @brief Disable the write protection of the desired pages
715 * @note When the memory read protection level is selected (RDP level = 1),
716 * it is not possible to program or erase the flash page i if CortexM4
717 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
718 *
719 * @param WriteProtectPage: specifies the page(s) to be write unprotected.
720 * The value of this parameter depend on device used within the same series
721 * @retval HAL status
722 */
723 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage)
724 {
725 HAL_StatusTypeDef status = HAL_OK;
726 uint16_t WRP0_Data = 0xFFFF;
727 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) || \
728 defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
729 defined(STM32F101xG) || defined(STM32F103xG) || \
730 defined(STM32F105xC) || defined(STM32F107xC)
731 uint16_t WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
732 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB || */
733 /* STM32F100xE || STM32F101xE || STM32F103xE || */
734 /* STM32F101xG || STM32F103xG || */
735 /* STM32F105xC || STM32F107xC */
736
737 /* Check the parameters */
738 assert_param(IS_OB_WRP(WriteProtectPage));
739
740 /* Low Density and Medium Density */
741 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \
742 defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
743 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
744 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 || */
745 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
746
747 /* Medium Density */
748 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
749 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8);
750 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16);
751 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24);
752 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
753
754 /* High Density, XL Density and Connectivity line devices*/
755 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
756 defined(STM32F101xG) || defined(STM32F103xG) || \
757 defined(STM32F105xC) || defined(STM32F107xC)
758 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
759 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8);
760 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16);
761 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
762 /* STM32F101xG || STM32F103xG */
763 /* STM32F105xC || STM32F107xC */
764
765 /* High Density */
766 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
767 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24);
768 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
769
770 /* XL Density */
771 #if defined(STM32F101xG) || defined(STM32F103xG)
772 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24);
773 #endif /* STM32F101xG || STM32F103xG */
774
775 /* Connectivity line devices */
776 #if defined(STM32F105xC) || defined(STM32F107xC)
777 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24);
778 #endif /* STM32F105xC || STM32F107xC */
779
780 /* Wait for last operation to be completed */
781 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
782
783 if(status == HAL_OK)
784 {
785 /* Clean the error context */
786 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
787
788 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
789
790 if(WRP0_Data != 0xFF)
791 {
792 OB->WRP0 |= WRP0_Data;
793
794 /* Wait for last operation to be completed */
795 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
796 }
797 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) || \
798 defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
799 defined(STM32F101xG) || defined(STM32F103xG) || \
800 defined(STM32F105xC) || defined(STM32F107xC)
801
802 if((status == HAL_OK) && (WRP1_Data != 0xFF))
803 {
804 OB->WRP1 |= WRP1_Data;
805
806 /* Wait for last operation to be completed */
807 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
808 }
809
810 if((status == HAL_OK) && (WRP2_Data != 0xFF))
811 {
812 OB->WRP2 |= WRP2_Data;
813
814 /* Wait for last operation to be completed */
815 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
816 }
817
818 if((status == HAL_OK) && (WRP3_Data != 0xFF))
819 {
820 OB->WRP3 |= WRP3_Data;
821
822 /* Wait for last operation to be completed */
823 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
824 }
825 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB ||*/
826 /* STM32F100xE || STM32F101xE || STM32F103xE ||*/
827 /* STM32F101xG || STM32F103xG ||*/
828 /* STM32F105xC || STM32F107xC */
829
830 /* if the program operation is completed, disable the OPTPG Bit */
831 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
832 }
833 return status;
834 }
835
836 /**
837 * @brief Set the read protection level.
838 * @param ReadProtectLevel: specifies the read protection level.
839 * This parameter can be one of the following values:
840 * @arg OB_RDP_LEVEL_0: No protection
841 * @arg OB_RDP_LEVEL_1: Read protection of the memory
842 *
843 * @retval HAL status
844 */
845 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel)
846 {
847 HAL_StatusTypeDef status = HAL_OK;
848
849 /* Check the parameters */
850 assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel));
851
852 /* Wait for last operation to be completed */
853 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
854
855 if(status == HAL_OK)
856 {
857 /* Clean the error context */
858 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
859
860 /* Enable the Option Bytes Programming operation */
861 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
862
863 WRITE_REG(OB->RDP, ReadProtectLevel);
864
865 /* Wait for last operation to be completed */
866 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
867
868 /* if the program operation is completed, disable the OPTPG Bit */
869 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
870 }
871
872 return status;
873 }
874
875 /**
876 * @brief Program the FLASH User Option Byte.
877 * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
878 * @param UserConfig: The FLASH User Option Bytes values: FLASH_OBR_IWDG_SW(Bit2),
879 * FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
880 * And BFBF2(Bit5) for STM32F101xG and STM32F103xG .
881 * @retval HAL status
882 */
883 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig)
884 {
885 HAL_StatusTypeDef status = HAL_OK;
886
887 /* Check the parameters */
888 assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW)));
889 assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST)));
890 assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST)));
891 #if defined(STM32F101xG) || defined(STM32F103xG)
892 assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET)));
893 #endif /* STM32F101xG || STM32F103xG */
894
895 /* Wait for last operation to be completed */
896 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
897
898 if(status == HAL_OK)
899 {
900 /* Clean the error context */
901 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
902
903 /* Enable the Option Bytes Programming operation */
904 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
905
906 #if defined(STM32F101xG) || defined(STM32F103xG)
907 OB->USER = (UserConfig | 0xF0);
908 #else
909 OB->USER = (UserConfig | 0xF8);
910 #endif /* STM32F101xG || STM32F103xG */
911
912 /* Wait for last operation to be completed */
913 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
914
915 /* if the program operation is completed, disable the OPTPG Bit */
916 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
917 }
918
919 return status;
920 }
921
922 /**
923 * @brief Programs a half word at a specified Option Byte Data address.
924 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
925 * The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
926 * The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
927 * (system reset will occur)
928 * Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
929 * @param Address: specifies the address to be programmed.
930 * This parameter can be 0x1FFFF804 or 0x1FFFF806.
931 * @param Data: specifies the data to be programmed.
932 * @retval HAL status
933 */
934 static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
935 {
936 HAL_StatusTypeDef status = HAL_ERROR;
937
938 /* Check the parameters */
939 assert_param(IS_OB_DATA_ADDRESS(Address));
940
941 /* Wait for last operation to be completed */
942 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
943
944 if(status == HAL_OK)
945 {
946 /* Clean the error context */
947 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
948
949 /* Enables the Option Bytes Programming operation */
950 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
951 *(__IO uint16_t*)Address = Data;
952
953 /* Wait for last operation to be completed */
954 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
955
956 /* If the program operation is completed, disable the OPTPG Bit */
957 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
958 }
959 /* Return the Option Byte Data Program Status */
960 return status;
961 }
962
963 /**
964 * @brief Return the FLASH Write Protection Option Bytes value.
965 * @retval The FLASH Write Protection Option Bytes value
966 */
967 static uint32_t FLASH_OB_GetWRP(void)
968 {
969 /* Return the FLASH write protection Register value */
970 return (uint32_t)(READ_REG(FLASH->WRPR));
971 }
972
973 /**
974 * @brief Returns the FLASH Read Protection level.
975 * @retval FLASH ReadOut Protection Status:
976 * - SET, when OB_RDP_LEVEL_1 is set
977 * - RESET, when OB_RDP_LEVEL_0 is set
978 */
979 static FlagStatus FLASH_OB_GetRDP(void)
980 {
981 FlagStatus readstatus = RESET;
982
983 if (HAL_IS_BIT_SET(FLASH->OBR, FLASH_OBR_RDPRT))
984 {
985 readstatus = SET;
986 }
987 else
988 {
989 readstatus = RESET;
990 }
991 return readstatus;
992 }
993
994 /**
995 * @brief Return the FLASH User Option Byte value.
996 * @retval The FLASH User Option Bytes values: FLASH_OBR_IWDG_SW(Bit2),
997 * FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
998 * And FLASH_OBR_BFB2(Bit5) for STM32F101xG and STM32F103xG .
999 */
1000 static uint8_t FLASH_OB_GetUser(void)
1001 {
1002 /* Return the User Option Byte */
1003 return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> 2);
1004 }
1005
1006 #if defined(STM32F101xG) || defined(STM32F103xG)
1007 /**
1008 * @brief Wait for a FLASH BANK2 operation to complete.
1009 * @param Timeout: maximum flash operationtimeout
1010 * @retval HAL_StatusTypeDef HAL Status
1011 */
1012 static HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout)
1013 {
1014 /* Wait for the FLASH BANK2 operation to complete by polling on BUSY flag to be reset.
1015 Even if the FLASH BANK2 operation fails, the BUSY flag will be reset and an error
1016 flag will be set */
1017
1018 uint32_t tickstart = HAL_GetTick();
1019
1020 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY_BANK2))
1021 {
1022 if (Timeout != HAL_MAX_DELAY)
1023 {
1024 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1025 {
1026 return HAL_TIMEOUT;
1027 }
1028 }
1029 }
1030
1031 /* Check FLASH End of Operation flag */
1032 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP_BANK2))
1033 {
1034 /* Clear FLASH End of Operation pending bit */
1035 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK2);
1036 }
1037
1038 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
1039 {
1040 /*Save the error code*/
1041 FLASH_SetErrorCode();
1042 return HAL_ERROR;
1043 }
1044
1045 /* If there is an error flag set */
1046 return HAL_OK;
1047
1048 }
1049 #endif /* STM32F101xG || STM32F103xG */
1050
1051 /**
1052 * @}
1053 */
1054
1055 /**
1056 * @}
1057 */
1058
1059 /** @addtogroup FLASH
1060 * @{
1061 */
1062
1063 #if defined(STM32F101xG) || defined(STM32F103xG)
1064 /** @addtogroup FLASH_Exported_Functions
1065 * @{
1066 */
1067
1068 /** @addtogroup FLASH_Exported_Functions_Group2
1069 * @{
1070 */
1071
1072 /**
1073 * @brief Unlock the FLASH control register access
1074 * @retval HAL Status
1075 */
1076 HAL_StatusTypeDef HAL_FLASH_Unlock(void)
1077 {
1078 if (HAL_IS_BIT_SET(FLASH->CR, FLASH_CR_LOCK))
1079 {
1080 /* Authorize the FLASH BANK1 Registers access */
1081 WRITE_REG(FLASH->KEYR, FLASH_KEY1);
1082 WRITE_REG(FLASH->KEYR, FLASH_KEY2);
1083 }
1084 else
1085 {
1086 return HAL_ERROR;
1087 }
1088
1089
1090 if (HAL_IS_BIT_SET(FLASH->CR2, FLASH_CR2_LOCK))
1091 {
1092 /* Authorize the FLASH BANK2 Registers access */
1093 WRITE_REG(FLASH->KEYR2, FLASH_KEY1);
1094 WRITE_REG(FLASH->KEYR2, FLASH_KEY2);
1095 }
1096 else
1097 {
1098 return HAL_ERROR;
1099 }
1100
1101 return HAL_OK;
1102 }
1103
1104 /**
1105 * @brief Locks the FLASH control register access
1106 * @retval HAL Status
1107 */
1108 HAL_StatusTypeDef HAL_FLASH_Lock(void)
1109 {
1110 /* Set the LOCK Bit to lock the FLASH BANK1 Registers access */
1111 SET_BIT(FLASH->CR, FLASH_CR_LOCK);
1112
1113 /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
1114 SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
1115
1116 return HAL_OK;
1117 }
1118 /**
1119 * @}
1120 */
1121
1122 /** @addtogroup FLASH_Exported_Functions_Group1
1123 * @{
1124 */
1125
1126 /**
1127 * @brief Program halfword, word or double word at a specified address
1128 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
1129 * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
1130 *
1131 * @note If an erase and a program operations are requested simultaneously,
1132 * the erase operation is performed before the program one.
1133 *
1134 * @note FLASH should be previously erased before new programmation (only exception to this
1135 * is when 0x0000 is programmed)
1136 *
1137 * @param TypeProgram: Indicate the way to program at a specified address.
1138 * This parameter can be a value of @ref FLASH_Type_Program
1139 * @param Address: Specifies the address to be programmed.
1140 * @param Data: Specifies the data to be programmed
1141 *
1142 * @retval HAL_StatusTypeDef HAL Status
1143 */
1144 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
1145 {
1146 HAL_StatusTypeDef status = HAL_ERROR;
1147 uint8_t index = 0;
1148 uint8_t nbiterations = 0;
1149
1150 /* Process Locked */
1151 __HAL_LOCK(&pFlash);
1152
1153 /* Check the parameters */
1154 assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
1155 assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
1156
1157 if(Address <= FLASH_BANK1_END)
1158 {
1159 /* Wait for last operation to be completed */
1160 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1161 }
1162 else
1163 {
1164 /* Wait for last operation to be completed */
1165 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
1166 }
1167
1168 if(status == HAL_OK)
1169 {
1170 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
1171 {
1172 /* Program halfword (16-bit) at a specified address. */
1173 nbiterations = 1;
1174 }
1175 else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
1176 {
1177 /* Program word (32-bit = 2*16-bit) at a specified address. */
1178 nbiterations = 2;
1179 }
1180 else
1181 {
1182 /* Program double word (64-bit = 4*16-bit) at a specified address. */
1183 nbiterations = 4;
1184 }
1185
1186 for (index = 0; index < nbiterations; index++)
1187 {
1188 FLASH_Program_HalfWord((Address + (2*index)), (uint16_t)(Data >> (16*index)));
1189
1190 if(Address <= FLASH_BANK1_END)
1191 {
1192 /* Wait for last operation to be completed */
1193 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1194
1195 /* If the program operation is completed, disable the PG Bit */
1196 CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
1197 }
1198 else
1199 {
1200 /* Wait for last operation to be completed */
1201 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
1202
1203 /* If the program operation is completed, disable the PG Bit */
1204 CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
1205 }
1206 /* In case of error, stop programation procedure */
1207 if (status != HAL_OK)
1208 {
1209 break;
1210 }
1211 }
1212 }
1213
1214 /* Process Unlocked */
1215 __HAL_UNLOCK(&pFlash);
1216
1217 return status;
1218 }
1219
1220 /**
1221 * @brief Program halfword, word or double word at a specified address with interrupt enabled.
1222 * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
1223 * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
1224 *
1225 * @note If an erase and a program operations are requested simultaneously,
1226 * the erase operation is performed before the program one.
1227 *
1228 * @param TypeProgram: Indicate the way to program at a specified address.
1229 * This parameter can be a value of @ref FLASH_Type_Program
1230 * @param Address: Specifies the address to be programmed.
1231 * @param Data: Specifies the data to be programmed
1232 *
1233 * @retval HAL_StatusTypeDef HAL Status
1234 */
1235 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
1236 {
1237 HAL_StatusTypeDef status = HAL_OK;
1238
1239 /* Process Locked */
1240 __HAL_LOCK(&pFlash);
1241
1242 /* If procedure already ongoing, reject the next one */
1243 if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
1244 {
1245 return HAL_ERROR;
1246 }
1247
1248 /* Check the parameters */
1249 assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
1250 assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
1251
1252 if(Address <= FLASH_BANK1_END)
1253 {
1254 /* Enable End of FLASH Operation and Error source interrupts */
1255 __HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK1 | FLASH_IT_ERR_BANK1));
1256 }else
1257 {
1258 /* Enable End of FLASH Operation and Error source interrupts */
1259 __HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK2 | FLASH_IT_ERR_BANK2));
1260 }
1261
1262 pFlash.Address = Address;
1263 pFlash.Data = Data;
1264
1265 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
1266 {
1267 pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD;
1268 /*Program halfword (16-bit) at a specified address.*/
1269 pFlash.DataRemaining = 1;
1270 }
1271 else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
1272 {
1273 pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD;
1274 /*Program word (32-bit : 2*16-bit) at a specified address.*/
1275 pFlash.DataRemaining = 2;
1276 }
1277 else
1278 {
1279 pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD;
1280 /*Program double word (64-bit : 4*16-bit) at a specified address.*/
1281 pFlash.DataRemaining = 4;
1282 }
1283
1284 /*Program halfword (16-bit) at a specified address.*/
1285 FLASH_Program_HalfWord(Address, (uint16_t)Data);
1286
1287 return status;
1288 }
1289
1290 /**
1291 * @brief This function handles FLASH interrupt request.
1292 * @retval None
1293 */
1294 void HAL_FLASH_IRQHandler(void)
1295 {
1296 uint32_t addresstmp = 0;
1297
1298 /* Check FLASH operation error flags */
1299 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK1) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK1) || \
1300 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)))
1301 {
1302 /*Save the Error code*/
1303 FLASH_SetErrorCode();
1304
1305 /* FLASH error interrupt user callback */
1306 HAL_FLASH_OperationErrorCallback(pFlash.Address);
1307
1308 /* Reset address and stop the procedure ongoing*/
1309 pFlash.Address = 0xFFFFFFFF;
1310 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1311 }
1312
1313 /* Check FLASH End of Operation flag */
1314 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP_BANK1))
1315 {
1316 /* Clear FLASH End of Operation pending bit */
1317 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK1);
1318
1319 /* Process can continue only if no error detected */
1320 if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
1321 {
1322 if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
1323 {
1324 /* Nb of pages to erased can be decreased */
1325 pFlash.DataRemaining--;
1326
1327 /* Indicate user which page address has been erased*/
1328 HAL_FLASH_EndOfOperationCallback(pFlash.Address);
1329
1330 /* Check if there are still pages to erase*/
1331 if(pFlash.DataRemaining != 0)
1332 {
1333 /* Increment page address to next page */
1334 pFlash.Address += FLASH_PAGE_SIZE;
1335 addresstmp = pFlash.Address;
1336
1337 /* Operation is completed, disable the PER Bit */
1338 CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
1339
1340 FLASH_PageErase(addresstmp);
1341 }
1342 else
1343 {
1344 /*No more pages to Erase*/
1345
1346 /*Reset Address and stop Erase pages procedure*/
1347 pFlash.Address = 0xFFFFFFFF;
1348 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1349 }
1350 }
1351 else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
1352 {
1353 /* Operation is completed, disable the MER Bit */
1354 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
1355
1356 /* Stop Mass Erase procedure if no pending mass erase on other bank */
1357 if (HAL_IS_BIT_CLR(FLASH->CR2, FLASH_CR2_MER))
1358 {
1359 /* MassErase ended. Return the selected bank*/
1360 /* FLASH EOP interrupt user callback */
1361 HAL_FLASH_EndOfOperationCallback(0);
1362
1363 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1364 }
1365 }
1366 else
1367 {
1368 /* Nb of 16-bit data to program can be decreased */
1369 pFlash.DataRemaining--;
1370
1371 /* Check if there are still 16-bit data to program */
1372 if(pFlash.DataRemaining != 0)
1373 {
1374 /* Increment address to 16-bit */
1375 pFlash.Address += 2;
1376 addresstmp = pFlash.Address;
1377
1378 /* Shift to have next 16-bit data */
1379 pFlash.Data = (pFlash.Data >> 16);
1380
1381 /* Operation is completed, disable the PG Bit */
1382 CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
1383
1384 /*Program halfword (16-bit) at a specified address.*/
1385 FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data);
1386 }
1387 else
1388 {
1389 /*Program ended. Return the selected address*/
1390 /* FLASH EOP interrupt user callback */
1391 if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD)
1392 {
1393 HAL_FLASH_EndOfOperationCallback(pFlash.Address);
1394 }
1395 else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD)
1396 {
1397 HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2);
1398 }
1399 else
1400 {
1401 HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6);
1402 }
1403
1404 /* Reset Address and stop Program procedure*/
1405 pFlash.Address = 0xFFFFFFFF;
1406 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1407 }
1408 }
1409 }
1410 }
1411
1412 /* Check FLASH End of Operation flag */
1413 if(__HAL_FLASH_GET_FLAG( FLASH_FLAG_EOP_BANK2))
1414 {
1415 /* Clear FLASH End of Operation pending bit */
1416 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK2);
1417
1418 /* Process can continue only if no error detected */
1419 if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
1420 {
1421 if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
1422 {
1423 /* Nb of pages to erased can be decreased */
1424 pFlash.DataRemaining--;
1425
1426 /* Indicate user which page address has been erased*/
1427 HAL_FLASH_EndOfOperationCallback(pFlash.Address);
1428
1429 /* Check if there are still pages to erase*/
1430 if(pFlash.DataRemaining != 0)
1431 {
1432 /* Increment page address to next page */
1433 pFlash.Address += FLASH_PAGE_SIZE;
1434 addresstmp = pFlash.Address;
1435
1436 /* Operation is completed, disable the PER Bit */
1437 CLEAR_BIT(FLASH->CR2, FLASH_CR2_PER);
1438
1439 FLASH_PageErase(addresstmp);
1440 }
1441 else
1442 {
1443 /*No more pages to Erase*/
1444
1445 /*Reset Address and stop Erase pages procedure*/
1446 pFlash.Address = 0xFFFFFFFF;
1447 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1448 }
1449 }
1450 else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
1451 {
1452 /* Operation is completed, disable the MER Bit */
1453 CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
1454
1455 if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_MER))
1456 {
1457 /* MassErase ended. Return the selected bank*/
1458 /* FLASH EOP interrupt user callback */
1459 HAL_FLASH_EndOfOperationCallback(0);
1460
1461 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1462 }
1463 }
1464 else
1465 {
1466 /* Nb of 16-bit data to program can be decreased */
1467 pFlash.DataRemaining--;
1468
1469 /* Check if there are still 16-bit data to program */
1470 if(pFlash.DataRemaining != 0)
1471 {
1472 /* Increment address to 16-bit */
1473 pFlash.Address += 2;
1474 addresstmp = pFlash.Address;
1475
1476 /* Shift to have next 16-bit data */
1477 pFlash.Data = (pFlash.Data >> 16);
1478
1479 /* Operation is completed, disable the PG Bit */
1480 CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
1481
1482 /*Program halfword (16-bit) at a specified address.*/
1483 FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data);
1484 }
1485 else
1486 {
1487 /*Program ended. Return the selected address*/
1488 /* FLASH EOP interrupt user callback */
1489 if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD)
1490 {
1491 HAL_FLASH_EndOfOperationCallback(pFlash.Address);
1492 }
1493 else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD)
1494 {
1495 HAL_FLASH_EndOfOperationCallback(pFlash.Address-2);
1496 }
1497 else
1498 {
1499 HAL_FLASH_EndOfOperationCallback(pFlash.Address-6);
1500 }
1501
1502 /* Reset Address and stop Program procedure*/
1503 pFlash.Address = 0xFFFFFFFF;
1504 pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
1505 }
1506 }
1507 }
1508 }
1509
1510 if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
1511 {
1512 /* Operation is completed, disable the PG, PER and MER Bits for both bank */
1513 CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER));
1514 CLEAR_BIT(FLASH->CR2, (FLASH_CR2_PG | FLASH_CR2_PER | FLASH_CR2_MER));
1515
1516 /* Disable End of FLASH Operation and Error source interrupts for both banks */
1517 __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP_BANK1 | FLASH_IT_ERR_BANK1 | FLASH_IT_EOP_BANK2 | FLASH_IT_ERR_BANK2);
1518
1519 /* Process Unlocked */
1520 __HAL_UNLOCK(&pFlash);
1521 }
1522 }
1523 /**
1524 * @}
1525 */
1526
1527 /**
1528 * @}
1529 */
1530 #endif /* STM32F101xG || STM32F103xG */
1531
1532 /** @addtogroup FLASH_Private_Functions
1533 * @{
1534 */
1535
1536 /**
1537 * @brief Program a half-word (16-bit) at a specified address.
1538 * @param Address: specifies the address to be programmed.
1539 * @param Data: specifies the data to be programmed.
1540 * @retval None
1541 */
1542 void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
1543 {
1544 /* Clean the error context */
1545 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1546
1547 #if defined(STM32F101xG) || defined(STM32F103xG)
1548 if(Address <= FLASH_BANK1_END)
1549 {
1550 #endif /* STM32F101xG || STM32F103xG */
1551 /* Proceed to program the new data */
1552 SET_BIT(FLASH->CR, FLASH_CR_PG);
1553 #if defined(STM32F101xG) || defined(STM32F103xG)
1554 }
1555 else
1556 {
1557 /* Proceed to program the new data */
1558 SET_BIT(FLASH->CR2, FLASH_CR2_PG);
1559 }
1560 #endif /* STM32F101xG || STM32F103xG */
1561
1562 /* Write data in the address */
1563 *(__IO uint16_t*)Address = Data;
1564 }
1565
1566 /**
1567 * @brief Set the specific FLASH error flag.
1568 * @retval None
1569 */
1570 void FLASH_SetErrorCode(void)
1571 {
1572 #if defined(STM32F101xG) || defined(STM32F103xG)
1573 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
1574 #else
1575 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
1576 #endif /* STM32F101xG || STM32F103xG */
1577 {
1578 pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
1579 }
1580 #if defined(STM32F101xG) || defined(STM32F103xG)
1581 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
1582 #else
1583 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
1584 #endif /* STM32F101xG || STM32F103xG */
1585 {
1586 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
1587 }
1588
1589 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
1590 {
1591 pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
1592 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
1593 }
1594
1595 /* Clear FLASH error pending bits */
1596 #if defined(STM32F101xG) || defined(STM32F103xG)
1597 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2);
1598 #else
1599 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR | FLASH_FLAG_PGERR);
1600 #endif /* STM32F101xG || STM32F103xG */
1601 }
1602
1603 /**
1604 * @brief Erase the specified FLASH memory page
1605 * @param PageAddress: FLASH page to erase
1606 * The value of this parameter depend on device used within the same series
1607 *
1608 * @retval None
1609 */
1610 void FLASH_PageErase(uint32_t PageAddress)
1611 {
1612 /* Clean the error context */
1613 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1614
1615 #if defined(STM32F101xG) || defined(STM32F103xG)
1616 if(PageAddress > FLASH_BANK1_END)
1617 {
1618 /* Proceed to erase the page */
1619 SET_BIT(FLASH->CR2, FLASH_CR2_PER);
1620 WRITE_REG(FLASH->AR2, PageAddress);
1621 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
1622 }
1623 else
1624 #endif /* STM32F101xG || STM32F103xG */
1625 {
1626 /* Proceed to erase the page */
1627 SET_BIT(FLASH->CR, FLASH_CR_PER);
1628 WRITE_REG(FLASH->AR, PageAddress);
1629 SET_BIT(FLASH->CR, FLASH_CR_STRT);
1630 }
1631 }
1632
1633 /**
1634 * @}
1635 */
1636
1637 /**
1638 * @}
1639 */
1640
1641 /**
1642 * @}
1643 */
1644
1645 #endif /* HAL_FLASH_MODULE_ENABLED */
1646 /**
1647 * @}
1648 */
1649
1650 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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