tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_iwdg.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_iwdg.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   Header file of IWDG HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_HAL_IWDG_H
  40 #define __STM32F1xx_HAL_IWDG_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f1xx_hal_def.h"
  48
  49 /** @addtogroup STM32F1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup IWDG
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
  60   * @{
  61   */
  62
  63 /**
  64   * @brief  IWDG HAL State Structure definition
  65   */
  66 typedef enum
  67 {
  68   HAL_IWDG_STATE_RESET     = 0x00,  /*!< IWDG not yet initialized or disabled */
  69   HAL_IWDG_STATE_READY     = 0x01,  /*!< IWDG initialized and ready for use   */
  70   HAL_IWDG_STATE_BUSY      = 0x02,  /*!< IWDG internal process is ongoing     */
  71   HAL_IWDG_STATE_TIMEOUT   = 0x03,  /*!< IWDG timeout state                   */
  72   HAL_IWDG_STATE_ERROR     = 0x04   /*!< IWDG error state                     */
  73
  74 }HAL_IWDG_StateTypeDef;
  75
  76 /**
  77   * @brief  IWDG Init structure definition
  78   */
  79 typedef struct
  80 {
  81   uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
  82                             This parameter can be a value of @ref IWDG_Prescaler */
  83
  84   uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
  85                             This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
  86
  87 }IWDG_InitTypeDef;
  88
  89 /**
  90   * @brief  IWDG Handle Structure definition
  91   */
  92 typedef struct
  93 {
  94   IWDG_TypeDef                 *Instance;  /*!< Register base address    */
  95
  96   IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
  97
  98   HAL_LockTypeDef              Lock;       /*!< IWDG Locking object      */
  99
 100   __IO HAL_IWDG_StateTypeDef   State;      /*!< IWDG communication state */
 101
 102 }IWDG_HandleTypeDef;
 103
 104 /**
 105   * @}
 106   */
 107
 108 /* Exported constants --------------------------------------------------------*/
 109
 110 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
 111   * @{
 112   */
 113
 114 /** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask
 115   * @brief IWDG registers bit mask
 116   * @{
 117   */
 118 /* --- KR Register ---*/
 119 /* KR register bit mask */
 120 #define IWDG_KEY_RELOAD               ((uint32_t)0xAAAA)  /*!< IWDG Reload Counter Enable   */
 121 #define IWDG_KEY_ENABLE               ((uint32_t)0xCCCC)  /*!< IWDG Peripheral Enable       */
 122 #define IWDG_KEY_WRITE_ACCESS_ENABLE  ((uint32_t)0x5555)  /*!< IWDG KR Write Access Enable  */
 123 #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000)  /*!< IWDG KR Write Access Disable */
 124
 125 /**
 126   * @}
 127   */
 128
 129 /** @defgroup IWDG_Flag_definition IWDG Flag definition
 130   * @{
 131   */
 132 #define IWDG_FLAG_PVU   ((uint32_t)IWDG_SR_PVU)  /*!< Watchdog counter prescaler value update Flag */
 133 #define IWDG_FLAG_RVU   ((uint32_t)IWDG_SR_RVU)  /*!< Watchdog counter reload value update Flag    */
 134
 135 /**
 136   * @}
 137   */
 138
 139 /** @defgroup IWDG_Prescaler IWDG Prescaler
 140   * @{
 141   */
 142 #define IWDG_PRESCALER_4     ((uint8_t)0x00)  /*!< IWDG prescaler set to 4   */
 143 #define IWDG_PRESCALER_8     ((uint8_t)(IWDG_PR_PR_0))                  /*!< IWDG prescaler set to 8   */
 144 #define IWDG_PRESCALER_16    ((uint8_t)(IWDG_PR_PR_1))                  /*!< IWDG prescaler set to 16  */
 145 #define IWDG_PRESCALER_32    ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0))   /*!< IWDG prescaler set to 32  */
 146 #define IWDG_PRESCALER_64    ((uint8_t)(IWDG_PR_PR_2))                  /*!< IWDG prescaler set to 64  */
 147 #define IWDG_PRESCALER_128   ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0))   /*!< IWDG prescaler set to 128 */
 148 #define IWDG_PRESCALER_256   ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1))   /*!< IWDG prescaler set to 256 */
 149
 150 /**
 151   * @}
 152   */
 153
 154
 155 /**
 156   * @}
 157   */
 158
 159 /* Exported macros -----------------------------------------------------------*/
 160
 161 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
 162   * @{
 163   */
 164
 165 /** @brief Reset IWDG handle state
 166   * @param  __HANDLE__: IWDG handle.
 167   * @retval None
 168   */
 169 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
 170
 171 /**
 172   * @brief  Enables the IWDG peripheral.
 173   * @param  __HANDLE__: IWDG handle
 174   * @retval None
 175   */
 176 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
 177
 178 /**
 179   * @brief  Reloads IWDG counter with value defined in the reload register
 180   *         (write access to IWDG_PR and IWDG_RLR registers disabled).
 181   * @param  __HANDLE__: IWDG handle
 182   * @retval None
 183   */
 184 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
 185
 186
 187
 188 /**
 189   * @brief  Gets the selected IWDG's flag status.
 190   * @param  __HANDLE__: IWDG handle
 191   * @param  __FLAG__: specifies the flag to check.
 192   *         This parameter can be one of the following values:
 193   *            @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
 194   *            @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
 195   * @retval The new state of __FLAG__ (TRUE or FALSE).
 196   */
 197 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
 198
 199 /**
 200   * @}
 201   */
 202
 203 /* Private macro -------------------------------------------------------------*/
 204
 205 /** @defgroup IWDG_Private_Macros IWDG Private Macros
 206   * @{
 207   */
 208
 209
 210 /**
 211   * @brief  Enables write access to IWDG_PR and IWDG_RLR registers.
 212   * @param  __HANDLE__: IWDG handle
 213   * @retval None
 214   */
 215 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
 216
 217 /**
 218   * @brief  Disables write access to IWDG_PR and IWDG_RLR registers.
 219   * @param  __HANDLE__: IWDG handle
 220   * @retval None
 221   */
 222 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
 223
 224
 225 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
 226                                           ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
 227                                           ((__PRESCALER__) == IWDG_PRESCALER_16) || \
 228                                           ((__PRESCALER__) == IWDG_PRESCALER_32) || \
 229                                           ((__PRESCALER__) == IWDG_PRESCALER_64) || \
 230                                           ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
 231                                           ((__PRESCALER__) == IWDG_PRESCALER_256))
 232
 233
 234 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
 235
 236
 237 /**
 238   * @}
 239   */
 240
 241
 242
 243 /* Exported functions --------------------------------------------------------*/
 244
 245 /** @addtogroup IWDG_Exported_Functions
 246   * @{
 247   */
 248
 249 /** @addtogroup IWDG_Exported_Functions_Group1
 250   * @{
 251   */
 252 /* Initialization/de-initialization functions  ********************************/
 253 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
 254 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
 255
 256 /**
 257   * @}
 258   */
 259
 260 /** @addtogroup IWDG_Exported_Functions_Group2
 261   * @{
 262   */
 263 /* I/O operation functions ****************************************************/
 264 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
 265 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
 266
 267 /**
 268   * @}
 269   */
 270
 271 /** @addtogroup IWDG_Exported_Functions_Group3
 272   * @{
 273   */
 274 /* Peripheral State functions  ************************************************/
 275 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
 276
 277 /**
 278   * @}
 279   */
 280
 281 /**
 282   * @}
 283   */
 284
 285 /**
 286   * @}
 287   */
 288
 289 /**
 290   * @}
 291   */
 292
 293 #ifdef __cplusplus
 294 }
 295 #endif
 296
 297 #endif /* __STM32F1xx_HAL_IWDG_H */
 298
 299 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/