2 ******************************************************************************
3 * @file startup_stm32f334x8.s
4 * @author MCD Application Team
7 * @brief STM32F334x4/STM32F334x6/STM32F334x8 devices vector table for
8 * Atollic TrueSTUDIO toolchain.
9 * This module performs:
10 * - Set the initial SP
11 * - Set the initial PC == Reset_Handler,
12 * - Set the vector table entries with the exceptions ISR address,
13 * - Configure the clock system
14 * - Branches to main in the C library (which eventually
16 * After Reset the Cortex-M4 processor is in Thread mode,
17 * priority is Privileged, and the Stack is set to Main.
18 ******************************************************************************
21 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
23 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
24 * You may not use this file except in compliance with the License.
25 * You may obtain a copy of the License at:
27 * http://www.st.com/software_license_agreement_liberty_v2
29 * Unless required by applicable law or agreed to in writing, software
30 * distributed under the License is distributed on an "AS IS" BASIS,
31 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
32 * See the License for the specific language governing permissions and
33 * limitations under the License.
35 ******************************************************************************
44 .global Default_Handler
46 /* start address for the initialization values of the .data section.
47 defined in linker script */
49 /* start address for the .data section. defined in linker script */
51 /* end address for the .data section. defined in linker script */
53 /* start address for the .bss section. defined in linker script */
55 /* end address for the .bss section. defined in linker script */
58 .equ BootRAM, 0xF1E0F85F
60 * @brief This is the code that gets called when the processor first
61 * starts execution following a reset event. Only the absolutely
62 * necessary set is performed, after which the application
63 * supplied main() routine is called.
68 .section .text.Reset_Handler
70 .type Reset_Handler, %function
72 ldr sp, =_estack /* Atollic update: set stack pointer */
74 /* Copy the data segment initializers from flash to SRAM */
92 /* Zero fill the bss segment. */
102 /* Call the clock system intitialization function.*/
104 /* Call static constructors */
105 //bl __libc_init_array
106 /* Call the application's entry point.*/
109 * Calling the crt0 'cold-start' entry point. There __libc_init_array is called
110 * and when existing hardware_init_hook() and software_init_hook() before
111 * starting main(). software_init_hook() is available and has to be called due
112 * to initializsation when using rtos.
119 .size Reset_Handler, .-Reset_Handler
122 * @brief This is the code that gets called when the processor receives an
123 * unexpected interrupt. This simply enters an infinite loop, preserving
124 * the system state for examination by a debugger.
129 .section .text.Default_Handler,"ax",%progbits
133 .size Default_Handler, .-Default_Handler
134 /******************************************************************************
136 * The minimal vector table for a Cortex-M4. Note that the proper constructs
137 * must be placed on this to ensure that it ends up at physical address
140 ******************************************************************************/
141 .section .isr_vector,"a",%progbits
142 .type g_pfnVectors, %object
143 .size g_pfnVectors, .-g_pfnVectors
150 .word HardFault_Handler
151 .word MemManage_Handler
152 .word BusFault_Handler
153 .word UsageFault_Handler
159 .word DebugMon_Handler
162 .word SysTick_Handler
163 .word WWDG_IRQHandler
165 .word TAMP_STAMP_IRQHandler
166 .word RTC_WKUP_IRQHandler
167 .word FLASH_IRQHandler
169 .word EXTI0_IRQHandler
170 .word EXTI1_IRQHandler
171 .word EXTI2_TSC_IRQHandler
172 .word EXTI3_IRQHandler
173 .word EXTI4_IRQHandler
174 .word DMA1_Channel1_IRQHandler
175 .word DMA1_Channel2_IRQHandler
176 .word DMA1_Channel3_IRQHandler
177 .word DMA1_Channel4_IRQHandler
178 .word DMA1_Channel5_IRQHandler
179 .word DMA1_Channel6_IRQHandler
180 .word DMA1_Channel7_IRQHandler
181 .word ADC1_2_IRQHandler
182 .word CAN_TX_IRQHandler
183 .word CAN_RX0_IRQHandler
184 .word CAN_RX1_IRQHandler
185 .word CAN_SCE_IRQHandler
186 .word EXTI9_5_IRQHandler
187 .word TIM1_BRK_TIM15_IRQHandler
188 .word TIM1_UP_TIM16_IRQHandler
189 .word TIM1_TRG_COM_TIM17_IRQHandler
190 .word TIM1_CC_IRQHandler
191 .word TIM2_IRQHandler
192 .word TIM3_IRQHandler
194 .word I2C1_EV_IRQHandler
195 .word I2C1_ER_IRQHandler
198 .word SPI1_IRQHandler
200 .word USART1_IRQHandler
201 .word USART2_IRQHandler
202 .word USART3_IRQHandler
203 .word EXTI15_10_IRQHandler
204 .word RTC_Alarm_IRQHandler
217 .word TIM6_DAC1_IRQHandler
218 .word TIM7_DAC2_IRQHandler
227 .word COMP2_IRQHandler
228 .word COMP4_6_IRQHandler
230 .word HRTIM1_Master_IRQHandler
231 .word HRTIM1_TIMA_IRQHandler
232 .word HRTIM1_TIMB_IRQHandler
233 .word HRTIM1_TIMC_IRQHandler
234 .word HRTIM1_TIMD_IRQHandler
235 .word HRTIM1_TIME_IRQHandler
236 .word HRTIM1_FLT_IRQHandler
246 /*******************************************************************************
248 * Provide weak aliases for each Exception handler to the Default_Handler.
249 * As they are weak aliases, any function with the same name will override
252 *******************************************************************************/
255 .thumb_set NMI_Handler,Default_Handler
257 .weak HardFault_Handler
258 .thumb_set HardFault_Handler,Default_Handler
260 .weak MemManage_Handler
261 .thumb_set MemManage_Handler,Default_Handler
263 .weak BusFault_Handler
264 .thumb_set BusFault_Handler,Default_Handler
266 .weak UsageFault_Handler
267 .thumb_set UsageFault_Handler,Default_Handler
270 .thumb_set SVC_Handler,Default_Handler
272 .weak DebugMon_Handler
273 .thumb_set DebugMon_Handler,Default_Handler
276 .thumb_set PendSV_Handler,Default_Handler
278 .weak SysTick_Handler
279 .thumb_set SysTick_Handler,Default_Handler
281 .weak WWDG_IRQHandler
282 .thumb_set WWDG_IRQHandler,Default_Handler
285 .thumb_set PVD_IRQHandler,Default_Handler
287 .weak TAMP_STAMP_IRQHandler
288 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
290 .weak RTC_WKUP_IRQHandler
291 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
293 .weak FLASH_IRQHandler
294 .thumb_set FLASH_IRQHandler,Default_Handler
297 .thumb_set RCC_IRQHandler,Default_Handler
299 .weak EXTI0_IRQHandler
300 .thumb_set EXTI0_IRQHandler,Default_Handler
302 .weak EXTI1_IRQHandler
303 .thumb_set EXTI1_IRQHandler,Default_Handler
305 .weak EXTI2_TSC_IRQHandler
306 .thumb_set EXTI2_TSC_IRQHandler,Default_Handler
308 .weak EXTI3_IRQHandler
309 .thumb_set EXTI3_IRQHandler,Default_Handler
311 .weak EXTI4_IRQHandler
312 .thumb_set EXTI4_IRQHandler,Default_Handler
314 .weak DMA1_Channel1_IRQHandler
315 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
317 .weak DMA1_Channel2_IRQHandler
318 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
320 .weak DMA1_Channel3_IRQHandler
321 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
323 .weak DMA1_Channel4_IRQHandler
324 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
326 .weak DMA1_Channel5_IRQHandler
327 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
329 .weak DMA1_Channel6_IRQHandler
330 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
332 .weak DMA1_Channel7_IRQHandler
333 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
335 .weak ADC1_2_IRQHandler
336 .thumb_set ADC1_2_IRQHandler,Default_Handler
338 .weak CAN_TX_IRQHandler
339 .thumb_set CAN_TX_IRQHandler,Default_Handler
341 .weak CAN_RX0_IRQHandler
342 .thumb_set CAN_RX0_IRQHandler,Default_Handler
344 .weak CAN_RX1_IRQHandler
345 .thumb_set CAN_RX1_IRQHandler,Default_Handler
347 .weak CAN_SCE_IRQHandler
348 .thumb_set CAN_SCE_IRQHandler,Default_Handler
350 .weak EXTI9_5_IRQHandler
351 .thumb_set EXTI9_5_IRQHandler,Default_Handler
353 .weak TIM1_BRK_TIM15_IRQHandler
354 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
356 .weak TIM1_UP_TIM16_IRQHandler
357 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
359 .weak TIM1_TRG_COM_TIM17_IRQHandler
360 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
362 .weak TIM1_CC_IRQHandler
363 .thumb_set TIM1_CC_IRQHandler,Default_Handler
365 .weak TIM2_IRQHandler
366 .thumb_set TIM2_IRQHandler,Default_Handler
368 .weak TIM3_IRQHandler
369 .thumb_set TIM3_IRQHandler,Default_Handler
371 .weak I2C1_EV_IRQHandler
372 .thumb_set I2C1_EV_IRQHandler,Default_Handler
374 .weak I2C1_ER_IRQHandler
375 .thumb_set I2C1_ER_IRQHandler,Default_Handler
377 .weak SPI1_IRQHandler
378 .thumb_set SPI1_IRQHandler,Default_Handler
380 .weak USART1_IRQHandler
381 .thumb_set USART1_IRQHandler,Default_Handler
383 .weak USART2_IRQHandler
384 .thumb_set USART2_IRQHandler,Default_Handler
386 .weak USART3_IRQHandler
387 .thumb_set USART3_IRQHandler,Default_Handler
389 .weak EXTI15_10_IRQHandler
390 .thumb_set EXTI15_10_IRQHandler,Default_Handler
392 .weak RTC_Alarm_IRQHandler
393 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
395 .weak TIM6_DAC1_IRQHandler
396 .thumb_set TIM6_DAC1_IRQHandler,Default_Handler
398 .weak TIM7_DAC2_IRQHandler
399 .thumb_set TIM7_DAC2_IRQHandler,Default_Handler
401 .weak COMP2_IRQHandler
402 .thumb_set COMP2_IRQHandler,Default_Handler
404 .weak COMP4_6_IRQHandler
405 .thumb_set COMP4_6_IRQHandler,Default_Handler
407 .weak HRTIM1_Master_IRQHandler
408 .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
410 .weak HRTIM1_TIMA_IRQHandler
411 .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
413 .weak HRTIM1_TIMB_IRQHandler
414 .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
416 .weak HRTIM1_TIMC_IRQHandler
417 .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
419 .weak HRTIM1_TIMD_IRQHandler
420 .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
422 .weak HRTIM1_TIME_IRQHandler
423 .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
425 .weak HRTIM1_FLT_IRQHandler
426 .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
429 .thumb_set FPU_IRQHandler,Default_Handler
430 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/