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1 /**
2 ******************************************************************************
3 * @file stm32f3xx_hal_cortex.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 12-Sept-2014
7 * @brief CORTEX HAL module driver.
8 *
9 * This file provides firmware functions to manage the following
10 * functionalities of the CORTEX:
11 * + Initialization/de-initialization functions
12 * + Peripheral Control functions
13 *
14 * @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18
19 [..]
20 *** How to configure Interrupts using Cortex HAL driver ***
21 ===========================================================
22 [..]
23 This section provide functions allowing to configure the NVIC interrupts (IRQ).
24 The Cortex-M4 exceptions are managed by CMSIS functions.
25
26 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
27 function according to the following table.
28
29 @brief CORTEX_NVIC_Priority_Table
30 The table below gives the allowed values of the pre-emption priority and subpriority according
31 to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function
32 ==========================================================================================================================
33 NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
34 ==========================================================================================================================
35 NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bits for pre-emption priority
36 | | | 4 bits for subpriority
37 --------------------------------------------------------------------------------------------------------------------------
38 NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
39 | | | 3 bits for subpriority
40 --------------------------------------------------------------------------------------------------------------------------
41 NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
42 | | | 2 bits for subpriority
43 --------------------------------------------------------------------------------------------------------------------------
44 NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
45 | | | 1 bits for subpriority
46 --------------------------------------------------------------------------------------------------------------------------
47 NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority
48 | | | 0 bits for subpriority
49 ==========================================================================================================================
50 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
51
52 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
53
54
55 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible.
56 The pending IRQ priority will be managed only by the sub priority.
57
58 -@- IRQ priority order (sorted by highest to lowest priority):
59 (+@) Lowest pre-emption priority
60 (+@) Lowest sub priority
61 (+@) Lowest hardware priority (IRQ number)
62
63 [..]
64 *** How to configure Systick using Cortex HAL driver ***
65 ========================================================
66 [..]
67 Setup SysTick Timer for time base.
68
69 (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
70 is a CMSIS function that:
71 (++) Configures the SysTick Reload register with value passed as function parameter.
72 (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
73 (++) Resets the SysTick Counter register.
74 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
75 (++) Enables the SysTick Interrupt.
76 (++) Starts the SysTick Counter.
77
78 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
79 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
80 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
81 inside the stm32f3xx_hal_cortex.h file.
82
83 (+) You can change the SysTick IRQ priority by calling the
84 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
85 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
86
87 (+) To adjust the SysTick time base, use the following formula:
88
89 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
90 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
91 (++) Reload Value should not exceed 0xFFFFFF
92
93 @endverbatim
94 ******************************************************************************
95 * @attention
96 *
97 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
98 *
99 * Redistribution and use in source and binary forms, with or without modification,
100 * are permitted provided that the following conditions are met:
101 * 1. Redistributions of source code must retain the above copyright notice,
102 * this list of conditions and the following disclaimer.
103 * 2. Redistributions in binary form must reproduce the above copyright notice,
104 * this list of conditions and the following disclaimer in the documentation
105 * and/or other materials provided with the distribution.
106 * 3. Neither the name of STMicroelectronics nor the names of its contributors
107 * may be used to endorse or promote products derived from this software
108 * without specific prior written permission.
109 *
110 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
111 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
112 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
113 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
114 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
115 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
116 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
117 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
118 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
119 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
120 *
121 ******************************************************************************
122 */
123
124 /* Includes ------------------------------------------------------------------*/
125 #include "stm32f3xx_hal.h"
126
127 /** @addtogroup STM32F3xx_HAL_Driver
128 * @{
129 */
130
131 /** @defgroup CORTEX CORTEX HAL module driver
132 * @brief CORTEX HAL module driver
133 * @{
134 */
135
136 #ifdef HAL_CORTEX_MODULE_ENABLED
137
138 /* Private typedef -----------------------------------------------------------*/
139 /* Private define ------------------------------------------------------------*/
140 /* Private macro -------------------------------------------------------------*/
141 /* Private variables ---------------------------------------------------------*/
142 /* Private function prototypes -----------------------------------------------*/
143 /* Exported functions --------------------------------------------------------*/
144
145 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
146 * @{
147 */
148
149
150 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
151 * @brief Initialization and Configuration functions
152 *
153 @verbatim
154 ==============================================================================
155 ##### Initialization and de-initialization functions #####
156 ==============================================================================
157 [..]
158 This section provide the Cortex HAL driver functions allowing to configure Interrupts
159 Systick functionalities
160
161 @endverbatim
162 * @{
163 */
164
165
166 /**
167 * @brief Sets the priority grouping field (pre-emption priority and subpriority)
168 * using the required unlock sequence.
169 * @param PriorityGroup: The priority grouping bits length.
170 * This parameter can be one of the following values:
171 * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
172 * 4 bits for subpriority
173 * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
174 * 3 bits for subpriority
175 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
176 * 2 bits for subpriority
177 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
178 * 1 bits for subpriority
179 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
180 * 0 bits for subpriority
181 * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
182 * The pending IRQ priority will be managed only by the subpriority.
183 * @retval None
184 */
185 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
186 {
187 /* Check the parameters */
188 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
189
190 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
191 NVIC_SetPriorityGrouping(PriorityGroup);
192 }
193
194 /**
195 * @brief Sets the priority of an interrupt.
196 * @param IRQn: External interrupt number
197 * This parameter can be an enumerator of IRQn_Type enumeration
198 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
199 * @param PreemptPriority: The pre-emption priority for the IRQn channel.
200 * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table
201 * A lower priority value indicates a higher priority
202 * @param SubPriority: the subpriority level for the IRQ channel.
203 * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table
204 * A lower priority value indicates a higher priority.
205 * @retval None
206 */
207 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
208 {
209 uint32_t prioritygroup = 0x00;
210
211 /* Check the parameters */
212 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
213 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
214
215 prioritygroup = NVIC_GetPriorityGrouping();
216
217 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
218 }
219
220 /**
221 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
222 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
223 * function should be called before.
224 * @param IRQn External interrupt number
225 * This parameter can be an enumerator of IRQn_Type enumeration
226 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
227 * @retval None
228 */
229 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
230 {
231 /* Enable interrupt */
232 NVIC_EnableIRQ(IRQn);
233 }
234
235 /**
236 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
237 * @param IRQn External interrupt number
238 * This parameter can be an enumerator of IRQn_Type enumeration
239 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
240 * @retval None
241 */
242 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
243 {
244 /* Disable interrupt */
245 NVIC_DisableIRQ(IRQn);
246 }
247
248 /**
249 * @brief Initiates a system reset request to reset the MCU.
250 * @retval None
251 */
252 void HAL_NVIC_SystemReset(void)
253 {
254 /* System Reset */
255 NVIC_SystemReset();
256 }
257
258 /**
259 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
260 * Counter is in free running mode to generate periodic interrupts.
261 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
262 * @retval status: - 0 Function succeeded.
263 * - 1 Function failed.
264 */
265 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
266 {
267 return SysTick_Config(TicksNumb);
268 }
269 /**
270 * @}
271 */
272
273 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
274 * @brief Cortex control functions
275 *
276 @verbatim
277 ==============================================================================
278 ##### Peripheral Control functions #####
279 ==============================================================================
280 [..]
281 This subsection provides a set of functions allowing to control the CORTEX
282 (NVIC, SYSTICK) functionalities.
283
284
285 @endverbatim
286 * @{
287 */
288
289 /**
290 * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
291 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
292 */
293 uint32_t HAL_NVIC_GetPriorityGrouping(void)
294 {
295 /* Get the PRIGROUP[10:8] field value */
296 return NVIC_GetPriorityGrouping();
297 }
298
299 /**
300 * @brief Gets the priority of an interrupt.
301 * @param IRQn: External interrupt number
302 * This parameter can be an enumerator of IRQn_Type enumeration
303 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
304 * @param PriorityGroup: the priority grouping bits length.
305 * This parameter can be one of the following values:
306 * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
307 * 4 bits for subpriority
308 * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
309 * 3 bits for subpriority
310 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
311 * 2 bits for subpriority
312 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
313 * 1 bits for subpriority
314 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
315 * 0 bits for subpriority
316 * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
317 * @param pSubPriority: Pointer on the Subpriority value (starting from 0).
318 * @retval None
319 */
320 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
321 {
322 /* Check the parameters */
323 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
324 /* Get priority for Cortex-M system or device specific interrupts */
325 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
326 }
327
328 /**
329 * @brief Sets Pending bit of an external interrupt.
330 * @param IRQn External interrupt number
331 * This parameter can be an enumerator of IRQn_Type enumeration
332 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
333 * @retval None
334 */
335 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
336 {
337 /* Set interrupt pending */
338 NVIC_SetPendingIRQ(IRQn);
339 }
340
341 /**
342 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
343 * and returns the pending bit for the specified interrupt).
344 * @param IRQn External interrupt number
345 * This parameter can be an enumerator of IRQn_Type enumeration
346 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
347 * @retval status: - 0 Interrupt status is not pending.
348 * - 1 Interrupt status is pending.
349 */
350 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
351 {
352 /* Return 1 if pending else 0 */
353 return NVIC_GetPendingIRQ(IRQn);
354 }
355
356 /**
357 * @brief Clears the pending bit of an external interrupt.
358 * @param IRQn External interrupt number
359 * This parameter can be an enumerator of IRQn_Type enumeration
360 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
361 * @retval None
362 */
363 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
364 {
365 /* Clear pending interrupt */
366 NVIC_ClearPendingIRQ(IRQn);
367 }
368
369 /**
370 * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
371 * @param IRQn External interrupt number
372 * This parameter can be an enumerator of IRQn_Type enumeration
373 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
374 * @retval status: - 0 Interrupt status is not pending.
375 * - 1 Interrupt status is pending.
376 */
377 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
378 {
379 /* Return 1 if active else 0 */
380 return NVIC_GetActive(IRQn);
381 }
382
383 /**
384 * @brief Configures the SysTick clock source.
385 * @param CLKSource: specifies the SysTick clock source.
386 * This parameter can be one of the following values:
387 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
388 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
389 * @retval None
390 */
391 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
392 {
393 /* Check the parameters */
394 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
395 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
396 {
397 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
398 }
399 else
400 {
401 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
402 }
403 }
404
405 /**
406 * @brief This function handles SYSTICK interrupt request.
407 * @retval None
408 */
409 void HAL_SYSTICK_IRQHandler(void)
410 {
411 HAL_SYSTICK_Callback();
412 }
413
414 /**
415 * @brief SYSTICK callback.
416 * @retval None
417 */
418 __weak void HAL_SYSTICK_Callback(void)
419 {
420 /* NOTE : This function Should not be modified, when the callback is needed,
421 the HAL_SYSTICK_Callback could be implemented in the user file
422 */
423 }
424
425 /**
426 * @}
427 */
428
429 /**
430 * @}
431 */
432
433 #endif /* HAL_CORTEX_MODULE_ENABLED */
434 /**
435 * @}
436 */
437
438 /**
439 * @}
440 */
441
442 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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