tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_nor.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    12-Sept-2014
   7   * @brief   NOR HAL module driver.
   8   *          This file provides a generic firmware to drive NOR memories mounted
   9   *          as external device.
  10   *
  11   @verbatim
  12   ==============================================================================
  13                      ##### How to use this driver #####
  14   ==============================================================================
  15     [..]
  16       This driver is a generic layered driver which contains a set of APIs used to
  17       control NOR flash memories. It uses the FMC layer functions to interface
  18       with NOR devices. This driver is used as follows:
  19
  20       (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
  21           with control and timing parameters for both normal and extended mode.
  22
  23       (+) Read NOR flash memory manufacturer code and device IDs using the function
  24           HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
  25           structure declared by the function caller.
  26
  27       (+) Access NOR flash memory by read/write data unit operations using the functions
  28           HAL_NOR_Read(), HAL_NOR_Program().
  29
  30       (+) Perform NOR flash erase block/chip operations using the functions
  31           HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
  32
  33       (+) Read the NOR flash CFI (common flash interface) IDs using the function
  34           HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
  35           structure declared by the function caller.
  36
  37       (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
  38           HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
  39
  40       (+) You can monitor the NOR device HAL state by calling the function
  41           HAL_NOR_GetState()
  42     [..]
  43      (@) This driver is a set of generic APIs which handle standard NOR flash operations.
  44          If a NOR flash device contains different operations and/or implementations,
  45          it should be implemented separately.
  46
  47      *** NOR HAL driver macros list ***
  48      =============================================
  49      [..]
  50        Below the list of most used macros in NOR HAL driver.
  51
  52       (+) __NOR_WRITE : NOR memory write data to specified address
  53
  54   @endverbatim
  55   ******************************************************************************
  56   * @attention
  57   *
  58   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  59   *
  60   * Redistribution and use in source and binary forms, with or without modification,
  61   * are permitted provided that the following conditions are met:
  62   *   1. Redistributions of source code must retain the above copyright notice,
  63   *      this list of conditions and the following disclaimer.
  64   *   2. Redistributions in binary form must reproduce the above copyright notice,
  65   *      this list of conditions and the following disclaimer in the documentation
  66   *      and/or other materials provided with the distribution.
  67   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  68   *      may be used to endorse or promote products derived from this software
  69   *      without specific prior written permission.
  70   *
  71   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  72   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  73   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  75   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  76   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  77   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  78   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  79   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  80   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  81   *
  82   ******************************************************************************
  83   */
  84
  85 /* Includes ------------------------------------------------------------------*/
  86 #include "stm32f3xx_hal.h"
  87
  88 /** @addtogroup STM32F3xx_HAL_Driver
  89   * @{
  90   */
  91
  92 /** @defgroup NOR NOR HAL module driver
  93   * @brief NOR HAL module driver
  94   * @{
  95   */
  96 #ifdef HAL_NOR_MODULE_ENABLED
  97 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
  98
  99 /* Private typedef -----------------------------------------------------------*/
 100 /* Private define ------------------------------------------------------------*/
 101 /* Private macro -------------------------------------------------------------*/
 102 /* Private variables ---------------------------------------------------------*/
 103 /** @defgroup NOR_Private_Variables NOR Private Variables
 104  * @{
 105  */
 106 static uint32_t uwNORAddress            = NOR_MEMORY_ADRESS1;
 107 static uint32_t uwNORMememoryDataWidth  = NOR_MEMORY_8B;
 108 /**
 109   * @}
 110   */
 111
 112 /* Exported functions ---------------------------------------------------------*/
 113
 114 /** @defgroup NOR_Exported_Functions NOR Exported Functions
 115   * @{
 116   */
 117
 118 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
 119   * @brief    Initialization and Configuration functions
 120   *
 121   @verbatim
 122   ==============================================================================
 123            ##### NOR Initialization and de_initialization functions #####
 124   ==============================================================================
 125   [..]
 126     This section provides functions allowing to initialize/de-initialize
 127     the NOR memory
 128
 129 @endverbatim
 130   * @{
 131   */
 132
 133 /**
 134   * @brief  Perform the NOR memory Initialization sequence
 135   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 136   *                the configuration information for NOR module.
 137   * @param  Timing: pointer to NOR control timing structure
 138   * @param  ExtTiming: pointer to NOR extended mode timing structure
 139   * @retval HAL status
 140   */
 141 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
 142 {
 143   /* Check the NOR handle parameter */
 144   if(hnor == HAL_NULL)
 145   {
 146      return HAL_ERROR;
 147   }
 148
 149   if(hnor->State == HAL_NOR_STATE_RESET)
 150   {
 151     /* Initialize the low level hardware (MSP) */
 152     HAL_NOR_MspInit(hnor);
 153   }
 154
 155   /* Initialize NOR control Interface */
 156   FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
 157
 158   /* Initialize NOR timing Interface */
 159   FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
 160
 161   /* Initialize NOR extended mode timing Interface */
 162   FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
 163
 164   /* Enable the NORSRAM device */
 165   __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
 166
 167   /* Initialize NOR address mapped by FMC */
 168   if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
 169   {
 170     uwNORAddress = NOR_MEMORY_ADRESS1;
 171   }
 172   else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
 173   {
 174     uwNORAddress = NOR_MEMORY_ADRESS2;
 175   }
 176   else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
 177   {
 178     uwNORAddress = NOR_MEMORY_ADRESS3;
 179   }
 180   else
 181   {
 182     uwNORAddress = NOR_MEMORY_ADRESS4;
 183   }
 184
 185   /* Initialize NOR Memory Data Width*/
 186   if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8)
 187   {
 188     uwNORMememoryDataWidth = NOR_MEMORY_8B;
 189   }
 190   else
 191   {
 192     uwNORMememoryDataWidth = NOR_MEMORY_16B;
 193   }
 194
 195   /* Check the NOR controller state */
 196   hnor->State = HAL_NOR_STATE_READY;
 197
 198   return HAL_OK;
 199 }
 200
 201 /**
 202   * @brief  Perform NOR memory De-Initialization sequence
 203   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 204   *                the configuration information for NOR module.
 205   * @retval HAL status
 206   */
 207 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
 208 {
 209   /* De-Initialize the low level hardware (MSP) */
 210   HAL_NOR_MspDeInit(hnor);
 211
 212   /* Configure the NOR registers with their reset values */
 213   FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
 214
 215   /* Update the NOR controller state */
 216   hnor->State = HAL_NOR_STATE_RESET;
 217
 218   /* Release Lock */
 219   __HAL_UNLOCK(hnor);
 220
 221   return HAL_OK;
 222 }
 223
 224 /**
 225   * @brief  NOR MSP Init
 226   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 227   *                the configuration information for NOR module.
 228   * @retval None
 229   */
 230 __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
 231 {
 232   /* NOTE : This function Should not be modified, when the callback is needed,
 233             the HAL_NOR_MspInit could be implemented in the user file
 234    */
 235 }
 236
 237 /**
 238   * @brief  NOR MSP DeInit
 239   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 240   *                the configuration information for NOR module.
 241   * @retval None
 242   */
 243 __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
 244 {
 245   /* NOTE : This function Should not be modified, when the callback is needed,
 246             the HAL_NOR_MspDeInit could be implemented in the user file
 247    */
 248 }
 249
 250 /**
 251   * @brief  NOR BSP Wait fro Ready/Busy signal
 252   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 253   *                the configuration information for NOR module.
 254   * @param  Timeout: Maximum timeout value
 255   * @retval None
 256   */
 257 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
 258 {
 259   /* NOTE : This function Should not be modified, when the callback is needed,
 260             the HAL_NOR_BspWait could be implemented in the user file
 261    */
 262 }
 263
 264 /**
 265   * @}
 266   */
 267
 268 /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
 269   * @brief    Input Output and memory control functions
 270   *
 271   @verbatim
 272   ==============================================================================
 273                 ##### NOR Input and Output functions #####
 274   ==============================================================================
 275   [..]
 276     This section provides functions allowing to use and control the NOR memory
 277
 278 @endverbatim
 279   * @{
 280   */
 281
 282 /**
 283   * @brief  Read NOR flash IDs
 284   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 285   *                the configuration information for NOR module.
 286   * @param  pNOR_ID : pointer to NOR ID structure
 287   * @retval HAL status
 288   */
 289 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
 290 {
 291   /* Process Locked */
 292   __HAL_LOCK(hnor);
 293
 294   /* Check the NOR controller state */
 295   if(hnor->State == HAL_NOR_STATE_BUSY)
 296   {
 297      return HAL_BUSY;
 298   }
 299
 300   /* Update the NOR controller state */
 301   hnor->State = HAL_NOR_STATE_BUSY;
 302
 303   /* Send read ID command */
 304   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 305   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 306   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0090);
 307
 308   /* Read the NOR IDs */
 309   pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, MC_ADDRESS);
 310   pNOR_ID->Device_Code1      = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE1_ADDR);
 311   pNOR_ID->Device_Code2      = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE2_ADDR);
 312   pNOR_ID->Device_Code3      = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE3_ADDR);
 313
 314   /* Check the NOR controller state */
 315   hnor->State = HAL_NOR_STATE_READY;
 316
 317   /* Process unlocked */
 318   __HAL_UNLOCK(hnor);
 319
 320   return HAL_OK;
 321 }
 322
 323 /**
 324   * @brief  Returns the NOR memory to Read mode.
 325   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 326   *                the configuration information for NOR module.
 327   * @retval HAL status
 328   */
 329 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
 330 {
 331   /* Process Locked */
 332   __HAL_LOCK(hnor);
 333
 334   /* Check the NOR controller state */
 335   if(hnor->State == HAL_NOR_STATE_BUSY)
 336   {
 337      return HAL_BUSY;
 338   }
 339
 340   __NOR_WRITE(uwNORAddress, 0x00F0);
 341
 342   /* Check the NOR controller state */
 343   hnor->State = HAL_NOR_STATE_READY;
 344
 345   /* Process unlocked */
 346   __HAL_UNLOCK(hnor);
 347
 348   return HAL_OK;
 349 }
 350
 351 /**
 352   * @brief  Read data from NOR memory
 353   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 354   *                the configuration information for NOR module.
 355   * @param  pAddress: pointer to Device address
 356   * @param  pData : pointer to read data
 357   * @retval HAL status
 358   */
 359 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
 360 {
 361   /* Process Locked */
 362   __HAL_LOCK(hnor);
 363
 364   /* Check the NOR controller state */
 365   if(hnor->State == HAL_NOR_STATE_BUSY)
 366   {
 367      return HAL_BUSY;
 368   }
 369
 370   /* Update the NOR controller state */
 371   hnor->State = HAL_NOR_STATE_BUSY;
 372
 373   /* Send read data command */
 374   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x00555), 0x00AA);
 375   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x002AA), 0x0055);
 376   __NOR_WRITE(pAddress, 0x00F0);
 377
 378   /* Read the data */
 379   *pData = *(__IO uint32_t *)pAddress;
 380
 381   /* Check the NOR controller state */
 382   hnor->State = HAL_NOR_STATE_READY;
 383
 384   /* Process unlocked */
 385   __HAL_UNLOCK(hnor);
 386
 387   return HAL_OK;
 388 }
 389
 390 /**
 391   * @brief  Program data to NOR memory
 392   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 393   *                the configuration information for NOR module.
 394   * @param  pAddress: Device address
 395   * @param  pData : pointer to the data to write
 396   * @retval HAL status
 397   */
 398 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
 399 {
 400   /* Process Locked */
 401   __HAL_LOCK(hnor);
 402
 403   /* Check the NOR controller state */
 404   if(hnor->State == HAL_NOR_STATE_BUSY)
 405   {
 406      return HAL_BUSY;
 407   }
 408
 409   /* Update the NOR controller state */
 410   hnor->State = HAL_NOR_STATE_BUSY;
 411
 412   /* Send program data command */
 413   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 414   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 415   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00A0);
 416
 417   /* Write the data */
 418  __NOR_WRITE(pAddress, *pData);
 419
 420   /* Check the NOR controller state */
 421   hnor->State = HAL_NOR_STATE_READY;
 422
 423   /* Process unlocked */
 424   __HAL_UNLOCK(hnor);
 425
 426   return HAL_OK;
 427 }
 428
 429 /**
 430   * @brief  Reads a block of data from the FMC NOR memory.
 431   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 432   *                the configuration information for NOR module.
 433   * @param  uwAddress: NOR memory internal address to read from.
 434   * @param  pData: pointer to the buffer that receives the data read from the
 435   *         NOR memory.
 436   * @param  uwBufferSize : number of Half word to read.
 437   * @retval HAL status
 438   */
 439 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
 440 {
 441   /* Process Locked */
 442   __HAL_LOCK(hnor);
 443
 444   /* Check the NOR controller state */
 445   if(hnor->State == HAL_NOR_STATE_BUSY)
 446   {
 447      return HAL_BUSY;
 448   }
 449
 450   /* Update the NOR controller state */
 451   hnor->State = HAL_NOR_STATE_BUSY;
 452
 453   /* Send read data command */
 454   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x00555), 0x00AA);
 455   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x002AA), 0x0055);
 456   __NOR_WRITE(uwAddress, 0x00F0);
 457
 458   /* Read buffer */
 459   while( uwBufferSize > 0)
 460   {
 461     *pData++ = *(__IO uint16_t *)uwAddress;
 462     uwAddress += 2;
 463     uwBufferSize--;
 464   }
 465
 466   /* Check the NOR controller state */
 467   hnor->State = HAL_NOR_STATE_READY;
 468
 469   /* Process unlocked */
 470   __HAL_UNLOCK(hnor);
 471
 472   return HAL_OK;
 473 }
 474
 475 /**
 476   * @brief  Writes a half-word buffer to the FMC NOR memory. This function
 477   *         must be used only with S29GL128P NOR memory.
 478   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 479   *                the configuration information for NOR module.
 480   * @param  uwAddress: NOR memory internal address from which the data
 481   * @note   Some NOR memory need Address aligned to xx bytes (can be aligned to
 482   *          64 bytes boundary for example).
 483   * @param  pData: pointer to source data buffer.
 484   * @param  uwBufferSize: number of Half words to write.
 485   * @note   The maximum buffer size allowed is NOR memory dependent
 486   *         (can be 64 Bytes max for example).
 487   * @retval HAL status
 488   */
 489 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
 490 {
 491   uint16_t * p_currentaddress;
 492   uint16_t * p_endaddress;
 493   uint32_t lastloadedaddress = 0;
 494
 495   /* Process Locked */
 496   __HAL_LOCK(hnor);
 497
 498   /* Check the NOR controller state */
 499   if(hnor->State == HAL_NOR_STATE_BUSY)
 500   {
 501     return HAL_BUSY;
 502   }
 503
 504   /* Update the NOR controller state */
 505   hnor->State = HAL_NOR_STATE_BUSY;
 506
 507   /* Initialize variables */
 508   p_currentaddress  = (uint16_t*)((uint32_t)(uwAddress));
 509   p_endaddress      = p_currentaddress + (uwBufferSize-1);
 510   lastloadedaddress = (uint32_t)(uwAddress);
 511
 512   /* Issue unlock command sequence */
 513   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 514   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 515
 516   /* Write Buffer Load Command */
 517   __NOR_WRITE((uint32_t)(p_currentaddress), 0x25);
 518   __NOR_WRITE((uint32_t)(p_currentaddress), (uwBufferSize-1));
 519
 520   /* Load Data into NOR Buffer */
 521   while(p_currentaddress <= p_endaddress)
 522   {
 523     /* Store last loaded address & data value (for polling) */
 524     lastloadedaddress = (uint32_t)p_currentaddress;
 525
 526     __NOR_WRITE(p_currentaddress, *pData++);
 527
 528     p_currentaddress++;
 529   }
 530
 531   __NOR_WRITE((uint32_t)(lastloadedaddress), 0x29);
 532
 533   /* Check the NOR controller state */
 534   hnor->State = HAL_NOR_STATE_READY;
 535
 536   /* Process unlocked */
 537   __HAL_UNLOCK(hnor);
 538
 539   return HAL_OK;
 540
 541 }
 542
 543 /**
 544   * @brief  Erase the specified block of the NOR memory
 545   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 546   *                the configuration information for NOR module.
 547   * @param  BlockAddress : Block to erase address
 548   * @param  Address: Device address
 549   * @retval HAL status
 550   */
 551 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
 552 {
 553   /* Process Locked */
 554   __HAL_LOCK(hnor);
 555
 556   /* Check the NOR controller state */
 557   if(hnor->State == HAL_NOR_STATE_BUSY)
 558   {
 559      return HAL_BUSY;
 560   }
 561
 562   /* Update the NOR controller state */
 563   hnor->State = HAL_NOR_STATE_BUSY;
 564
 565   /* Send block erase command sequence */
 566   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 567   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 568   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0080);
 569   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 570   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 571   __NOR_WRITE((uint32_t)(BlockAddress + Address), 0x30);
 572
 573   /* Check the NOR memory status and update the controller state */
 574   hnor->State = HAL_NOR_STATE_READY;
 575
 576   /* Process unlocked */
 577   __HAL_UNLOCK(hnor);
 578
 579   return HAL_OK;
 580
 581 }
 582
 583 /**
 584   * @brief  Erase the entire NOR chip.
 585   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 586   *                the configuration information for NOR module.
 587   * @param  Address : Device address
 588   * @retval HAL status
 589   */
 590 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
 591 {
 592   /* Process Locked */
 593   __HAL_LOCK(hnor);
 594
 595   /* Check the NOR controller state */
 596   if(hnor->State == HAL_NOR_STATE_BUSY)
 597   {
 598      return HAL_BUSY;
 599   }
 600
 601   /* Update the NOR controller state */
 602   hnor->State = HAL_NOR_STATE_BUSY;
 603
 604   /* Send NOR chip erase command sequence */
 605   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 606   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 607   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0080);
 608   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA);
 609   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055);
 610   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0010);
 611
 612   /* Check the NOR memory status and update the controller state */
 613   hnor->State = HAL_NOR_STATE_READY;
 614
 615   /* Process unlocked */
 616   __HAL_UNLOCK(hnor);
 617
 618   return HAL_OK;
 619 }
 620
 621 /**
 622   * @brief  Read NOR flash CFI IDs
 623   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 624   *                the configuration information for NOR module.
 625   * @param  pNOR_CFI : pointer to NOR CFI IDs structure
 626   * @retval HAL status
 627   */
 628 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
 629 {
 630   /* Process Locked */
 631   __HAL_LOCK(hnor);
 632
 633   /* Check the NOR controller state */
 634   if(hnor->State == HAL_NOR_STATE_BUSY)
 635   {
 636      return HAL_BUSY;
 637   }
 638
 639   /* Update the NOR controller state */
 640   hnor->State = HAL_NOR_STATE_BUSY;
 641
 642   /* Send read CFI query command */
 643   __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0055), 0x0098);
 644
 645   /* read the NOR CFI information */
 646   pNOR_CFI->CFI_1 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI1_ADDRESS);
 647   pNOR_CFI->CFI_2 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI2_ADDRESS);
 648   pNOR_CFI->CFI_3 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI3_ADDRESS);
 649   pNOR_CFI->CFI_4 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI4_ADDRESS);
 650
 651   /* Check the NOR controller state */
 652   hnor->State = HAL_NOR_STATE_READY;
 653
 654   /* Process unlocked */
 655   __HAL_UNLOCK(hnor);
 656
 657   return HAL_OK;
 658 }
 659
 660 /**
 661   * @}
 662   */
 663
 664 /** @defgroup NOR_Exported_Functions_Group3 Peripheral Control functions
 665  *  @brief   management functions
 666  *
 667 @verbatim
 668   ==============================================================================
 669                         ##### NOR Control functions #####
 670   ==============================================================================
 671   [..]
 672     This subsection provides a set of functions allowing to control dynamically
 673     the NOR interface.
 674
 675 @endverbatim
 676   * @{
 677   */
 678
 679 /**
 680   * @brief  Enables dynamically NOR write operation.
 681   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 682   *                the configuration information for NOR module.
 683   * @retval HAL status
 684   */
 685 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
 686 {
 687   /* Process Locked */
 688   __HAL_LOCK(hnor);
 689
 690   /* Enable write operation */
 691   FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
 692
 693   /* Update the NOR controller state */
 694   hnor->State = HAL_NOR_STATE_READY;
 695
 696   /* Process unlocked */
 697   __HAL_UNLOCK(hnor);
 698
 699   return HAL_OK;
 700 }
 701
 702 /**
 703   * @brief  Disables dynamically NOR write operation.
 704   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 705   *                the configuration information for NOR module.
 706   * @retval HAL status
 707   */
 708 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
 709 {
 710   /* Process Locked */
 711   __HAL_LOCK(hnor);
 712
 713   /* Update the SRAM controller state */
 714   hnor->State = HAL_NOR_STATE_BUSY;
 715
 716   /* Disable write operation */
 717   FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
 718
 719   /* Update the NOR controller state */
 720   hnor->State = HAL_NOR_STATE_PROTECTED;
 721
 722   /* Process unlocked */
 723   __HAL_UNLOCK(hnor);
 724
 725   return HAL_OK;
 726 }
 727
 728 /**
 729   * @}
 730   */
 731
 732 /** @defgroup NOR_Exported_Functions_Group4 Peripheral State functions
 733  *  @brief   Peripheral State functions
 734  *
 735 @verbatim
 736   ==============================================================================
 737                       ##### NOR State functions #####
 738   ==============================================================================
 739   [..]
 740     This subsection permits to get in run-time the status of the NOR controller
 741     and the data flow.
 742
 743 @endverbatim
 744   * @{
 745   */
 746
 747 /**
 748   * @brief  return the NOR controller state
 749   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 750   *                the configuration information for NOR module.
 751   * @retval NOR controller state
 752   */
 753 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
 754 {
 755   return hnor->State;
 756 }
 757
 758 /**
 759   * @brief  Returns the NOR operation status.
 760   * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
 761   *                the configuration information for NOR module.
 762   * @param  Address: Device address
 763   * @param  Timeout: NOR progamming Timeout
 764   * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
 765   *         or NOR_TIMEOUT
 766   */
 767 NOR_StatusTypedef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
 768 {
 769   NOR_StatusTypedef status = NOR_ONGOING;
 770   uint16_t tmpSR1 = 0, tmpSR2 = 0;
 771   uint32_t timeout = 0;
 772
 773   /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
 774   HAL_NOR_MspWait(hnor, timeout);
 775
 776   /* Get the NOR memory operation status -------------------------------------*/
 777   while(status != NOR_SUCCESS)
 778   {
 779     /* Check for timeout value */
 780     timeout = HAL_GetTick() + Timeout;
 781
 782     if(HAL_GetTick() >= timeout)
 783     {
 784       status = NOR_TIMEOUT;
 785     }
 786
 787     /* Read NOR status register (DQ6 and DQ5) */
 788     tmpSR1 = *(__IO uint16_t *)Address;
 789     tmpSR2 = *(__IO uint16_t *)Address;
 790
 791     /* If DQ6 did not toggle between the two reads then return NOR_Success */
 792     if((tmpSR1 & 0x0040) == (tmpSR2 & 0x0040))
 793     {
 794       return NOR_SUCCESS;
 795     }
 796
 797     if((tmpSR1 & 0x0020) == 0x0020)
 798     {
 799       return NOR_ONGOING;
 800     }
 801
 802     tmpSR1 = *(__IO uint16_t *)Address;
 803     tmpSR2 = *(__IO uint16_t *)Address;
 804
 805     /* If DQ6 did not toggle between the two reads then return NOR_Success */
 806     if((tmpSR1 & 0x0040) == (tmpSR2 & 0x0040))
 807     {
 808       return NOR_SUCCESS;
 809     }
 810
 811     if((tmpSR1 & 0x0020) == 0x0020)
 812     {
 813       return NOR_ERROR;
 814     }
 815   }
 816
 817   /* Return the operation status */
 818   return status;
 819 }
 820
 821 /**
 822   * @}
 823   */
 824
 825 /**
 826   * @}
 827   */
 828 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
 829 #endif /* HAL_NOR_MODULE_ENABLED */
 830 /**
 831   * @}
 832   */
 833
 834 /**
 835   * @}
 836   */
 837
 838 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/