tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    12-Sept-2014
   7   * @brief   Header file of PWR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F3xx_HAL_PWR_H
  40 #define __STM32F3xx_HAL_PWR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f3xx_hal_def.h"
  48
  49 /** @addtogroup STM32F3xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup PWR PWR HAL Driver module
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /* Exported constants --------------------------------------------------------*/
  59 /** @defgroup PWR_Alias_Exported_Constants PWR Alias Exported Constants
  60   * @{
  61   */
  62 /* ------------- PWR registers bit address in the alias region ---------------*/
  63 #define PWR_OFFSET               (PWR_BASE - PERIPH_BASE)
  64
  65 /* --- CR Register ---*/
  66 #define CR_OFFSET                (PWR_OFFSET + 0x00)
  67 /* Alias word address of DBP bit */
  68 #define DBP_BitNumber            POSITION_VAL(PWR_CR_DBP)
  69 #define CR_DBP_BB                (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
  70
  71 /* Alias word address of PVDE bit */
  72 #define PVDE_BitNumber           POSITION_VAL(PWR_CR_PVDE)
  73 #define CR_PVDE_BB               (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
  74
  75 /* --- CSR Register ---*/
  76 #define CSR_OFFSET               (PWR_OFFSET + 0x04)
  77 /* Alias word address of EWUP1 bit */
  78 #define EWUP1_BitNumber          POSITION_VAL(PWR_CSR_EWUP1)
  79 #define CSR_EWUP1_BB             (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP1_BitNumber * 4))
  80
  81 /* Alias word address of EWUP2 bit */
  82 #define EWUP2_BitNumber          POSITION_VAL(PWR_CSR_EWUP2)
  83 #define CSR_EWUP2_BB             (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP2_BitNumber * 4))
  84
  85 /* Alias word address of EWUP3 bit */
  86 #define EWUP3_BitNumber          POSITION_VAL(PWR_CSR_EWUP3)
  87 #define CSR_EWUP3_BB             (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP3_BitNumber * 4))
  88 /**
  89   * @}
  90   */
  91
  92 /** @defgroup PWR_Exported_Constants PWR Exported Constants
  93   * @{
  94   */
  95
  96 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
  97   * @{
  98   */
  99
 100 #define PWR_WAKEUP_PIN1                 ((uint32_t)0x00)
 101 #define PWR_WAKEUP_PIN2                 ((uint32_t)0x01)
 102 #define PWR_WAKEUP_PIN3                 ((uint32_t)0x02)
 103 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
 104                                 ((PIN) == PWR_WAKEUP_PIN2) || \
 105                                 ((PIN) == PWR_WAKEUP_PIN3))
 106 /**
 107   * @}
 108   */
 109
 110 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode
 111   * @{
 112   */
 113 #define PWR_MAINREGULATOR_ON                        ((uint32_t)0x00000000)
 114 #define PWR_LOWPOWERREGULATOR_ON                    PWR_CR_LPDS
 115
 116 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 117                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 118 /**
 119   * @}
 120   */
 121
 122 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
 123   * @{
 124   */
 125 #define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01)
 126 #define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02)
 127 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 128 /**
 129   * @}
 130   */
 131
 132 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
 133   * @{
 134   */
 135 #define PWR_STOPENTRY_WFI               ((uint8_t)0x01)
 136 #define PWR_STOPENTRY_WFE               ((uint8_t)0x02)
 137 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
 138 /**
 139   * @}
 140   */
 141
 142 /** @defgroup PWR_Flag PWR Flag
 143   * @{
 144   */
 145 #define PWR_FLAG_WU                     PWR_CSR_WUF
 146 #define PWR_FLAG_SB                     PWR_CSR_SBF
 147 #define PWR_FLAG_PVDO                   PWR_CSR_PVDO
 148 #define PWR_FLAG_VREFINTRDY             PWR_CSR_VREFINTRDYF
 149 #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
 150                                ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY))
 151
 152
 153 /**
 154   * @}
 155   */
 156
 157 /**
 158   * @}
 159   */
 160
 161 /* Exported macro ------------------------------------------------------------*/
 162 /** @defgroup PWR_Exported_Macro PWR Exported Macro
 163   * @{
 164   */
 165
 166 /** @brief  Check PWR flag is set or not.
 167   * @param  __FLAG__: specifies the flag to check.
 168   *           This parameter can be one of the following values:
 169   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 170   *                  was received from the WKUP pin or from the RTC alarm (Alarm A
 171   *                  or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
 172   *                  An additional wakeup event is detected if the WKUP pin is enabled
 173   *                  (by setting the EWUP bit) when the WKUP pin level is already high.
 174   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 175   *                  resumed from StandBy mode.
 176   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 177   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
 178   *                  For this reason, this bit is equal to 0 after Standby or reset
 179   *                  until the PVDE bit is set.
 180   *            @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference
 181   *                  voltage VREFINT is ready.
 182   * @retval The new state of __FLAG__ (TRUE or FALSE).
 183   */
 184 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 185
 186 /** @brief  Clear the PWR's pending flags.
 187   * @param  __FLAG__: specifies the flag to clear.
 188   *          This parameter can be one of the following values:
 189   *            @arg PWR_FLAG_WU: Wake Up flag
 190   *            @arg PWR_FLAG_SB: StandBy flag
 191   */
 192 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |=  (__FLAG__) << 2)
 193
 194 /**
 195   * @}
 196   */
 197
 198 /* Include PWR HAL Extended module */
 199 #include "stm32f3xx_hal_pwr_ex.h"
 200
 201 /* Exported functions --------------------------------------------------------*/
 202
 203 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
 204   * @{
 205   */
 206
 207 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
 208   * @{
 209   */
 210
 211 /* Initialization and de-initialization functions *****************************/
 212 void HAL_PWR_DeInit(void);
 213
 214 /**
 215   * @}
 216   */
 217
 218 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
 219   * @{
 220   */
 221
 222 /* Peripheral Control functions  **********************************************/
 223 void HAL_PWR_EnableBkUpAccess(void);
 224 void HAL_PWR_DisableBkUpAccess(void);
 225
 226 /* WakeUp pins configuration functions ****************************************/
 227 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
 228 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 229
 230 /* Low Power modes configuration functions ************************************/
 231 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 232 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 233 void HAL_PWR_EnterSTANDBYMode(void);
 234
 235 /**
 236   * @}
 237   */
 238
 239 /**
 240   * @}
 241   */
 242
 243 /**
 244   * @}
 245   */
 246
 247 /**
 248   * @}
 249   */
 250
 251 #ifdef __cplusplus
 252 }
 253 #endif
 254
 255
 256 #endif /* __STM32F3xx_HAL_PWR_H */
 257
 258 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/