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1 /**
2 ******************************************************************************
3 * @file stm32f3xx_hal_sram.h
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 12-Sept-2014
7 * @brief Header file of SRAM HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F3xx_HAL_SRAM_H
40 #define __STM32F3xx_HAL_SRAM_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
48 #include "stm32f3xx_ll_fmc.h"
49 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
50
51
52 /** @addtogroup STM32F3xx_HAL_Driver
53 * @{
54 */
55
56 /** @addtogroup SRAM
57 * @{
58 */
59
60 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
61
62 /* Exported typedef ----------------------------------------------------------*/
63
64 /** @defgroup SRAM_Exported_Types SRAM Exported Types
65 * @{
66 */
67 /**
68 * @brief HAL SRAM State structures definition
69 */
70 typedef enum
71 {
72 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
73 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
74 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
75 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
76 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
77
78 }HAL_SRAM_StateTypeDef;
79
80 /**
81 * @brief SRAM handle Structure definition
82 */
83 typedef struct
84 {
85 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
86
87 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
88
89 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
90
91 HAL_LockTypeDef Lock; /*!< SRAM locking object */
92
93 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
94
95 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
96
97 }SRAM_HandleTypeDef;
98
99 /**
100 * @}
101 */
102
103 /* Exported constants --------------------------------------------------------*/
104 /* Exported macro ------------------------------------------------------------*/
105
106 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
107 * @{
108 */
109
110 /** @brief Reset SRAM handle state
111 * @param __HANDLE__: SRAM handle
112 * @retval None
113 */
114 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
115
116 /**
117 * @}
118 */
119
120 /* Exported functions --------------------------------------------------------*/
121 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
122 * @{
123 */
124
125 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
126 * @{
127 */
128
129 /* Initialization/de-initialization functions ********************************/
130 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
131 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
132 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
133 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
134
135 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
136 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
137
138 /**
139 * @}
140 */
141
142 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
143 * @{
144 */
145
146 /* I/O operation functions ***************************************************/
147 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
148 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
149 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
150 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
151 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
152 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
153 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
154 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
155
156 /**
157 * @}
158 */
159
160 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
161 * @{
162 */
163
164 /* SRAM Control functions ****************************************************/
165 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
166 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
167
168 /**
169 * @}
170 */
171
172 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
173 * @{
174 */
175
176 /* SRAM Peripheral State functions ********************************************/
177 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
178
179 /**
180 * @}
181 */
182
183 /**
184 * @}
185 */
186
187 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
188 /**
189 * @}
190 */
191
192 /**
193 * @}
194 */
195
196 #ifdef __cplusplus
197 }
198 #endif
199
200 #endif /* __STM32F3xx_HAL_SRAM_H */
201
202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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