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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dac.h
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 19-June-2014
7 * @brief Header file of DAC HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_DAC_H
40 #define __STM32F4xx_HAL_DAC_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
47
48 /* Includes ------------------------------------------------------------------*/
49 #include "stm32f4xx_hal_def.h"
50
51 /** @addtogroup STM32F4xx_HAL_Driver
52 * @{
53 */
54
55 /** @addtogroup DAC
56 * @{
57 */
58
59 /* Exported types ------------------------------------------------------------*/
60
61 /**
62 * @brief HAL State structures definition
63 */
64 typedef enum
65 {
66 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
67 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
68 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
69 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
70 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
71 }HAL_DAC_StateTypeDef;
72
73 /**
74 * @brief DAC handle Structure definition
75 */
76 typedef struct
77 {
78 DAC_TypeDef *Instance; /*!< Register base address */
79
80 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
81
82 HAL_LockTypeDef Lock; /*!< DAC locking object */
83
84 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
85
86 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
87
88 __IO uint32_t ErrorCode; /*!< DAC Error code */
89
90 }DAC_HandleTypeDef;
91
92 /**
93 * @brief DAC Configuration regular Channel structure definition
94 */
95 typedef struct
96 {
97 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
98 This parameter can be a value of @ref DAC_trigger_selection */
99
100 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
101 This parameter can be a value of @ref DAC_output_buffer */
102 }DAC_ChannelConfTypeDef;
103
104 /* Exported constants --------------------------------------------------------*/
105
106 /** @defgroup DAC_Error_Code
107 * @{
108 */
109 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
110 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
111 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
112 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
113 /**
114 * @}
115 */
116
117 /** @defgroup DAC_trigger_selection
118 * @{
119 */
120
121 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
122 has been loaded, and not by external trigger */
123 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
124 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
125 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
126 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
127 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
128 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
129
130 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
131 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
132
133 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
134 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
135 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
136 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
137 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
138 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
139 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
140 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
141 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
142 /**
143 * @}
144 */
145
146 /** @defgroup DAC_output_buffer
147 * @{
148 */
149 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
151
152 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
153 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
154 /**
155 * @}
156 */
157
158 /** @defgroup DAC_Channel_selection
159 * @{
160 */
161 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
162 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
163
164 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
165 ((CHANNEL) == DAC_CHANNEL_2))
166 /**
167 * @}
168 */
169
170 /** @defgroup DAC_data_alignement
171 * @{
172 */
173 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
174 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
175 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
176
177 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
178 ((ALIGN) == DAC_ALIGN_12B_L) || \
179 ((ALIGN) == DAC_ALIGN_8B_R))
180 /**
181 * @}
182 */
183
184 /** @defgroup DAC_data
185 * @{
186 */
187 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
188 /**
189 * @}
190 */
191
192 /** @defgroup DAC_flags_definition
193 * @{
194 */
195 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
196 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
197
198 #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \
199 ((FLAG) == DAC_FLAG_DMAUDR2))
200 /**
201 * @}
202 */
203
204 /** @defgroup DAC_IT_definition
205 * @{
206 */
207 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
208 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
209
210 #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \
211 ((IT) == DAC_IT_DMAUDR2))
212 /**
213 * @}
214 */
215
216 /* Exported macro ------------------------------------------------------------*/
217
218 /** @brief Reset DAC handle state
219 * @param __HANDLE__: specifies the DAC handle.
220 * @retval None
221 */
222 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
223
224 /** @brief Enable the DAC channel
225 * @param __HANDLE__: specifies the DAC handle.
226 * @param __DAC_Channel__: specifies the DAC channel
227 * @retval None
228 */
229 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
230 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
231
232 /** @brief Disable the DAC channel
233 * @param __HANDLE__: specifies the DAC handle
234 * @param __DAC_Channel__: specifies the DAC channel.
235 * @retval None
236 */
237 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
238 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
239
240 /** @brief Set DHR12R1 alignment
241 * @param __ALIGNEMENT__: specifies the DAC alignement
242 * @retval None
243 */
244 #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__))
245
246 /** @brief Set DHR12R2 alignment
247 * @param __ALIGNEMENT__: specifies the DAC alignement
248 * @retval None
249 */
250 #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__))
251
252 /** @brief Set DHR12RD alignment
253 * @param __ALIGNEMENT__: specifies the DAC alignement
254 * @retval None
255 */
256 #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__))
257
258 /** @brief Enable the DAC interrupt
259 * @param __HANDLE__: specifies the DAC handle
260 * @param __INTERRUPT__: specifies the DAC interrupt.
261 * @retval None
262 */
263 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
264
265 /** @brief Disable the DAC interrupt
266 * @param __HANDLE__: specifies the DAC handle
267 * @param __INTERRUPT__: specifies the DAC interrupt.
268 * @retval None
269 */
270 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
271
272 /** @brief Get the selected DAC's flag status.
273 * @param __HANDLE__: specifies the DAC handle.
274 * @retval None
275 */
276 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
277
278 /** @brief Clear the DAC's flag.
279 * @param __HANDLE__: specifies the DAC handle.
280 * @retval None
281 */
282 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
283
284 /* Include DAC HAL Extension module */
285 #include "stm32f4xx_hal_dac_ex.h"
286
287 /* Exported functions --------------------------------------------------------*/
288 /* Initialization/de-initialization functions *********************************/
289 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
290 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
291 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
292 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
293
294 /* I/O operation functions ****************************************************/
295 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
296 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
297 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
298 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
299 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
300
301 /* Peripheral Control functions ***********************************************/
302 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
303 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
304
305 /* Peripheral State functions *************************************************/
306 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
307 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
308 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
309
310 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
311 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
312 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
313 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
314
315 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
316
317 /**
318 * @}
319 */
320
321 /**
322 * @}
323 */
324
325 #ifdef __cplusplus
326 }
327 #endif
328
329 #endif /*__STM32F4xx_HAL_DAC_H */
330
331 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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