tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_i2s.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of I2S HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_I2S_H
  40 #define __STM32F4xx_HAL_I2S_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f4xx_hal_def.h"
  48
  49 /** @addtogroup STM32F4xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup I2S
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /**
  59   * @brief I2S Init structure definition
  60   */
  61 typedef struct
  62 {
  63   uint32_t Mode;         /*!< Specifies the I2S operating mode.
  64                               This parameter can be a value of @ref I2S_Mode */
  65
  66   uint32_t Standard;     /*!< Specifies the standard used for the I2S communication.
  67                               This parameter can be a value of @ref I2S_Standard */
  68
  69   uint32_t DataFormat;   /*!< Specifies the data format for the I2S communication.
  70                               This parameter can be a value of @ref I2S_Data_Format */
  71
  72   uint32_t MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
  73                               This parameter can be a value of @ref I2S_MCLK_Output */
  74
  75   uint32_t AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
  76                               This parameter can be a value of @ref I2S_Audio_Frequency */
  77
  78   uint32_t CPOL;         /*!< Specifies the idle state of the I2S clock.
  79                               This parameter can be a value of @ref I2S_Clock_Polarity */
  80
  81   uint32_t ClockSource;  /*!< Specifies the I2S Clock Source.
  82                               This parameter can be a value of @ref I2S_Clock_Source */
  83
  84   uint32_t FullDuplexMode;  /*!< Specifies the I2S FullDuplex mode.
  85                                  This parameter can be a value of @ref I2S_FullDuplex_Mode */
  86
  87 }I2S_InitTypeDef;
  88
  89 /**
  90   * @brief  HAL State structures definition
  91   */
  92 typedef enum
  93 {
  94   HAL_I2S_STATE_RESET      = 0x00,  /*!< I2S not yet initialized or disabled                */
  95   HAL_I2S_STATE_READY      = 0x01,  /*!< I2S initialized and ready for use                  */
  96   HAL_I2S_STATE_BUSY       = 0x02,  /*!< I2S internal process is ongoing                    */
  97   HAL_I2S_STATE_BUSY_TX    = 0x12,  /*!< Data Transmission process is ongoing               */
  98   HAL_I2S_STATE_BUSY_RX    = 0x22,  /*!< Data Reception process is ongoing                  */
  99   HAL_I2S_STATE_BUSY_TX_RX = 0x32,  /*!< Data Transmission and Reception process is ongoing */
 100   HAL_I2S_STATE_TIMEOUT    = 0x03,  /*!< I2S timeout state                                  */
 101   HAL_I2S_STATE_ERROR      = 0x04   /*!< I2S error state                                    */
 102
 103 }HAL_I2S_StateTypeDef;
 104
 105 /**
 106   * @brief  HAL I2S Error Code structure definition
 107   */
 108 typedef enum
 109 {
 110   HAL_I2S_ERROR_NONE      = 0x00,    /*!< No error                    */
 111   HAL_I2S_ERROR_UDR       = 0x01,    /*!< I2S Underrun error          */
 112   HAL_I2S_ERROR_OVR       = 0x02,    /*!< I2S Overrun error           */
 113   HAL_I2SEX_ERROR_UDR     = 0x04,    /*!< I2S extended Underrun error */
 114   HAL_I2SEX_ERROR_OVR     = 0x08,    /*!< I2S extended Overrun error  */
 115   HAL_I2S_ERROR_FRE       = 0x10,    /*!< I2S Frame format error      */
 116   HAL_I2S_ERROR_DMA       = 0x20     /*!< DMA transfer error          */
 117 }HAL_I2S_ErrorTypeDef;
 118
 119 /**
 120   * @brief I2S handle Structure definition
 121   */
 122 typedef struct
 123 {
 124   SPI_TypeDef                *Instance;    /* I2S registers base address        */
 125
 126   I2S_InitTypeDef            Init;         /* I2S communication parameters      */
 127
 128   uint16_t                   *pTxBuffPtr;  /* Pointer to I2S Tx transfer buffer */
 129
 130   __IO uint16_t              TxXferSize;   /* I2S Tx transfer size              */
 131
 132   __IO uint16_t              TxXferCount;  /* I2S Tx transfer Counter           */
 133
 134   uint16_t                   *pRxBuffPtr;  /* Pointer to I2S Rx transfer buffer */
 135
 136   __IO uint16_t              RxXferSize;   /* I2S Rx transfer size              */
 137
 138   __IO uint16_t              RxXferCount;  /* I2S Rx transfer counter           */
 139
 140   DMA_HandleTypeDef          *hdmatx;      /* I2S Tx DMA handle parameters      */
 141
 142   DMA_HandleTypeDef          *hdmarx;      /* I2S Rx DMA handle parameters      */
 143
 144   __IO HAL_LockTypeDef       Lock;         /* I2S locking object                */
 145
 146   __IO HAL_I2S_StateTypeDef  State;        /* I2S communication state           */
 147
 148   __IO HAL_I2S_ErrorTypeDef  ErrorCode;    /* I2S Error code                    */
 149
 150 }I2S_HandleTypeDef;
 151
 152 /* Exported constants --------------------------------------------------------*/
 153
 154 /** @defgroup I2S_Exported_Constants
 155   * @{
 156   */
 157 #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
 158
 159 /** @defgroup I2S_Clock_Source
 160   * @{
 161   */
 162 #define I2S_CLOCK_PLL                     ((uint32_t)0x00000000)
 163 #define I2S_CLOCK_EXTERNAL                ((uint32_t)0x00000001)
 164
 165 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
 166                                    ((CLOCK) == I2S_CLOCK_PLL))
 167 /**
 168   * @}
 169   */
 170
 171 /** @defgroup I2S_Mode
 172   * @{
 173   */
 174 #define I2S_MODE_SLAVE_TX                ((uint32_t)0x00000000)
 175 #define I2S_MODE_SLAVE_RX                ((uint32_t)0x00000100)
 176 #define I2S_MODE_MASTER_TX               ((uint32_t)0x00000200)
 177 #define I2S_MODE_MASTER_RX               ((uint32_t)0x00000300)
 178
 179 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX)  || \
 180                            ((MODE) == I2S_MODE_SLAVE_RX)  || \
 181                            ((MODE) == I2S_MODE_MASTER_TX) || \
 182                            ((MODE) == I2S_MODE_MASTER_RX))
 183 /**
 184   * @}
 185   */
 186
 187 /** @defgroup I2S_Standard
 188   * @{
 189   */
 190 #define I2S_STANDARD_PHILIPS             ((uint32_t)0x00000000)
 191 #define I2S_STANDARD_MSB                 ((uint32_t)0x00000010)
 192 #define I2S_STANDARD_LSB                 ((uint32_t)0x00000020)
 193 #define I2S_STANDARD_PCM_SHORT           ((uint32_t)0x00000030)
 194 #define I2S_STANDARD_PCM_LONG            ((uint32_t)0x000000B0)
 195
 196 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS)  || \
 197                                    ((STANDARD) == I2S_STANDARD_MSB)       || \
 198                                    ((STANDARD) == I2S_STANDARD_LSB)       || \
 199                                    ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
 200                                    ((STANDARD) == I2S_STANDARD_PCM_LONG))
 201 /** @defgroup I2S_Legacy
 202   * @{
 203   */
 204 #define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
 205 /**
 206   * @}
 207   */
 208
 209 /**
 210   * @}
 211   */
 212
 213 /** @defgroup I2S_Data_Format
 214   * @{
 215   */
 216 #define I2S_DATAFORMAT_16B               ((uint32_t)0x00000000)
 217 #define I2S_DATAFORMAT_16B_EXTENDED      ((uint32_t)0x00000001)
 218 #define I2S_DATAFORMAT_24B               ((uint32_t)0x00000003)
 219 #define I2S_DATAFORMAT_32B               ((uint32_t)0x00000005)
 220
 221 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B)          || \
 222                                     ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
 223                                     ((FORMAT) == I2S_DATAFORMAT_24B)          || \
 224                                     ((FORMAT) == I2S_DATAFORMAT_32B))
 225 /**
 226   * @}
 227   */
 228
 229 /** @defgroup I2S_MCLK_Output
 230   * @{
 231   */
 232 #define I2S_MCLKOUTPUT_ENABLE           ((uint32_t)SPI_I2SPR_MCKOE)
 233 #define I2S_MCLKOUTPUT_DISABLE          ((uint32_t)0x00000000)
 234
 235 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
 236                                     ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
 237 /**
 238   * @}
 239   */
 240
 241 /** @defgroup I2S_Audio_Frequency
 242   * @{
 243   */
 244 #define I2S_AUDIOFREQ_192K               ((uint32_t)192000)
 245 #define I2S_AUDIOFREQ_96K                ((uint32_t)96000)
 246 #define I2S_AUDIOFREQ_48K                ((uint32_t)48000)
 247 #define I2S_AUDIOFREQ_44K                ((uint32_t)44100)
 248 #define I2S_AUDIOFREQ_32K                ((uint32_t)32000)
 249 #define I2S_AUDIOFREQ_22K                ((uint32_t)22050)
 250 #define I2S_AUDIOFREQ_16K                ((uint32_t)16000)
 251 #define I2S_AUDIOFREQ_11K                ((uint32_t)11025)
 252 #define I2S_AUDIOFREQ_8K                 ((uint32_t)8000)
 253 #define I2S_AUDIOFREQ_DEFAULT            ((uint32_t)2)
 254
 255 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
 256                                   ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
 257                                   ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
 258 /**
 259   * @}
 260   */
 261
 262 /** @defgroup I2S_FullDuplex_Mode
 263   * @{
 264   */
 265 #define I2S_FULLDUPLEXMODE_DISABLE                   ((uint32_t)0x00000000)
 266 #define I2S_FULLDUPLEXMODE_ENABLE                    ((uint32_t)0x00000001)
 267
 268 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
 269                                       ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
 270 /**
 271   * @}
 272   */
 273
 274 /** @defgroup I2S_Clock_Polarity
 275   * @{
 276   */
 277 #define I2S_CPOL_LOW                    ((uint32_t)0x00000000)
 278 #define I2S_CPOL_HIGH                   ((uint32_t)SPI_I2SCFGR_CKPOL)
 279
 280 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
 281                            ((CPOL) == I2S_CPOL_HIGH))
 282 /**
 283   * @}
 284   */
 285
 286 /** @defgroup I2S_Interrupt_configuration_definition
 287   * @{
 288   */
 289 #define I2S_IT_TXE                      SPI_CR2_TXEIE
 290 #define I2S_IT_RXNE                     SPI_CR2_RXNEIE
 291 #define I2S_IT_ERR                      SPI_CR2_ERRIE
 292 /**
 293   * @}
 294   */
 295
 296 /** @defgroup I2S_Flag_definition
 297   * @{
 298   */
 299 #define I2S_FLAG_TXE                    SPI_SR_TXE
 300 #define I2S_FLAG_RXNE                   SPI_SR_RXNE
 301
 302 #define I2S_FLAG_UDR                    SPI_SR_UDR
 303 #define I2S_FLAG_OVR                    SPI_SR_OVR
 304 #define I2S_FLAG_FRE                    SPI_SR_FRE
 305
 306 #define I2S_FLAG_CHSIDE                 SPI_SR_CHSIDE
 307 #define I2S_FLAG_BSY                    SPI_SR_BSY
 308 /**
 309   * @}
 310   */
 311
 312 /**
 313   * @}
 314   */
 315
 316 /* Exported macro ------------------------------------------------------------*/
 317
 318
 319 /** @brief Reset I2S handle state
 320   * @param  __HANDLE__: specifies the I2S Handle.
 321   * @retval None
 322   */
 323 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
 324
 325 /** @brief  Enable or disable the specified SPI peripheral (in I2S mode).
 326   * @param  __HANDLE__: specifies the I2S Handle.
 327   * @retval None
 328   */
 329 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
 330 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
 331
 332 /** @brief  Enable or disable the specified I2S interrupts.
 333   * @param  __HANDLE__: specifies the I2S Handle.
 334   * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
 335   *         This parameter can be one of the following values:
 336   *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
 337   *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
 338   *            @arg I2S_IT_ERR: Error interrupt enable
 339   * @retval None
 340   */
 341 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
 342 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
 343
 344 /** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
 345   * @param  __HANDLE__: specifies the I2S Handle.
 346   *         This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
 347   * @param  __INTERRUPT__: specifies the I2S interrupt source to check.
 348   *          This parameter can be one of the following values:
 349   *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
 350   *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
 351   *            @arg I2S_IT_ERR: Error interrupt enable
 352   * @retval The new state of __IT__ (TRUE or FALSE).
 353   */
 354 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 355
 356 /** @brief  Checks whether the specified I2S flag is set or not.
 357   * @param  __HANDLE__: specifies the I2S Handle.
 358   * @param  __FLAG__: specifies the flag to check.
 359   *         This parameter can be one of the following values:
 360   *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
 361   *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
 362   *            @arg I2S_FLAG_UDR: Underrun flag
 363   *            @arg I2S_FLAG_OVR: Overrun flag
 364   *            @arg I2S_FLAG_FRE: Frame error flag
 365   *            @arg I2S_FLAG_CHSIDE: Channel Side flag
 366   *            @arg I2S_FLAG_BSY: Busy flag
 367   * @retval The new state of __FLAG__ (TRUE or FALSE).
 368   */
 369 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 370
 371 /** @brief Clears the I2S OVR pending flag.
 372   * @param  __HANDLE__: specifies the I2S Handle.
 373   * @retval None
 374   */
 375 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
 376                                                (__HANDLE__)->Instance->SR;}while(0)
 377 /** @brief Clears the I2S UDR pending flag.
 378   * @param  __HANDLE__: specifies the I2S Handle.
 379   * @retval None
 380   */
 381 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
 382
 383 /* Include I2S Extension module */
 384 #include "stm32f4xx_hal_i2s_ex.h"
 385
 386 /* Exported functions --------------------------------------------------------*/
 387
 388 /* Initialization/de-initialization functions  **********************************/
 389 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
 390 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
 391 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
 392 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
 393
 394 /* I/O operation functions  *****************************************************/
 395  /* Blocking mode: Polling */
 396 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 397 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 398
 399  /* Non-Blocking mode: Interrupt */
 400 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 401 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 402 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
 403
 404 /* Non-Blocking mode: DMA */
 405 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 406 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 407
 408 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
 409 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
 410 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
 411
 412 /* Peripheral Control and State functions  **************************************/
 413 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
 414 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
 415
 416 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
 417 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 418 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
 419 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 420 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
 421 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
 422
 423 void              I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
 424 void              I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
 425 void              I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
 426 void              I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
 427 void              I2S_DMAError(DMA_HandleTypeDef *hdma);
 428 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
 429
 430 /**
 431   * @}
 432   */
 433
 434 /**
 435   * @}
 436   */
 437
 438 #ifdef __cplusplus
 439 }
 440 #endif
 441
 442
 443 #endif /* __STM32F4xx_HAL_I2S_H */
 444
 445 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/