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1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 06-February-2015
7 * @brief This file contains all the functions prototypes for the HAL
8 * module driver.
9 ******************************************************************************
10 * @attention
11 *
12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
13 *
14 * Redistribution and use in source and binary forms, with or without modification,
15 * are permitted provided that the following conditions are met:
16 * 1. Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 ******************************************************************************
37 */
38
39 /* Define to prevent recursive inclusion -------------------------------------*/
40 #ifndef __STM32L0xx_HAL_H
41 #define __STM32L0xx_HAL_H
42
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32l0xx_hal_conf.h"
49
50 /** @addtogroup STM32L0xx_HAL_Driver
51 * @{
52 */
53
54 /** @defgroup HAL HAL
55 * @{
56 */
57 /** @defgroup HAL_Exported_Constants HAL Exported constants
58 * @{
59 */
60
61 /** @defgroup SYSCFG_BootMode Boot Mode
62 * @{
63 */
64 #define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000)
65 #define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_CFGR1_MEM_MODE_0)
66 #define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_CFGR1_BOOT_MODE)
67
68 /**
69 * @}
70 */
71
72 /** @defgroup DBGMCU_Low_Power_Config
73 * @{
74 */
75 #define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP
76 #define DBGMCU_STOP DBGMCU_CR_DBG_STOP
77 #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
78 #define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00) && ((__PERIPH__) != 0x00))
79
80
81 /**
82 * @}
83 */
84
85 /** @defgroup HAL_SYSCFG_LCD_EXT_CAPA
86 * @{
87 */
88 #define SYSCFG_LCD_EXT_CAPA SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */
89 #define SYSCFG_VLCD_PB2_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_0 /*!< Connection on PB2 */
90 #define SYSCFG_VLCD_PB12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_1 /*!< Connection on PB12 */
91 #define SYSCFG_VLCD_PE11_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_2 /*!< Connection on PB0 */
92 #if defined (SYSCFG_CFGR2_CAPA_3)
93 #define SYSCFG_VLCD_PB0_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_3 /*!< Connection on PE11 */
94 #endif
95 #if defined (SYSCFG_CFGR2_CAPA_4)
96 #define SYSCFG_VLCD_PE12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_4 /*!< Connection on PE12 */
97 #endif
98
99 /**
100 * @}
101 */
102
103 /** @defgroup HAL_SYSCFG_VREFINT_OUT_SELECT
104 * @{
105 */
106 #define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000) /* no pad connected */
107 #define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */
108 #define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */
109 #define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */
110
111 #define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE) || \
112 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \
113 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \
114 ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1))
115 /**
116 * @}
117 */
118
119 /** @defgroup HAL_SYSCFG_flags_definition
120 * @{
121 */
122 #define SYSCFG_FLAG_VREFINT_READY SYSCFG_CFGR3_VREFINT_RDYF
123
124 #define IS_SYSCFG_FLAG(FLAG) ((FLAG) == SYSCFG_FLAG_VREFINT_READY))
125
126 /**
127 * @}
128 */
129 /**
130 * @}
131 */
132
133 /** @defgroup HAL_Exported_Macros HAL Exported Macros
134 * @{
135 */
136
137 /** @brief Freeze/Unfreeze Peripherals in Debug mode
138 */
139 #if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
140 /**
141 * @brief TIM2 Peripherals Debug mode
142 */
143 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
144 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
145 #endif
146
147 #if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
148 /**
149 * @brief TIM3 Peripherals Debug mode
150 */
151 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
152 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
153 #endif
154
155 #if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
156 /**
157 * @brief TIM6 Peripherals Debug mode
158 */
159 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
160 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
161 #endif
162
163 #if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
164 /**
165 * @brief TIM7 Peripherals Debug mode
166 */
167 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
168 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
169 #endif
170
171 #if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
172 /**
173 * @brief RTC Peripherals Debug mode
174 */
175 #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
176 #define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
177 #endif
178
179 #if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
180 /**
181 * @brief WWDG Peripherals Debug mode
182 */
183 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
184 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
185 #endif
186
187 #if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
188 /**
189 * @brief IWDG Peripherals Debug mode
190 */
191 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
192 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
193 #endif
194
195 #if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP)
196 /**
197 * @brief I2C1 Peripherals Debug mode
198 */
199 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
200 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
201 #endif
202
203 #if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP)
204 /**
205 * @brief I2C2 Peripherals Debug mode
206 */
207 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
208 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
209 #endif
210
211 #if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP)
212 /**
213 * @brief I2C3 Peripherals Debug mode
214 */
215 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
216 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
217 #endif
218
219 #if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
220 /**
221 * @brief LPTIMER Peripherals Debug mode
222 */
223 #define __HAL_DBGMCU_FREEZE_LPTIMER() SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
224 #define __HAL_DBGMCU_UNFREEZE_LPTIMER() CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
225 #endif
226
227 #if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP)
228 /**
229 * @brief TIM22 Peripherals Debug mode
230 */
231 #define __HAL_DBGMCU_FREEZE_TIM22() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
232 #define __HAL_DBGMCU_UNFREEZE_TIM22() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
233 #endif
234
235 #if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP)
236 /**
237 * @brief TIM21 Peripherals Debug mode
238 */
239 #define __HAL_DBGMCU_FREEZE_TIM21() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
240 #define __HAL_DBGMCU_UNFREEZE_TIM21() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
241 #endif
242
243 /** @brief Main Flash memory mapped at 0x00000000
244 */
245 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
246
247 /** @brief System Flash memory mapped at 0x00000000
248 */
249 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0)
250
251
252 /** @brief Embedded SRAM mapped at 0x00000000
253 */
254 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1)
255
256 /** @brief Configuration of the DBG Low Power mode.
257 * @param __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active.
258 * This parameter can be a value of @ref HAL_DBGMCU_Low_Power_Config
259 */
260 #define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__) do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \
261 MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \
262 } while (0)
263 /**
264 * @brief Returns the boot mode as configured by user.
265 * @retval The boot mode as configured by user. The returned can be a value of @ref HAL_SYSCFG_BootMode
266 */
267 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)
268
269
270 /** @brief Check whether the specified SYSCFG flag is set or not.
271 * @param __FLAG__: specifies the flag to check.
272 * This parameter can a value of @ref HAL_SYSCFG_flags_definition
273 * @retval The new state of __FLAG__ (TRUE or FALSE).
274 */
275 #define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
276
277 /**
278 * @}
279 */
280
281 /** @defgroup HAL_Exported_Functions HAL Exported Functions
282 * @{
283 */
284 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions
285 * @brief Initialization and de-initialization functions
286 * @{
287 */
288 HAL_StatusTypeDef HAL_Init(void);
289 HAL_StatusTypeDef HAL_DeInit(void);
290 void HAL_MspInit(void);
291 void HAL_MspDeInit(void);
292 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
293
294 /**
295 * @}
296 */
297
298 /** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions
299 * @brief Peripheral Control functions
300 * @{
301 */
302 void HAL_IncTick(void);
303 void HAL_Delay(__IO uint32_t Delay);
304 uint32_t HAL_GetTick(void);
305 void HAL_SuspendTick(void);
306 void HAL_ResumeTick(void);
307 uint32_t HAL_GetHalVersion(void);
308 uint32_t HAL_GetREVID(void);
309 uint32_t HAL_GetDEVID(void);
310 void HAL_DBGMCU_EnableDBGSleepMode(void);
311 void HAL_DBGMCU_DisableDBGSleepMode(void);
312 void HAL_DBGMCU_EnableDBGStopMode(void);
313 void HAL_DBGMCU_DisableDBGStopMode(void);
314 void HAL_DBGMCU_EnableDBGStandbyMode(void);
315 void HAL_DBGMCU_DisableDBGStandbyMode(void);
316 void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph);
317 void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph);
318 uint32_t HAL_SYSCFG_GetBootMode(void);
319 void HAL_SYSCFG_EnableVREFINT(void);
320 void HAL_SYSCFG_DisableVREFINT(void);
321 void HAL_SYSCFG_Enable_Lock_VREFINT(void);
322 void HAL_SYSCFG_Disable_Lock_VREFINT(void);
323 void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT);
324
325 /**
326 * @}
327 */
328 /**
329 * @}
330 */
331
332 /**
333 * @}
334 */
335
336 /**
337 * @}
338 */
339
340 #ifdef __cplusplus
341 }
342 #endif
343
344 #endif /* __STM32L0xx_HAL_H */
345
346 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
347
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