tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim_ex.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l0xx_hal_tim_ex.h
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    06-February-2015
   7   * @brief   Header file of TIM HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L0xx_HAL_TIM_EX_H
  40 #define __STM32L0xx_HAL_TIM_EX_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32l0xx_hal_def.h"
  48
  49 /** @addtogroup STM32L0xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @defgroup TIMEx TIMEx (Timer extended)
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /**
  60   * @brief  TIM Master configuration Structure definition
  61   */
  62 typedef struct {
  63   uint32_t  MasterOutputTrigger;   /*!< Trigger output (TRGO) selection
  64                                       This parameter can be a value of @ref TIM_Master_Mode_Selection */
  65   uint32_t  MasterSlaveMode;       /*!< Master/slave mode selection
  66                                       This parameter can be a value of @ref TIM_Master_Slave_Mode */
  67 }TIM_MasterConfigTypeDef;
  68
  69
  70
  71 /* Exported constants --------------------------------------------------------*/
  72 /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
  73   * @{
  74   */
  75
  76 /** @defgroup TIMEx_Trigger_Selection Trigger selection
  77   * @{
  78   */
  79 #define  TIM_TRGO_RESET            ((uint32_t)0x0000)
  80 #define  TIM_TRGO_ENABLE           (TIM_CR2_MMS_0)
  81 #define  TIM_TRGO_UPDATE           (TIM_CR2_MMS_1)
  82 #define  TIM_TRGO_OC1              ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
  83 #define  TIM_TRGO_OC1REF           (TIM_CR2_MMS_2)
  84 #define  TIM_TRGO_OC2REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
  85 #define  TIM_TRGO_OC3REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
  86 #define  TIM_TRGO_OC4REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
  87
  88 #define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET)  || \
  89                                         ((__SOURCE__) == TIM_TRGO_ENABLE) || \
  90                                         ((__SOURCE__) == TIM_TRGO_UPDATE) || \
  91                                         ((__SOURCE__) == TIM_TRGO_OC1)    || \
  92                                         ((__SOURCE__) == TIM_TRGO_OC1REF) || \
  93                                         ((__SOURCE__) == TIM_TRGO_OC2REF) || \
  94                                         ((__SOURCE__) == TIM_TRGO_OC3REF) || \
  95                                         ((__SOURCE__) == TIM_TRGO_OC4REF))
  96
  97 /**
  98   * @}
  99   */
 100
 101 /** @defgroup TIMEx_Remap Remaping
 102   * @{
 103   */
 104
 105 #define TIM2_ETR_GPIO                     ((uint32_t)0x0)
 106 #define TIM2_ETR_HSI48                    TIM2_OR_ETR_RMP_2
 107 #define TIM2_ETR_LSE                      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
 108 #define TIM2_ETR_COMP2_OUT                (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
 109 #define TIM2_ETR_COMP1_OUT                TIM2_OR_ETR_RMP
 110 #define TIM2_TI4_GPIO                     ((uint32_t)0x0)
 111 #define TIM2_TI4_COMP2                    TIM2_OR_TI4_RMP_0
 112 #define TIM2_TI4_COMP1                    TIM2_OR_TI4_RMP_1
 113
 114 #define TIM21_ETR_GPIO                    ((uint32_t)0x0)
 115 #define TIM21_ETR_COMP2_OUT               TIM21_OR_ETR_RMP_0
 116 #define TIM21_ETR_COMP1_OUT               TIM21_OR_ETR_RMP_1
 117 #define TIM21_ETR_LSE                     TIM21_OR_ETR_RMP
 118 #define TIM21_TI1_GPIO                    ((uint32_t)0x0)
 119 #define TIM21_TI1_MCO                     TIM21_OR_TI1_RMP
 120 #define TIM21_TI1_RTC_WKUT_IT             TIM21_OR_TI1_RMP_0
 121 #define TIM21_TI1_HSE_RTC                 TIM21_OR_TI1_RMP_1
 122 #define TIM21_TI1_MSI                     (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1)
 123 #define TIM21_TI1_LSE                     TIM21_OR_TI1_RMP_2
 124 #define TIM21_TI1_LSI                     (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0)
 125 #define TIM21_TI1_COMP1_OUT               (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1)
 126 #define TIM21_TI2_GPIO                    ((uint32_t)0x0)
 127 #define TIM21_TI2_COMP2_OUT               TIM21_OR_TI2_RMP
 128
 129 #define TIM22_ETR_LSE                     ((uint32_t)0x0)
 130 #define TIM22_ETR_COMP2_OUT               TIM22_OR_ETR_RMP_0
 131 #define TIM22_ETR_COMP1_OUT               TIM22_OR_ETR_RMP_1
 132 #define TIM22_ETR_GPIO                    TIM22_OR_ETR_RMP
 133 #define TIM22_TI1_GPIO1                   ((uint32_t)0x0)
 134 #define TIM22_TI1_COMP2_OUT               TIM22_OR_TI1_RMP_0
 135 #define TIM22_TI1_COMP1_OUT               TIM22_OR_TI1_RMP_1
 136 #define TIM22_TI1_GPIO2                   TIM22_OR_TI1_RMP
 137
 138 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
 139     || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
 140
 141 #define TIM3_TI4_GPIO_DEF                 ((uint32_t)0x0)
 142 #define TIM3_TI4_GPIOC9_AF2               TIM3_OR_TI4_RMP
 143 #define TIM3_TI2_GPIO_DEF                 ((uint32_t)0x0)
 144 #define TIM3_TI2_GPIOB5_AF4               TIM3_OR_TI2_RMP
 145 #define TIM3_TI1_USB_SOF                  ((uint32_t)0x0)
 146 #define TIM3_TI1_GPIO                     TIM3_OR_TI1_RMP
 147 #define TIM3_ETR_GPIO                     ((uint32_t)0x0)
 148 #define TIM3_ETR_HSI                      TIM3_OR_ETR_RMP_1
 149
 150 #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
 151
 152
 153
 154 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
 155     || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
 156
 157
 158 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
 159         (((__INSTANCE__ == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
 160          ((__INSTANCE__ == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
 161          ((__INSTANCE__ == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \
 162          ((__INSTANCE__ == TIM3)   &&  ((__TIM_REMAP__) <=  (TIM3_OR_ETR_RMP  | TIM3_OR_TI1_RMP  | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP))))
 163
 164 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
 165         (((__INSTANCE__ == TIM2)   &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
 166                                         ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
 167                                         ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
 168                                         ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
 169           ((__INSTANCE__ == TIM3) &&   (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
 170                                         ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
 171                                         ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
 172                                         ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
 173           ((__INSTANCE__ == TIM21) &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
 174                                         ((__CHANNEL__) == TIM_CHANNEL_2))) ||   \
 175           ((__INSTANCE__ == TIM22) &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
 176                                         ((__CHANNEL__) == TIM_CHANNEL_2))))
 177
 178 #else
 179
 180 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
 181         (((__INSTANCE__ == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
 182          ((__INSTANCE__ == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
 183          ((__INSTANCE__ == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
 184
 185 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
 186         (((__INSTANCE__ == TIM2)   &&   (((__CHANNEL__) == TIM_CHANNEL_1)   || \
 187                                          ((__CHANNEL__) == TIM_CHANNEL_2)   || \
 188                                          ((__CHANNEL__) == TIM_CHANNEL_3)   || \
 189                                          ((__CHANNEL__) == TIM_CHANNEL_4))) || \
 190           ((__INSTANCE__ == TIM21)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
 191                                          ((__CHANNEL__) == TIM_CHANNEL_2))) || \
 192           ((__INSTANCE__ == TIM22)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
 193                                          ((__CHANNEL__) == TIM_CHANNEL_2))))
 194
 195 #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
 196
 197
 198 /**
 199   * @}
 200   */
 201
 202 /**
 203   * @}
 204   */
 205
 206
 207 /* Exported macro ------------------------------------------------------------*/
 208 /* Exported functions --------------------------------------------------------*/
 209 /* Control functions  ***********************************************************/
 210
 211 /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
 212  *  @{
 213  */
 214
 215 /** @defgroup TIMEx_Exported_Functions_Group1 TIMEx Peripheral Control functions
 216  *  @{
 217  */
 218
 219 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
 220 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
 221
 222 /**
 223   * @}
 224   */
 225
 226 /**
 227   * @}
 228   */
 229
 230 /**
 231   * @}
 232   */
 233
 234 /**
 235   * @}
 236   */
 237
 238 /**
 239   * @}
 240   */
 241 #ifdef __cplusplus
 242 }
 243 #endif
 244
 245 #endif /* __STM32L0xx_HAL_TIM_EX_H */
 246
 247 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 248