tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_flash_ramfunc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_hal_flash_ramfunc.c
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   FLASH RAMFUNC driver.
   8   *          This file provides a Flash firmware functions which should be
   9   *          executed from internal SRAM
  10   *
  11   *  @verbatim
  12
  13     *** ARM Compiler ***
  14     --------------------
  15     [..] RAM functions are defined using the toolchain options.
  16          Functions that are be executed in RAM should reside in a separate
  17          source module. Using the 'Options for File' dialog you can simply change
  18          the 'Code / Const' area of a module to a memory space in physical RAM.
  19          Available memory areas are declared in the 'Target' tab of the
  20          Options for Target' dialog.
  21
  22     *** ICCARM Compiler ***
  23     -----------------------
  24     [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
  25
  26     *** GNU Compiler ***
  27     --------------------
  28     [..] RAM functions are defined using a specific toolchain attribute
  29          "__attribute__((section(".RamFunc")))".
  30
  31 @endverbatim
  32   ******************************************************************************
  33   * @attention
  34   *
  35   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  36   *
  37   * Redistribution and use in source and binary forms, with or without modification,
  38   * are permitted provided that the following conditions are met:
  39   *   1. Redistributions of source code must retain the above copyright notice,
  40   *      this list of conditions and the following disclaimer.
  41   *   2. Redistributions in binary form must reproduce the above copyright notice,
  42   *      this list of conditions and the following disclaimer in the documentation
  43   *      and/or other materials provided with the distribution.
  44   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  45   *      may be used to endorse or promote products derived from this software
  46   *      without specific prior written permission.
  47   *
  48   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  49   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  50   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  51   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  52   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  53   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  54   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  55   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  56   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  57   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  58   *
  59   ******************************************************************************
  60   */
  61
  62 /* Includes ------------------------------------------------------------------*/
  63 #include "stm32l1xx_hal.h"
  64
  65 /** @addtogroup STM32L1xx_HAL_Driver
  66   * @{
  67   */
  68
  69 /** @defgroup FLASHRamfunc FLASHRamfunc
  70   * @brief FLASH functions executed from RAM
  71   * @{
  72   */
  73
  74 #ifdef HAL_FLASH_MODULE_ENABLED
  75
  76 /* Private typedef -----------------------------------------------------------*/
  77 /* Private define ------------------------------------------------------------*/
  78 /* Private macro -------------------------------------------------------------*/
  79 /* Private variables ---------------------------------------------------------*/
  80 /* Private function prototypes -----------------------------------------------*/
  81 static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout);
  82
  83 /* Private functions ---------------------------------------------------------*/
  84
  85 /** @defgroup FLASHRamfunc_Exported_Functions FLASH RAM Exported Functions
  86  *
  87 @verbatim
  88  ===============================================================================
  89                       ##### ramfunc functions #####
  90  ===============================================================================
  91     [..]
  92     This subsection provides a set of functions that should be executed from RAM
  93     transfers.
  94
  95 @endverbatim
  96   * @{
  97   */
  98
  99 /** @defgroup FLASHRamfunc_Exported_Functions_Group1 FLASH RAM Peripheral  features functions
 100   * @{
 101   */
 102
 103 /**
 104   * @brief  Enable  the power down mode during RUN mode.
 105   * @note  This function can be used only when the user code is running from Internal SRAM.
 106   * @retval None
 107   */
 108 __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
 109 {
 110   /* Enable the Power Down in Run mode*/
 111   __HAL_FLASH_POWER_DOWN_ENABLE();
 112
 113   return HAL_OK;
 114 }
 115
 116
 117 /**
 118   * @brief  Disable the power down mode during RUN mode.
 119   * @note  This function can be used only when the user code is running from Internal SRAM.
 120   * @retval None
 121   */
 122 __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
 123 {
 124   /* Disable the Power Down in Run mode*/
 125   __HAL_FLASH_POWER_DOWN_DISABLE();
 126
 127   return HAL_OK;
 128 }
 129
 130 /**
 131   * @}
 132   */
 133
 134 /** @defgroup FLASHRamfunc_Exported_Functions_Group2 FLASH RAM Programming and erasing operation functions
 135  *
 136 @verbatim
 137 @endverbatim
 138   * @{
 139   */
 140
 141 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
 142     defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
 143 /**
 144   * @brief  Erases a specified 2 page in program memory in parallel.
 145   * @note   This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5  devices.
 146   *         To correctly run this function, the HAL_FLASH_Unlock() function
 147   *         must be called before.
 148   *         Call the HAL_FLASH_Lock() to disable the flash memory access
 149   *        (recommended to protect the FLASH memory against possible unwanted operation).
 150   * @param  Page_Address1: The page address in program memory to be erased in
 151   *         the first Bank (BANK1). This parameter should be between FLASH_BASE
 152   *         and FLASH_BANK1_END.
 153   * @param  Page_Address2: The page address in program memory to be erased in
 154   *         the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE
 155   *         and FLASH_BANK2_END.
 156   * @note   A Page is erased in the Program memory only if the address to load
 157   *         is the start address of a page (multiple of 256 bytes).
 158   * @retval HAL Status: The returned value can be:
 159   *          HAL_ERROR, HAL_OK or HAL_TIMEOUT.
 160   */
 161 __RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
 162 {
 163   HAL_StatusTypeDef status = HAL_OK;
 164
 165   /* Wait for last operation to be completed */
 166   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 167
 168   if(status == HAL_OK)
 169   {
 170     /* If the previous operation is completed, proceed to erase the page */
 171
 172     /* Set the PARALLBANK bit */
 173     FLASH->PECR |= FLASH_PECR_PARALLBANK;
 174
 175     /* Set the ERASE bit */
 176     FLASH->PECR |= FLASH_PECR_ERASE;
 177
 178     /* Set PROG bit */
 179     FLASH->PECR |= FLASH_PECR_PROG;
 180
 181     /* Write 00000000h to the first word of the first program page to erase */
 182     *(__IO uint32_t *)Page_Address1 = 0x00000000;
 183     /* Write 00000000h to the first word of the second program page to erase */
 184     *(__IO uint32_t *)Page_Address2 = 0x00000000;
 185
 186     /* Wait for last operation to be completed */
 187     status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 188
 189     /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */
 190     FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
 191     FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE);
 192     FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK);
 193   }
 194   /* Return the Erase Status */
 195   return status;
 196 }
 197
 198 /**
 199   * @brief  Programs 2 half page in program memory in parallel.
 200   * @note   This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5  devices.
 201   * @param  Address1: specifies the first address to be written in the first bank
 202   *        (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE).
 203   * @param  pBuffer1: pointer to the buffer  containing the data to be  written
 204   *         to the first half page in the first bank.
 205   * @param  Address2: specifies the second address to be written in the second bank
 206   *        (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE).
 207   * @param  pBuffer2: pointer to the buffer containing the data to be  written
 208   *         to the second half page in the second bank.
 209   * @note   To correctly run this function, the HAL_FLASH_Unlock() function
 210   *         must be called before.
 211   *         Call the HAL_FLASH_Lock() to disable the flash memory access
 212   *         (recommended to protect the FLASH memory against possible unwanted operation).
 213   * @note   Half page write is possible only from SRAM.
 214   * @note   If there are more than 32 words to write, after 32 words another
 215   *         Half Page programming operation starts and has to be finished.
 216   * @note   A half page is written to the program memory only if the first
 217   *         address to load is the start address of a half page (multiple of 128
 218   *         bytes) and the 31 remaining words to load are in the same half page.
 219   * @note   During the Program memory half page write all read operations are
 220   *         forbidden (this includes DMA read operations and debugger read
 221   *         operations such as breakpoints, periodic updates, etc.).
 222   * @note   If a PGAERR is set during a Program memory half page write, the
 223   *         complete write operation is aborted. Software should then reset the
 224   *         FPRG and PROG/DATA bits and restart the write operation from the
 225   *         beginning.
 226   * @retval HAL Status: The returned value can be:
 227   *          HAL_ERROR, HAL_OK or HAL_TIMEOUT.
 228   */
 229 __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
 230 {
 231   uint32_t count = 0;
 232
 233   HAL_StatusTypeDef status = HAL_OK;
 234
 235   /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
 236      This bit prevents the interruption of multicycle instructions and therefore
 237      will increase the interrupt latency. of Cortex-M3. */
 238   SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
 239
 240   /* Wait for last operation to be completed */
 241   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 242
 243   if(status == HAL_OK)
 244   {
 245     /* If the previous operation is completed, proceed to program the new
 246        half page */
 247     FLASH->PECR |= FLASH_PECR_PARALLBANK;
 248     FLASH->PECR |= FLASH_PECR_FPRG;
 249     FLASH->PECR |= FLASH_PECR_PROG;
 250
 251   /* Wait for last operation to be completed */
 252   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 253   if(status == HAL_OK)
 254   {
 255     /* Write the first half page directly with 32 different words */
 256     while(count < 32)
 257     {
 258       *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *(pBuffer1++);
 259       count ++;
 260     }
 261     count = 0;
 262
 263     /* Write the second half page directly with 32 different words */
 264     while(count < 32)
 265     {
 266       *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *(pBuffer2++);
 267       count ++;
 268     }
 269     /* Wait for last operation to be completed */
 270     status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 271   }
 272     /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */
 273     FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
 274     FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
 275     FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK);
 276   }
 277
 278   SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
 279
 280   /* Return the Write Status */
 281   return status;
 282 }
 283 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
 284
 285 /**
 286   * @brief  Programs a half page in program memory.
 287   * @param  Address: specifies the address to be written.
 288   * @param  pBuffer: pointer to the buffer  containing the data to be  written to
 289   *         the half page.
 290   * @note   To correctly run this function, the HAL_FLASH_Unlock() function
 291   *         must be called before.
 292   *         Call the HAL_FLASH_Lock() to disable the flash memory access
 293   *         (recommended to protect the FLASH memory against possible unwanted operation)
 294   * @note   Half page write is possible only from SRAM.
 295   * @note   If there are more than 32 words to write, after 32 words another
 296   *         Half Page programming operation starts and has to be finished.
 297   * @note   A half page is written to the program memory only if the first
 298   *         address to load is the start address of a half page (multiple of 128
 299   *         bytes) and the 31 remaining words to load are in the same half page.
 300   * @note   During the Program memory half page write all read operations are
 301   *         forbidden (this includes DMA read operations and debugger read
 302   *         operations such as breakpoints, periodic updates, etc.).
 303   * @note   If a PGAERR is set during a Program memory half page write, the
 304   *         complete write operation is aborted. Software should then reset the
 305   *         FPRG and PROG/DATA bits and restart the write operation from the
 306   *         beginning.
 307   * @retval HAL Status: The returned value can be:
 308   *    HAL_ERROR, HAL_OK or HAL_TIMEOUT.
 309   */
 310 __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
 311 {
 312   uint32_t count = 0;
 313
 314   HAL_StatusTypeDef status = HAL_OK;
 315
 316   /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
 317      This bit prevents the interruption of multicycle instructions and therefore
 318      will increase the interrupt latency. of Cortex-M3. */
 319   SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
 320
 321   /* Wait for last operation to be completed */
 322   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 323
 324   if(status == HAL_OK)
 325   {
 326     /* if the previous operation is completed, proceed to program the new
 327     half page */
 328     FLASH->PECR |= FLASH_PECR_FPRG;
 329     FLASH->PECR |= FLASH_PECR_PROG;
 330
 331     /* Write one half page directly with 32 different words */
 332     while(count < 32)
 333     {
 334       *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *(pBuffer++);
 335       count ++;
 336     }
 337     /* Wait for last operation to be completed */
 338     status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 339
 340     /* if the write operation is completed, disable the PROG and FPRG bits */
 341     FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
 342     FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
 343   }
 344
 345   SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
 346
 347   /* Return the Write Status */
 348   return status;
 349 }
 350
 351 /**
 352   * @}
 353   */
 354
 355 /** @defgroup FLASHRamfunc_Exported_Functions_Group3 FLASH RAM DATA EEPROM functions
 356  *
 357 @verbatim
 358 @endverbatim
 359   * @{
 360   */
 361
 362 /**
 363   * @brief  Erase a double word in data memory.
 364   * @param  Address: specifies the address to be erased.
 365   * @note   To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
 366   *         must be called before.
 367   *         Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
 368   *         and Flash program erase control register access(recommended to protect
 369   *         the DATA_EEPROM against possible unwanted operation).
 370   * @note   Data memory double word erase is possible only from SRAM.
 371   * @note   A double word is erased to the data memory only if the first address
 372   *         to load is the start address of a double word (multiple of 8 bytes).
 373   * @note   During the Data memory double word erase, all read operations are
 374   *         forbidden (this includes DMA read operations and debugger read
 375   *         operations such as breakpoints, periodic updates, etc.).
 376   * @retval HAL Status: The returned value can be:
 377   *    HAL_ERROR, HAL_OK or HAL_TIMEOUT.
 378   */
 379
 380 __RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
 381 {
 382   HAL_StatusTypeDef status = HAL_OK;
 383
 384   /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
 385      This bit prevents the interruption of multicycle instructions and therefore
 386      will increase the interrupt latency. of Cortex-M3. */
 387   SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
 388
 389   /* Wait for last operation to be completed */
 390   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 391
 392   if(status == HAL_OK)
 393   {
 394     /* If the previous operation is completed, proceed to erase the next double word */
 395     /* Set the ERASE bit */
 396     FLASH->PECR |= FLASH_PECR_ERASE;
 397
 398     /* Set DATA bit */
 399     FLASH->PECR |= FLASH_PECR_DATA;
 400
 401     /* Write 00000000h to the 2 words to erase */
 402     *(__IO uint32_t *)Address = 0x00000000;
 403     Address += 4;
 404     *(__IO uint32_t *)Address = 0x00000000;
 405
 406     /* Wait for last operation to be completed */
 407     status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 408
 409     /* If the erase operation is completed, disable the ERASE and DATA bits */
 410     FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE);
 411     FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA);
 412   }
 413
 414   SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
 415
 416   /* Return the erase status */
 417   return status;
 418 }
 419
 420 /**
 421   * @brief  Write a double word in data memory without erase.
 422   * @param  Address: specifies the address to be written.
 423   * @param  Data: specifies the data to be written.
 424   * @note   To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
 425   *         must be called before.
 426   *         Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
 427   *         and Flash program erase control register access(recommended to protect
 428   *         the DATA_EEPROM against possible unwanted operation).
 429   * @note   Data memory double word write is possible only from SRAM.
 430   * @note   A data memory double word is written to the data memory only if the
 431   *         first address to load is the start address of a double word (multiple
 432   *         of double word).
 433   * @note   During the Data memory double word write, all read operations are
 434   *         forbidden (this includes DMA read operations and debugger read
 435   *         operations such as breakpoints, periodic updates, etc.).
 436   * @retval HAL Status: The returned value can be:
 437   *    HAL_ERROR, HAL_OK or HAL_TIMEOUT.
 438   */
 439 __RAM_FUNC HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data)
 440 {
 441   HAL_StatusTypeDef status = HAL_OK;
 442
 443   /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
 444      This bit prevents the interruption of multicycle instructions and therefore
 445      will increase the interrupt latency. of Cortex-M3. */
 446   SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
 447
 448   /* Wait for last operation to be completed */
 449   status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 450
 451   if(status == HAL_OK)
 452   {
 453     /* If the previous operation is completed, proceed to program the new data*/
 454     FLASH->PECR |= FLASH_PECR_FPRG;
 455     FLASH->PECR |= FLASH_PECR_DATA;
 456
 457     /* Write the 2 words */
 458      *(__IO uint32_t *)Address = (uint32_t) Data;
 459      Address += 4;
 460      *(__IO uint32_t *)Address = (uint32_t) (Data >> 32);
 461
 462     /* Wait for last operation to be completed */
 463     status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
 464
 465     /* If the write operation is completed, disable the FPRG and DATA bits */
 466     FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
 467     FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA);
 468   }
 469
 470   SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
 471
 472   /* Return the Write Status */
 473   return status;
 474 }
 475
 476 /**
 477   * @}
 478   */
 479
 480 /**
 481   * @}
 482   */
 483
 484 /** @defgroup FLASHRamfunc_Private_Functions FLASH RAM Private Functions
 485   * @{
 486   */
 487
 488 /**
 489   * @brief  Wait for a FLASH operation to complete.
 490   * @param  Timeout: maximum flash operationtimeout
 491   * @retval HAL status
 492   */
 493 static __RAM_FUNC   FLASHRAM_WaitForLastOperation(uint32_t Timeout)
 494 {
 495     /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
 496        Even if the FLASH operation fails, the BUSY flag will be reset and an error
 497        flag will be set */
 498
 499     while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00))
 500     {
 501       Timeout--;
 502     }
 503
 504     if(Timeout == 0x00 )
 505     {
 506       return HAL_TIMEOUT;
 507     }
 508
 509     if( (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)     != RESET) ||
 510         (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)     != RESET) ||
 511         (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)     != RESET) ||
 512 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
 513     defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
 514         (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)      != RESET) ||
 515 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
 516 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
 517     defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
 518     defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
 519         (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) != RESET) ||
 520 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
 521         (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)    != RESET) )
 522     {
 523       return HAL_ERROR;
 524     }
 525
 526     /* If there is an error flag set */
 527     return HAL_OK;
 528 }
 529
 530 #endif /* HAL_FLASH_MODULE_ENABLED */
 531
 532 /**
 533   * @}
 534   */
 535
 536 /**
 537   * @}
 538   */
 539
 540 /**
 541   * @}
 542   */
 543
 544
 545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/