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1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_i2c.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 The I2C HAL driver can be used as follows:
21
22 (#) Declare a I2C_HandleTypeDef handle structure, for example:
23 I2C_HandleTypeDef hi2c;
24
25 (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
26 (##) Enable the I2Cx interface clock
27 (##) I2C pins configuration
28 (+++) Enable the clock for the I2C GPIOs
29 (+++) Configure I2C pins as alternate function open-drain
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the I2Cx interrupt priority
32 (+++) Enable the NVIC I2C IRQ Channel
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
35 (+++) Enable the DMAx interface clock using
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx Channel
38 (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
40 the DMA Tx or Rx Channel
41
42 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
43 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
44
45 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
46 (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
47
48 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49
50 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51
52 *** Polling mode IO operation ***
53 =================================
54 [..]
55 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
56 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
57 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
58 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59
60 *** Polling mode IO MEM operation ***
61 =====================================
62 [..]
63 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
64 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
65
66
67 *** Interrupt mode IO operation ***
68 ===================================
69 [..]
70 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
71 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
73 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
74 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
75 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
76 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
77 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
78 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
79 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
80 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
81 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
82 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
83 add his own code by customization of function pointer HAL_I2C_ErrorCallback
84
85 *** Interrupt mode IO MEM operation ***
86 =======================================
87 [..]
88 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
89 HAL_I2C_Mem_Write_IT()
90 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
91 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
92 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
93 HAL_I2C_Mem_Read_IT()
94 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
95 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
96 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
97 add his own code by customization of function pointer HAL_I2C_ErrorCallback
98
99 *** DMA mode IO operation ***
100 ==============================
101 [..]
102 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
103 HAL_I2C_Master_Transmit_DMA()
104 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
105 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
106 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
107 HAL_I2C_Master_Receive_DMA()
108 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
109 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
110 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
111 HAL_I2C_Slave_Transmit_DMA()
112 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
113 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
114 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
115 HAL_I2C_Slave_Receive_DMA()
116 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
117 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
118 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
119 add his own code by customization of function pointer HAL_I2C_ErrorCallback
120
121 *** DMA mode IO MEM operation ***
122 =================================
123 [..]
124 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
125 HAL_I2C_Mem_Write_DMA()
126 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
127 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
128 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
129 HAL_I2C_Mem_Read_DMA()
130 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
131 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
132 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
133 add his own code by customization of function pointer HAL_I2C_ErrorCallback
134
135
136 *** I2C HAL driver macros list ***
137 ==================================
138 [..]
139 Below the list of most used macros in I2C HAL driver.
140
141 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
142 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
143 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
144 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
145 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
146 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
147
148 [..]
149 (@) You can refer to the I2C HAL driver header file for more useful macros
150
151
152 @endverbatim
153 ******************************************************************************
154 * @attention
155 *
156 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
157 *
158 * Redistribution and use in source and binary forms, with or without modification,
159 * are permitted provided that the following conditions are met:
160 * 1. Redistributions of source code must retain the above copyright notice,
161 * this list of conditions and the following disclaimer.
162 * 2. Redistributions in binary form must reproduce the above copyright notice,
163 * this list of conditions and the following disclaimer in the documentation
164 * and/or other materials provided with the distribution.
165 * 3. Neither the name of STMicroelectronics nor the names of its contributors
166 * may be used to endorse or promote products derived from this software
167 * without specific prior written permission.
168 *
169 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
170 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
171 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
172 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
173 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
174 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
175 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
176 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
177 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
178 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
179 *
180 ******************************************************************************
181 */
182
183 /* Includes ------------------------------------------------------------------*/
184 #include "stm32l1xx_hal.h"
185
186 /** @addtogroup STM32L1xx_HAL_Driver
187 * @{
188 */
189
190 /** @defgroup I2C I2C
191 * @brief I2C HAL module driver
192 * @{
193 */
194
195 #ifdef HAL_I2C_MODULE_ENABLED
196
197 /* Private typedef -----------------------------------------------------------*/
198 /* Private define ------------------------------------------------------------*/
199 /** @defgroup I2C_Private_Constants I2C Private Constants
200 * @{
201 */
202 #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
203 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
204
205 #define I2C_MIN_PCLK_FREQ ((uint32_t)2000000) /* 2 MHz*/
206 /**
207 * @}
208 */
209
210
211 /* Private macro -------------------------------------------------------------*/
212 /* Private variables ---------------------------------------------------------*/
213 /* Private function prototypes -----------------------------------------------*/
214 /** @defgroup I2C_Private_Functions I2C Private Functions
215 * @{
216 */
217
218 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
219 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
220 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
221 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
222 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
223 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
224 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
225
226 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
227 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
228 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
229 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
230 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
231 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
232
233 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
234 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
235 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
236 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
237
238 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
239 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
240 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
241 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
242 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
243 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
244 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
245 /**
246 * @}
247 */
248
249
250 /* Exported functions ---------------------------------------------------------*/
251
252 /** @defgroup I2C_Exported_Functions I2C Exported Functions
253 * @{
254 */
255
256 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
257 * @brief Initialization and Configuration functions
258 *
259 @verbatim
260 ===============================================================================
261 ##### Initialization and de-initialization functions #####
262 ===============================================================================
263 [..] This subsection provides a set of functions allowing to initialize and
264 de-initialiaze the I2Cx peripheral:
265
266 (+) User must Implement HAL_I2C_MspInit() function in which he configures
267 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
268
269 (+) Call the function HAL_I2C_Init() to configure the selected device with
270 the selected configuration:
271 (++) Communication Speed
272 (++) Duty cycle
273 (++) Addressing mode
274 (++) Own Address 1
275 (++) Dual Addressing mode
276 (++) Own Address 2
277 (++) General call mode
278 (++) Nostretch mode
279
280 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
281 of the selected I2Cx periperal.
282
283 @endverbatim
284 * @{
285 */
286
287 /**
288 * @brief Initializes the I2C according to the specified parameters
289 * in the I2C_InitTypeDef and create the associated handle.
290 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
291 * the configuration information for I2C module
292 * @retval HAL status
293 */
294 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
295 {
296 uint32_t freqrange = 0;
297 uint32_t pclk1 = 0;
298
299 /* Check the I2C handle allocation */
300 if(hi2c == HAL_NULL)
301 {
302 return HAL_ERROR;
303 }
304
305 /* Check the parameters */
306 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
307 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
308 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
309 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
310 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
311 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
312 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
313 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
314 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
315
316 if(hi2c->State == HAL_I2C_STATE_RESET)
317 {
318 /* Init the low level hardware : GPIO, CLOCK, NVIC */
319 HAL_I2C_MspInit(hi2c);
320 }
321
322 /* Get PCLK1 frequency */
323 pclk1 = HAL_RCC_GetPCLK1Freq();
324
325 /* The minimum allowed frequency is 2 MHz */
326 if(pclk1 < I2C_MIN_PCLK_FREQ)
327 {
328 return HAL_ERROR;
329 }
330
331 hi2c->State = HAL_I2C_STATE_BUSY;
332
333 /* Disble the selected I2C peripheral */
334 __HAL_I2C_DISABLE(hi2c);
335
336 /* Calculate frequency range */
337 freqrange = I2C_FREQRANGE(pclk1);
338
339 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
340 /* Configure I2Cx: Frequency range */
341 MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
342
343 /*---------------------------- I2Cx TRISE Configuration --------------------*/
344 /* Configure I2Cx: Rise Time */
345 MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
346
347 /*---------------------------- I2Cx CCR Configuration ----------------------*/
348 /* Configure I2Cx: Speed */
349 MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
350
351 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
352 /* Configure I2Cx: Generalcall and NoStretch mode */
353 MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
354
355 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
356 /* Configure I2Cx: Own Address1 and addressing mode */
357 MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
358
359 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
360 /* Configure I2Cx: Dual mode and Own Address2 */
361 MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
362
363 /* Enable the selected I2C peripheral */
364 __HAL_I2C_ENABLE(hi2c);
365
366 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
367 hi2c->State = HAL_I2C_STATE_READY;
368
369 return HAL_OK;
370 }
371
372 /**
373 * @brief DeInitializes the I2C peripheral.
374 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
375 * the configuration information for I2C module
376 * @retval HAL status
377 */
378 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
379 {
380 /* Check the I2C handle allocation */
381 if(hi2c == HAL_NULL)
382 {
383 return HAL_ERROR;
384 }
385
386 /* Check the parameters */
387 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
388
389 hi2c->State = HAL_I2C_STATE_BUSY;
390
391 /* Disable the I2C Peripheral Clock */
392 __HAL_I2C_DISABLE(hi2c);
393
394 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
395 HAL_I2C_MspDeInit(hi2c);
396
397 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
398
399 hi2c->State = HAL_I2C_STATE_RESET;
400
401 /* Release Lock */
402 __HAL_UNLOCK(hi2c);
403
404 return HAL_OK;
405 }
406
407 /**
408 * @brief I2C MSP Init.
409 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
410 * the configuration information for I2C module
411 * @retval None
412 */
413 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
414 {
415 /* NOTE : This function Should not be modified, when the callback is needed,
416 the HAL_I2C_MspInit could be implemented in the user file
417 */
418 }
419
420 /**
421 * @brief I2C MSP DeInit
422 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
423 * the configuration information for I2C module
424 * @retval None
425 */
426 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
427 {
428 /* NOTE : This function Should not be modified, when the callback is needed,
429 the HAL_I2C_MspDeInit could be implemented in the user file
430 */
431 }
432
433 /**
434 * @}
435 */
436
437 /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
438 * @brief Data transfers functions
439 *
440 @verbatim
441 ===============================================================================
442 ##### IO operation functions #####
443 ===============================================================================
444 [..]
445 This subsection provides a set of functions allowing to manage the I2C data
446 transfers.
447
448 (#) There are two modes of transfer:
449 (++) Blocking mode : The communication is performed in the polling mode.
450 The status of all data processing is returned by the same function
451 after finishing transfer.
452 (++) No-Blocking mode : The communication is performed using Interrupts
453 or DMA. These functions return the status of the transfer startup.
454 The end of the data processing will be indicated through the
455 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
456 using DMA mode.
457
458 (#) Blocking mode functions are :
459 (++) HAL_I2C_Master_Transmit()
460 (++) HAL_I2C_Master_Receive()
461 (++) HAL_I2C_Slave_Transmit()
462 (++) HAL_I2C_Slave_Receive()
463 (++) HAL_I2C_Mem_Write()
464 (++) HAL_I2C_Mem_Read()
465 (++) HAL_I2C_IsDeviceReady()
466
467 (#) No-Blocking mode functions with Interrupt are :
468 (++) HAL_I2C_Master_Transmit_IT()
469 (++) HAL_I2C_Master_Receive_IT()
470 (++) HAL_I2C_Slave_Transmit_IT()
471 (++) HAL_I2C_Slave_Receive_IT()
472 (++) HAL_I2C_Mem_Write_IT()
473 (++) HAL_I2C_Mem_Read_IT()
474
475 (#) No-Blocking mode functions with DMA are :
476 (++) HAL_I2C_Master_Transmit_DMA()
477 (++) HAL_I2C_Master_Receive_DMA()
478 (++) HAL_I2C_Slave_Transmit_DMA()
479 (++) HAL_I2C_Slave_Receive_DMA()
480 (++) HAL_I2C_Mem_Write_DMA()
481 (++) HAL_I2C_Mem_Read_DMA()
482
483 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
484 (++) HAL_I2C_MemTxCpltCallback()
485 (++) HAL_I2C_MemRxCpltCallback()
486 (++) HAL_I2C_MasterTxCpltCallback()
487 (++) HAL_I2C_MasterRxCpltCallback()
488 (++) HAL_I2C_SlaveTxCpltCallback()
489 (++) HAL_I2C_SlaveRxCpltCallback()
490 (++) HAL_I2C_ErrorCallback()
491
492 @endverbatim
493 * @{
494 */
495
496 /**
497 * @brief Transmits in master mode an amount of data in blocking mode.
498 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
499 * the configuration information for I2C module
500 * @param DevAddress: Target device address
501 * @param pData: Pointer to data buffer
502 * @param Size: Amount of data to be sent
503 * @param Timeout: Timeout duration
504 * @retval HAL status
505 */
506 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
507 {
508 if(hi2c->State == HAL_I2C_STATE_READY)
509 {
510 if((pData == HAL_NULL) || (Size == 0))
511 {
512 return HAL_ERROR;
513 }
514
515 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
516 {
517 return HAL_BUSY;
518 }
519
520 /* Process Locked */
521 __HAL_LOCK(hi2c);
522
523 hi2c->State = HAL_I2C_STATE_BUSY_TX;
524 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
525
526 /* Send Slave Address */
527 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
528 {
529 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
530 {
531 return HAL_ERROR;
532 }
533 else
534 {
535 return HAL_TIMEOUT;
536 }
537 }
538
539 /* Clear ADDR flag */
540 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
541
542 while(Size > 0)
543 {
544 /* Wait until TXE flag is set */
545 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
546 {
547 return HAL_TIMEOUT;
548 }
549
550 /* Write data to DR */
551 hi2c->Instance->DR = (*pData++);
552 Size--;
553
554 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
555 {
556 /* Write data to DR */
557 hi2c->Instance->DR = (*pData++);
558 Size--;
559 }
560 }
561
562 /* Wait until TXE flag is set */
563 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
564 {
565 return HAL_TIMEOUT;
566 }
567
568 /* Generate Stop */
569 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
570
571 /* Wait until BUSY flag is reset */
572 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
573 {
574 return HAL_TIMEOUT;
575 }
576
577 hi2c->State = HAL_I2C_STATE_READY;
578
579 /* Process Unlocked */
580 __HAL_UNLOCK(hi2c);
581
582 return HAL_OK;
583 }
584 else
585 {
586 return HAL_BUSY;
587 }
588 }
589
590 /**
591 * @brief Receives in master mode an amount of data in blocking mode.
592 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
593 * the configuration information for I2C module
594 * @param DevAddress: Target device address
595 * @param pData: Pointer to data buffer
596 * @param Size: Amount of data to be sent
597 * @param Timeout: Timeout duration
598 * @retval HAL status
599 */
600 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
601 {
602 if(hi2c->State == HAL_I2C_STATE_READY)
603 {
604 if((pData == HAL_NULL) || (Size == 0))
605 {
606 return HAL_ERROR;
607 }
608
609 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
610 {
611 return HAL_BUSY;
612 }
613
614 /* Process Locked */
615 __HAL_LOCK(hi2c);
616
617 hi2c->State = HAL_I2C_STATE_BUSY_RX;
618 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
619
620 /* Send Slave Address */
621 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
622 {
623 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
624 {
625 return HAL_ERROR;
626 }
627 else
628 {
629 return HAL_TIMEOUT;
630 }
631 }
632
633 if(Size == 1)
634 {
635 /* Disable Acknowledge */
636 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
637
638 /* Clear ADDR flag */
639 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
640
641 /* Generate Stop */
642 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
643 }
644 else if(Size == 2)
645 {
646 /* Disable Acknowledge */
647 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
648
649 /* Enable Pos */
650 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
651
652 /* Clear ADDR flag */
653 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
654 }
655 else
656 {
657 /* Enable Acknowledge */
658 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
659
660 /* Clear ADDR flag */
661 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
662 }
663
664 while(Size > 0)
665 {
666 if(Size <= 3)
667 {
668 /* One byte */
669 if(Size == 1)
670 {
671 /* Wait until RXNE flag is set */
672 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
673 {
674 return HAL_TIMEOUT;
675 }
676
677 /* Read data from DR */
678 (*pData++) = hi2c->Instance->DR;
679 Size--;
680 }
681 /* Two bytes */
682 else if(Size == 2)
683 {
684 /* Wait until BTF flag is set */
685 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
686 {
687 return HAL_TIMEOUT;
688 }
689
690 /* Generate Stop */
691 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
692
693 /* Read data from DR */
694 (*pData++) = hi2c->Instance->DR;
695 Size--;
696
697 /* Read data from DR */
698 (*pData++) = hi2c->Instance->DR;
699 Size--;
700 }
701 /* 3 Last bytes */
702 else
703 {
704 /* Wait until BTF flag is set */
705 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
706 {
707 return HAL_TIMEOUT;
708 }
709
710 /* Disable Acknowledge */
711 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
712
713 /* Read data from DR */
714 (*pData++) = hi2c->Instance->DR;
715 Size--;
716
717 /* Wait until BTF flag is set */
718 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
719 {
720 return HAL_TIMEOUT;
721 }
722
723 /* Generate Stop */
724 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
725
726 /* Read data from DR */
727 (*pData++) = hi2c->Instance->DR;
728 Size--;
729
730 /* Read data from DR */
731 (*pData++) = hi2c->Instance->DR;
732 Size--;
733 }
734 }
735 else
736 {
737 /* Wait until RXNE flag is set */
738 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
739 {
740 return HAL_TIMEOUT;
741 }
742
743 /* Read data from DR */
744 (*pData++) = hi2c->Instance->DR;
745 Size--;
746
747 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
748 {
749 /* Read data from DR */
750 (*pData++) = hi2c->Instance->DR;
751 Size--;
752 }
753 }
754 }
755
756 /* Disable Pos */
757 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
758
759 /* Wait until BUSY flag is reset */
760 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
761 {
762 return HAL_TIMEOUT;
763 }
764
765 hi2c->State = HAL_I2C_STATE_READY;
766
767 /* Process Unlocked */
768 __HAL_UNLOCK(hi2c);
769
770 return HAL_OK;
771 }
772 else
773 {
774 return HAL_BUSY;
775 }
776 }
777
778 /**
779 * @brief Transmits in slave mode an amount of data in blocking mode.
780 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
781 * the configuration information for I2C module
782 * @param pData: Pointer to data buffer
783 * @param Size: Amount of data to be sent
784 * @param Timeout: Timeout duration
785 * @retval HAL status
786 */
787 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
788 {
789 if(hi2c->State == HAL_I2C_STATE_READY)
790 {
791 if((pData == HAL_NULL) || (Size == 0))
792 {
793 return HAL_ERROR;
794 }
795
796 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
797 {
798 return HAL_BUSY;
799 }
800
801 /* Process Locked */
802 __HAL_LOCK(hi2c);
803
804 hi2c->State = HAL_I2C_STATE_BUSY_TX;
805 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
806
807 /* Enable Address Acknowledge */
808 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
809
810 /* Wait until ADDR flag is set */
811 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
812 {
813 return HAL_TIMEOUT;
814 }
815
816 /* Clear ADDR flag */
817 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
818
819 /* If 10bit addressing mode is selected */
820 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
821 {
822 /* Wait until ADDR flag is set */
823 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
824 {
825 return HAL_TIMEOUT;
826 }
827
828 /* Clear ADDR flag */
829 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
830 }
831
832 while(Size > 0)
833 {
834 /* Wait until TXE flag is set */
835 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
836 {
837 return HAL_TIMEOUT;
838 }
839
840 /* Write data to DR */
841 hi2c->Instance->DR = (*pData++);
842 Size--;
843
844 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
845 {
846 /* Write data to DR */
847 hi2c->Instance->DR = (*pData++);
848 Size--;
849 }
850 }
851
852 /* Wait until AF flag is set */
853 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
854 {
855 return HAL_TIMEOUT;
856 }
857
858 /* Clear AF flag */
859 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
860
861 /* Disable Address Acknowledge */
862 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
863
864 /* Wait until BUSY flag is reset */
865 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
866 {
867 return HAL_TIMEOUT;
868 }
869
870 hi2c->State = HAL_I2C_STATE_READY;
871
872 /* Process Unlocked */
873 __HAL_UNLOCK(hi2c);
874
875 return HAL_OK;
876 }
877 else
878 {
879 return HAL_BUSY;
880 }
881 }
882
883 /**
884 * @brief Receive in slave mode an amount of data in blocking mode
885 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
886 * the configuration information for I2C module
887 * @param pData: Pointer to data buffer
888 * @param Size: Amount of data to be sent
889 * @param Timeout: Timeout duration
890 * @retval HAL status
891 */
892 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
893 {
894 if(hi2c->State == HAL_I2C_STATE_READY)
895 {
896 if((pData == HAL_NULL) || (Size == 0))
897 {
898 return HAL_ERROR;
899 }
900
901 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
902 {
903 return HAL_BUSY;
904 }
905
906 /* Process Locked */
907 __HAL_LOCK(hi2c);
908
909 hi2c->State = HAL_I2C_STATE_BUSY_RX;
910 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
911
912 /* Enable Address Acknowledge */
913 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
914
915 /* Wait until ADDR flag is set */
916 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
917 {
918 return HAL_TIMEOUT;
919 }
920
921 /* Clear ADDR flag */
922 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
923
924 while(Size > 0)
925 {
926 /* Wait until RXNE flag is set */
927 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
928 {
929 return HAL_TIMEOUT;
930 }
931
932 /* Read data from DR */
933 (*pData++) = hi2c->Instance->DR;
934 Size--;
935
936 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
937 {
938 /* Read data from DR */
939 (*pData++) = hi2c->Instance->DR;
940 Size--;
941 }
942 }
943
944 /* Wait until STOP flag is set */
945 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
946 {
947 return HAL_TIMEOUT;
948 }
949
950 /* Clear STOP flag */
951 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
952
953 /* Disable Address Acknowledge */
954 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
955
956 /* Wait until BUSY flag is reset */
957 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
958 {
959 return HAL_TIMEOUT;
960 }
961
962 hi2c->State = HAL_I2C_STATE_READY;
963
964 /* Process Unlocked */
965 __HAL_UNLOCK(hi2c);
966
967 return HAL_OK;
968 }
969 else
970 {
971 return HAL_BUSY;
972 }
973 }
974
975 /**
976 * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
977 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
978 * the configuration information for I2C module
979 * @param DevAddress: Target device address
980 * @param pData: Pointer to data buffer
981 * @param Size: Amount of data to be sent
982 * @retval HAL status
983 */
984 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
985 {
986 if(hi2c->State == HAL_I2C_STATE_READY)
987 {
988 if((pData == HAL_NULL) || (Size == 0))
989 {
990 return HAL_ERROR;
991 }
992
993 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
994 {
995 return HAL_BUSY;
996 }
997
998 /* Process Locked */
999 __HAL_LOCK(hi2c);
1000
1001 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1002 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1003
1004 hi2c->pBuffPtr = pData;
1005 hi2c->XferSize = Size;
1006 hi2c->XferCount = Size;
1007
1008 /* Send Slave Address */
1009 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1010 {
1011 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1012 {
1013 return HAL_ERROR;
1014 }
1015 else
1016 {
1017 return HAL_TIMEOUT;
1018 }
1019 }
1020
1021 /* Clear ADDR flag */
1022 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1023
1024 /* Process Unlocked */
1025 __HAL_UNLOCK(hi2c);
1026
1027 /* Note : The I2C interrupts must be enabled after unlocking current process
1028 to avoid the risk of I2C interrupt handle execution before current
1029 process unlock */
1030
1031 /* Enable EVT, BUF and ERR interrupt */
1032 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1033
1034 return HAL_OK;
1035 }
1036 else
1037 {
1038 return HAL_BUSY;
1039 }
1040 }
1041
1042 /**
1043 * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
1044 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1045 * the configuration information for I2C module
1046 * @param DevAddress: Target device address
1047 * @param pData: Pointer to data buffer
1048 * @param Size: Amount of data to be sent
1049 * @retval HAL status
1050 */
1051 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1052 {
1053 if(hi2c->State == HAL_I2C_STATE_READY)
1054 {
1055 if((pData == HAL_NULL) || (Size == 0))
1056 {
1057 return HAL_ERROR;
1058 }
1059
1060 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1061 {
1062 return HAL_BUSY;
1063 }
1064
1065 /* Process Locked */
1066 __HAL_LOCK(hi2c);
1067
1068 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1069 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1070
1071 hi2c->pBuffPtr = pData;
1072 hi2c->XferSize = Size;
1073 hi2c->XferCount = Size;
1074
1075 /* Send Slave Address */
1076 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1077 {
1078 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1079 {
1080 return HAL_ERROR;
1081 }
1082 else
1083 {
1084 return HAL_TIMEOUT;
1085 }
1086 }
1087
1088 if(hi2c->XferCount == 1)
1089 {
1090 /* Disable Acknowledge */
1091 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1092
1093 /* Clear ADDR flag */
1094 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1095
1096 /* Generate Stop */
1097 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1098 }
1099 else if(hi2c->XferCount == 2)
1100 {
1101 /* Disable Acknowledge */
1102 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1103
1104 /* Enable Pos */
1105 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1106
1107 /* Clear ADDR flag */
1108 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1109 }
1110 else
1111 {
1112 /* Enable Acknowledge */
1113 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1114
1115 /* Clear ADDR flag */
1116 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1117 }
1118
1119 /* Process Unlocked */
1120 __HAL_UNLOCK(hi2c);
1121
1122 /* Note : The I2C interrupts must be enabled after unlocking current process
1123 to avoid the risk of I2C interrupt handle execution before current
1124 process unlock */
1125
1126 /* Enable EVT, BUF and ERR interrupt */
1127 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1128
1129 return HAL_OK;
1130 }
1131 else
1132 {
1133 return HAL_BUSY;
1134 }
1135 }
1136
1137 /**
1138 * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
1139 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1140 * the configuration information for I2C module
1141 * @param pData: Pointer to data buffer
1142 * @param Size: Amount of data to be sent
1143 * @retval HAL status
1144 */
1145 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1146 {
1147 if(hi2c->State == HAL_I2C_STATE_READY)
1148 {
1149 if((pData == HAL_NULL) || (Size == 0))
1150 {
1151 return HAL_ERROR;
1152 }
1153
1154 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1155 {
1156 return HAL_BUSY;
1157 }
1158
1159 /* Process Locked */
1160 __HAL_LOCK(hi2c);
1161
1162 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1163 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1164
1165 hi2c->pBuffPtr = pData;
1166 hi2c->XferSize = Size;
1167 hi2c->XferCount = Size;
1168
1169 /* Enable Address Acknowledge */
1170 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1171
1172 /* Process Unlocked */
1173 __HAL_UNLOCK(hi2c);
1174
1175 /* Note : The I2C interrupts must be enabled after unlocking current process
1176 to avoid the risk of I2C interrupt handle execution before current
1177 process unlock */
1178
1179 /* Enable EVT, BUF and ERR interrupt */
1180 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1181
1182 return HAL_OK;
1183 }
1184 else
1185 {
1186 return HAL_BUSY;
1187 }
1188 }
1189
1190 /**
1191 * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
1192 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1193 * the configuration information for I2C module
1194 * @param pData: Pointer to data buffer
1195 * @param Size: Amount of data to be sent
1196 * @retval HAL status
1197 */
1198 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1199 {
1200 if(hi2c->State == HAL_I2C_STATE_READY)
1201 {
1202 if((pData == HAL_NULL) || (Size == 0))
1203 {
1204 return HAL_ERROR;
1205 }
1206
1207 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1208 {
1209 return HAL_BUSY;
1210 }
1211
1212 /* Process Locked */
1213 __HAL_LOCK(hi2c);
1214
1215 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1216 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1217
1218 hi2c->pBuffPtr = pData;
1219 hi2c->XferSize = Size;
1220 hi2c->XferCount = Size;
1221
1222 /* Enable Address Acknowledge */
1223 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1224
1225 /* Process Unlocked */
1226 __HAL_UNLOCK(hi2c);
1227
1228 /* Note : The I2C interrupts must be enabled after unlocking current process
1229 to avoid the risk of I2C interrupt handle execution before current
1230 process unlock */
1231
1232 /* Enable EVT, BUF and ERR interrupt */
1233 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1234
1235 return HAL_OK;
1236 }
1237 else
1238 {
1239 return HAL_BUSY;
1240 }
1241 }
1242
1243 /**
1244 * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
1245 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1246 * the configuration information for I2C module
1247 * @param DevAddress: Target device address
1248 * @param pData: Pointer to data buffer
1249 * @param Size: Amount of data to be sent
1250 * @retval HAL status
1251 */
1252 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1253 {
1254 if(hi2c->State == HAL_I2C_STATE_READY)
1255 {
1256 if((pData == HAL_NULL) || (Size == 0))
1257 {
1258 return HAL_ERROR;
1259 }
1260
1261 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1262 {
1263 return HAL_BUSY;
1264 }
1265
1266 /* Process Locked */
1267 __HAL_LOCK(hi2c);
1268
1269 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1270 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1271
1272 hi2c->pBuffPtr = pData;
1273 hi2c->XferSize = Size;
1274 hi2c->XferCount = Size;
1275
1276 /* Set the I2C DMA transfert complete callback */
1277 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
1278
1279 /* Set the DMA error callback */
1280 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1281
1282 /* Enable the DMA Channel */
1283 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1284
1285 /* Send Slave Address */
1286 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1287 {
1288 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1289 {
1290 return HAL_ERROR;
1291 }
1292 else
1293 {
1294 return HAL_TIMEOUT;
1295 }
1296 }
1297
1298 /* Enable DMA Request */
1299 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1300
1301 /* Clear ADDR flag */
1302 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1303
1304 /* Process Unlocked */
1305 __HAL_UNLOCK(hi2c);
1306
1307 return HAL_OK;
1308 }
1309 else
1310 {
1311 return HAL_BUSY;
1312 }
1313 }
1314
1315 /**
1316 * @brief Receive in master mode an amount of data in no-blocking mode with DMA
1317 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1318 * the configuration information for I2C module
1319 * @param DevAddress: Target device address
1320 * @param pData: Pointer to data buffer
1321 * @param Size: Amount of data to be sent
1322 * @retval HAL status
1323 */
1324 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1325 {
1326 if(hi2c->State == HAL_I2C_STATE_READY)
1327 {
1328 if((pData == HAL_NULL) || (Size == 0))
1329 {
1330 return HAL_ERROR;
1331 }
1332
1333 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1334 {
1335 return HAL_BUSY;
1336 }
1337
1338 /* Process Locked */
1339 __HAL_LOCK(hi2c);
1340
1341 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1342 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1343
1344 hi2c->pBuffPtr = pData;
1345 hi2c->XferSize = Size;
1346 hi2c->XferCount = Size;
1347
1348 /* Set the I2C DMA transfert complete callback */
1349 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
1350
1351 /* Set the DMA error callback */
1352 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1353
1354 /* Enable the DMA Channel */
1355 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1356
1357 /* Send Slave Address */
1358 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1359 {
1360 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1361 {
1362 return HAL_ERROR;
1363 }
1364 else
1365 {
1366 return HAL_TIMEOUT;
1367 }
1368 }
1369
1370 if(Size == 1)
1371 {
1372 /* Disable Acknowledge */
1373 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1374 }
1375 else
1376 {
1377 /* Enable Last DMA bit */
1378 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
1379 }
1380
1381 /* Enable DMA Request */
1382 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1383
1384 /* Clear ADDR flag */
1385 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1386
1387 /* Process Unlocked */
1388 __HAL_UNLOCK(hi2c);
1389
1390 return HAL_OK;
1391 }
1392 else
1393 {
1394 return HAL_BUSY;
1395 }
1396 }
1397
1398 /**
1399 * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
1400 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1401 * the configuration information for I2C module
1402 * @param pData: Pointer to data buffer
1403 * @param Size: Amount of data to be sent
1404 * @retval HAL status
1405 */
1406 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1407 {
1408 if(hi2c->State == HAL_I2C_STATE_READY)
1409 {
1410 if((pData == HAL_NULL) || (Size == 0))
1411 {
1412 return HAL_ERROR;
1413 }
1414
1415 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1416 {
1417 return HAL_BUSY;
1418 }
1419
1420 /* Process Locked */
1421 __HAL_LOCK(hi2c);
1422
1423 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1424 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1425
1426 hi2c->pBuffPtr = pData;
1427 hi2c->XferSize = Size;
1428 hi2c->XferCount = Size;
1429
1430 /* Set the I2C DMA transfert complete callback */
1431 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
1432
1433 /* Set the DMA error callback */
1434 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1435
1436 /* Enable the DMA Channel */
1437 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1438
1439 /* Enable DMA Request */
1440 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1441
1442 /* Enable Address Acknowledge */
1443 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1444
1445 /* Wait until ADDR flag is set */
1446 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1447 {
1448 return HAL_TIMEOUT;
1449 }
1450
1451 /* If 7bit addressing mode is selected */
1452 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
1453 {
1454 /* Clear ADDR flag */
1455 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1456 }
1457 else
1458 {
1459 /* Clear ADDR flag */
1460 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1461
1462 /* Wait until ADDR flag is set */
1463 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1464 {
1465 return HAL_TIMEOUT;
1466 }
1467
1468 /* Clear ADDR flag */
1469 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1470 }
1471
1472 /* Process Unlocked */
1473 __HAL_UNLOCK(hi2c);
1474
1475 return HAL_OK;
1476 }
1477 else
1478 {
1479 return HAL_BUSY;
1480 }
1481 }
1482
1483 /**
1484 * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
1485 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1486 * the configuration information for I2C module
1487 * @param pData: Pointer to data buffer
1488 * @param Size: Amount of data to be sent
1489 * @retval HAL status
1490 */
1491 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1492 {
1493 if(hi2c->State == HAL_I2C_STATE_READY)
1494 {
1495 if((pData == HAL_NULL) || (Size == 0))
1496 {
1497 return HAL_ERROR;
1498 }
1499
1500 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1501 {
1502 return HAL_BUSY;
1503 }
1504
1505 /* Process Locked */
1506 __HAL_LOCK(hi2c);
1507
1508 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1509 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1510
1511 hi2c->pBuffPtr = pData;
1512 hi2c->XferSize = Size;
1513 hi2c->XferCount = Size;
1514
1515 /* Set the I2C DMA transfert complete callback */
1516 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
1517
1518 /* Set the DMA error callback */
1519 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1520
1521 /* Enable the DMA Channel */
1522 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1523
1524 /* Enable DMA Request */
1525 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1526
1527 /* Enable Address Acknowledge */
1528 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1529
1530 /* Wait until ADDR flag is set */
1531 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1532 {
1533 return HAL_TIMEOUT;
1534 }
1535
1536 /* Clear ADDR flag */
1537 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1538
1539 /* Process Unlocked */
1540 __HAL_UNLOCK(hi2c);
1541
1542 return HAL_OK;
1543 }
1544 else
1545 {
1546 return HAL_BUSY;
1547 }
1548 }
1549 /**
1550 * @brief Write an amount of data in blocking mode to a specific memory address
1551 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1552 * the configuration information for I2C module
1553 * @param DevAddress: Target device address
1554 * @param MemAddress: Internal memory address
1555 * @param MemAddSize: Size of internal memory address
1556 * @param pData: Pointer to data buffer
1557 * @param Size: Amount of data to be sent
1558 * @param Timeout: Timeout duration
1559 * @retval HAL status
1560 */
1561 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1562 {
1563 /* Check the parameters */
1564 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1565
1566 if(hi2c->State == HAL_I2C_STATE_READY)
1567 {
1568 if((pData == HAL_NULL) || (Size == 0))
1569 {
1570 return HAL_ERROR;
1571 }
1572
1573 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1574 {
1575 return HAL_BUSY;
1576 }
1577
1578 /* Process Locked */
1579 __HAL_LOCK(hi2c);
1580
1581 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1582 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1583
1584 /* Send Slave Address and Memory Address */
1585 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1586 {
1587 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1588 {
1589 return HAL_ERROR;
1590 }
1591 else
1592 {
1593 return HAL_TIMEOUT;
1594 }
1595 }
1596
1597 while(Size > 0)
1598 {
1599 /* Wait until TXE flag is set */
1600 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1601 {
1602 return HAL_TIMEOUT;
1603 }
1604
1605 /* Write data to DR */
1606 hi2c->Instance->DR = (*pData++);
1607 Size--;
1608
1609 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
1610 {
1611 /* Write data to DR */
1612 hi2c->Instance->DR = (*pData++);
1613 Size--;
1614 }
1615 }
1616
1617 /* Wait until TXE flag is set */
1618 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1619 {
1620 return HAL_TIMEOUT;
1621 }
1622
1623 /* Generate Stop */
1624 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1625
1626 /* Wait until BUSY flag is reset */
1627 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1628 {
1629 return HAL_TIMEOUT;
1630 }
1631
1632 hi2c->State = HAL_I2C_STATE_READY;
1633
1634 /* Process Unlocked */
1635 __HAL_UNLOCK(hi2c);
1636
1637 return HAL_OK;
1638 }
1639 else
1640 {
1641 return HAL_BUSY;
1642 }
1643 }
1644
1645 /**
1646 * @brief Read an amount of data in blocking mode from a specific memory address
1647 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1648 * the configuration information for I2C module
1649 * @param DevAddress: Target device address
1650 * @param MemAddress: Internal memory address
1651 * @param MemAddSize: Size of internal memory address
1652 * @param pData: Pointer to data buffer
1653 * @param Size: Amount of data to be sent
1654 * @param Timeout: Timeout duration
1655 * @retval HAL status
1656 */
1657 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1658 {
1659 /* Check the parameters */
1660 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1661
1662 if(hi2c->State == HAL_I2C_STATE_READY)
1663 {
1664 if((pData == HAL_NULL) || (Size == 0))
1665 {
1666 return HAL_ERROR;
1667 }
1668
1669 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1670 {
1671 return HAL_BUSY;
1672 }
1673
1674 /* Process Locked */
1675 __HAL_LOCK(hi2c);
1676
1677 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1678 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1679
1680 /* Send Slave Address and Memory Address */
1681 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1682 {
1683 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1684 {
1685 return HAL_ERROR;
1686 }
1687 else
1688 {
1689 return HAL_TIMEOUT;
1690 }
1691 }
1692
1693 if(Size == 1)
1694 {
1695 /* Disable Acknowledge */
1696 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1697
1698 /* Clear ADDR flag */
1699 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1700
1701 /* Generate Stop */
1702 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1703 }
1704 else if(Size == 2)
1705 {
1706 /* Disable Acknowledge */
1707 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1708
1709 /* Enable Pos */
1710 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1711
1712 /* Clear ADDR flag */
1713 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1714 }
1715 else
1716 {
1717 /* Clear ADDR flag */
1718 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1719 }
1720
1721 while(Size > 0)
1722 {
1723 if(Size <= 3)
1724 {
1725 /* One byte */
1726 if(Size== 1)
1727 {
1728 /* Wait until RXNE flag is set */
1729 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1730 {
1731 return HAL_TIMEOUT;
1732 }
1733
1734 /* Read data from DR */
1735 (*pData++) = hi2c->Instance->DR;
1736 Size--;
1737 }
1738 /* Two bytes */
1739 else if(Size == 2)
1740 {
1741 /* Wait until BTF flag is set */
1742 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1743 {
1744 return HAL_TIMEOUT;
1745 }
1746
1747 /* Generate Stop */
1748 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1749
1750 /* Read data from DR */
1751 (*pData++) = hi2c->Instance->DR;
1752 Size--;
1753
1754 /* Read data from DR */
1755 (*pData++) = hi2c->Instance->DR;
1756 Size--;
1757 }
1758 /* 3 Last bytes */
1759 else
1760 {
1761 /* Wait until BTF flag is set */
1762 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1763 {
1764 return HAL_TIMEOUT;
1765 }
1766
1767 /* Disable Acknowledge */
1768 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1769
1770 /* Read data from DR */
1771 (*pData++) = hi2c->Instance->DR;
1772 Size--;
1773
1774 /* Wait until BTF flag is set */
1775 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1776 {
1777 return HAL_TIMEOUT;
1778 }
1779
1780 /* Generate Stop */
1781 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1782
1783 /* Read data from DR */
1784 (*pData++) = hi2c->Instance->DR;
1785 Size--;
1786
1787 /* Read data from DR */
1788 (*pData++) = hi2c->Instance->DR;
1789 Size--;
1790 }
1791 }
1792 else
1793 {
1794 /* Wait until RXNE flag is set */
1795 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1796 {
1797 return HAL_TIMEOUT;
1798 }
1799
1800 /* Read data from DR */
1801 (*pData++) = hi2c->Instance->DR;
1802 Size--;
1803
1804 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
1805 {
1806 /* Read data from DR */
1807 (*pData++) = hi2c->Instance->DR;
1808 Size--;
1809 }
1810 }
1811 }
1812
1813 /* Disable Pos */
1814 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1815
1816 /* Wait until BUSY flag is reset */
1817 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1818 {
1819 return HAL_TIMEOUT;
1820 }
1821
1822 hi2c->State = HAL_I2C_STATE_READY;
1823
1824 /* Process Unlocked */
1825 __HAL_UNLOCK(hi2c);
1826
1827 return HAL_OK;
1828 }
1829 else
1830 {
1831 return HAL_BUSY;
1832 }
1833 }
1834 /**
1835 * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
1836 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1837 * the configuration information for I2C module
1838 * @param DevAddress: Target device address
1839 * @param MemAddress: Internal memory address
1840 * @param MemAddSize: Size of internal memory address
1841 * @param pData: Pointer to data buffer
1842 * @param Size: Amount of data to be sent
1843 * @retval HAL status
1844 */
1845 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1846 {
1847 /* Check the parameters */
1848 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1849
1850 if(hi2c->State == HAL_I2C_STATE_READY)
1851 {
1852 if((pData == HAL_NULL) || (Size == 0))
1853 {
1854 return HAL_ERROR;
1855 }
1856
1857 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1858 {
1859 return HAL_BUSY;
1860 }
1861
1862 /* Process Locked */
1863 __HAL_LOCK(hi2c);
1864
1865 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1866 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1867
1868 hi2c->pBuffPtr = pData;
1869 hi2c->XferSize = Size;
1870 hi2c->XferCount = Size;
1871
1872 /* Send Slave Address and Memory Address */
1873 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1874 {
1875 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1876 {
1877 return HAL_ERROR;
1878 }
1879 else
1880 {
1881 return HAL_TIMEOUT;
1882 }
1883 }
1884
1885 /* Process Unlocked */
1886 __HAL_UNLOCK(hi2c);
1887
1888 /* Note : The I2C interrupts must be enabled after unlocking current process
1889 to avoid the risk of I2C interrupt handle execution before current
1890 process unlock */
1891
1892 /* Enable EVT, BUF and ERR interrupt */
1893 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1894
1895 return HAL_OK;
1896 }
1897 else
1898 {
1899 return HAL_BUSY;
1900 }
1901 }
1902
1903 /**
1904 * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
1905 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1906 * the configuration information for I2C module
1907 * @param DevAddress: Target device address
1908 * @param MemAddress: Internal memory address
1909 * @param MemAddSize: Size of internal memory address
1910 * @param pData: Pointer to data buffer
1911 * @param Size: Amount of data to be sent
1912 * @retval HAL status
1913 */
1914 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1915 {
1916 /* Check the parameters */
1917 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1918
1919 if(hi2c->State == HAL_I2C_STATE_READY)
1920 {
1921 if((pData == HAL_NULL) || (Size == 0))
1922 {
1923 return HAL_ERROR;
1924 }
1925
1926 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1927 {
1928 return HAL_BUSY;
1929 }
1930
1931 /* Process Locked */
1932 __HAL_LOCK(hi2c);
1933
1934 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1935 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1936
1937 hi2c->pBuffPtr = pData;
1938 hi2c->XferSize = Size;
1939 hi2c->XferCount = Size;
1940
1941 /* Send Slave Address and Memory Address */
1942 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1943 {
1944 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1945 {
1946 return HAL_ERROR;
1947 }
1948 else
1949 {
1950 return HAL_TIMEOUT;
1951 }
1952 }
1953
1954 if(hi2c->XferCount == 1)
1955 {
1956 /* Disable Acknowledge */
1957 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1958
1959 /* Clear ADDR flag */
1960 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1961
1962 /* Generate Stop */
1963 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
1964 }
1965 else if(hi2c->XferCount == 2)
1966 {
1967 /* Disable Acknowledge */
1968 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1969
1970 /* Enable Pos */
1971 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1972
1973 /* Clear ADDR flag */
1974 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1975 }
1976 else
1977 {
1978 /* Enable Acknowledge */
1979 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1980
1981 /* Clear ADDR flag */
1982 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1983 }
1984
1985 /* Process Unlocked */
1986 __HAL_UNLOCK(hi2c);
1987
1988 /* Note : The I2C interrupts must be enabled after unlocking current process
1989 to avoid the risk of I2C interrupt handle execution before current
1990 process unlock */
1991
1992 /* Enable EVT, BUF and ERR interrupt */
1993 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1994
1995 return HAL_OK;
1996 }
1997 else
1998 {
1999 return HAL_BUSY;
2000 }
2001 }
2002 /**
2003 * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
2004 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2005 * the configuration information for I2C module
2006 * @param DevAddress: Target device address
2007 * @param MemAddress: Internal memory address
2008 * @param MemAddSize: Size of internal memory address
2009 * @param pData: Pointer to data buffer
2010 * @param Size: Amount of data to be sent
2011 * @retval HAL status
2012 */
2013 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2014 {
2015 /* Check the parameters */
2016 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2017
2018 if(hi2c->State == HAL_I2C_STATE_READY)
2019 {
2020 if((pData == HAL_NULL) || (Size == 0))
2021 {
2022 return HAL_ERROR;
2023 }
2024
2025 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2026 {
2027 return HAL_BUSY;
2028 }
2029
2030 /* Process Locked */
2031 __HAL_LOCK(hi2c);
2032
2033 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
2034 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2035
2036 hi2c->pBuffPtr = pData;
2037 hi2c->XferSize = Size;
2038 hi2c->XferCount = Size;
2039
2040 /* Set the I2C DMA transfert complete callback */
2041 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
2042
2043 /* Set the DMA error callback */
2044 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2045
2046 /* Enable the DMA Channel */
2047 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
2048
2049 /* Send Slave Address and Memory Address */
2050 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2051 {
2052 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2053 {
2054 return HAL_ERROR;
2055 }
2056 else
2057 {
2058 return HAL_TIMEOUT;
2059 }
2060 }
2061
2062 /* Enable DMA Request */
2063 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2064
2065 /* Process Unlocked */
2066 __HAL_UNLOCK(hi2c);
2067
2068 return HAL_OK;
2069 }
2070 else
2071 {
2072 return HAL_BUSY;
2073 }
2074 }
2075
2076 /**
2077 * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
2078 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2079 * the configuration information for I2C module
2080 * @param DevAddress: Target device address
2081 * @param MemAddress: Internal memory address
2082 * @param MemAddSize: Size of internal memory address
2083 * @param pData: Pointer to data buffer
2084 * @param Size: Amount of data to be read
2085 * @retval HAL status
2086 */
2087 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2088 {
2089 /* Check the parameters */
2090 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2091
2092 if(hi2c->State == HAL_I2C_STATE_READY)
2093 {
2094 if((pData == HAL_NULL) || (Size == 0))
2095 {
2096 return HAL_ERROR;
2097 }
2098
2099 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2100 {
2101 return HAL_BUSY;
2102 }
2103
2104 /* Process Locked */
2105 __HAL_LOCK(hi2c);
2106
2107 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2108 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2109
2110 hi2c->pBuffPtr = pData;
2111 hi2c->XferSize = Size;
2112 hi2c->XferCount = Size;
2113
2114 /* Set the I2C DMA transfert complete callback */
2115 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
2116
2117 /* Set the DMA error callback */
2118 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2119
2120 /* Enable the DMA Channel */
2121 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
2122
2123 /* Send Slave Address and Memory Address */
2124 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2125 {
2126 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2127 {
2128 return HAL_ERROR;
2129 }
2130 else
2131 {
2132 return HAL_TIMEOUT;
2133 }
2134 }
2135
2136 if(Size == 1)
2137 {
2138 /* Disable Acknowledge */
2139 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2140 }
2141 else
2142 {
2143 /* Enable Last DMA bit */
2144 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
2145 }
2146
2147 /* Enable DMA Request */
2148 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2149
2150 /* Clear ADDR flag */
2151 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2152
2153 /* Process Unlocked */
2154 __HAL_UNLOCK(hi2c);
2155
2156 return HAL_OK;
2157 }
2158 else
2159 {
2160 return HAL_BUSY;
2161 }
2162 }
2163
2164 /**
2165 * @brief Checks if target device is ready for communication.
2166 * @note This function is used with Memory devices
2167 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2168 * the configuration information for I2C module
2169 * @param DevAddress: Target device address
2170 * @param Trials: Number of trials
2171 * @param Timeout: Timeout duration
2172 * @retval HAL status
2173 */
2174 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
2175 {
2176 uint32_t tickstart = 0, I2C_Trials = 1;
2177
2178 if(hi2c->State == HAL_I2C_STATE_READY)
2179 {
2180 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2181 {
2182 return HAL_BUSY;
2183 }
2184
2185 /* Process Locked */
2186 __HAL_LOCK(hi2c);
2187
2188 hi2c->State = HAL_I2C_STATE_BUSY;
2189 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2190
2191 do
2192 {
2193 /* Generate Start */
2194 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2195
2196 /* Wait until SB flag is set */
2197 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2198 {
2199 return HAL_TIMEOUT;
2200 }
2201
2202 /* Send slave address */
2203 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2204
2205 /* Wait until ADDR or AF flag are set */
2206 /* Get tick */
2207 tickstart = HAL_GetTick();
2208
2209 while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET) && \
2210 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && \
2211 (hi2c->State != HAL_I2C_STATE_TIMEOUT))
2212 {
2213 if(Timeout != HAL_MAX_DELAY)
2214 {
2215 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2216 {
2217 hi2c->State = HAL_I2C_STATE_TIMEOUT;
2218 }
2219 }
2220 }
2221
2222 hi2c->State = HAL_I2C_STATE_READY;
2223
2224 /* Check if the ADDR flag has been set */
2225 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
2226 {
2227 /* Generate Stop */
2228 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
2229
2230 /* Clear ADDR Flag */
2231 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2232
2233 /* Wait until BUSY flag is reset */
2234 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2235 {
2236 return HAL_TIMEOUT;
2237 }
2238
2239 hi2c->State = HAL_I2C_STATE_READY;
2240
2241 /* Process Unlocked */
2242 __HAL_UNLOCK(hi2c);
2243
2244 return HAL_OK;
2245 }
2246 else
2247 {
2248 /* Generate Stop */
2249 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
2250
2251 /* Clear AF Flag */
2252 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2253
2254 /* Wait until BUSY flag is reset */
2255 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2256 {
2257 return HAL_TIMEOUT;
2258 }
2259 }
2260 }while(I2C_Trials++ < Trials);
2261
2262 hi2c->State = HAL_I2C_STATE_READY;
2263
2264 /* Process Unlocked */
2265 __HAL_UNLOCK(hi2c);
2266
2267 return HAL_ERROR;
2268 }
2269 else
2270 {
2271 return HAL_BUSY;
2272 }
2273 }
2274
2275 /**
2276 * @brief This function handles I2C event interrupt request.
2277 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2278 * the configuration information for I2C module
2279 * @retval HAL status
2280 */
2281 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
2282 {
2283 /* Master mode selected */
2284 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
2285 {
2286 /* I2C in mode Transmitter -----------------------------------------------*/
2287 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2288 {
2289 /* TXE set and BTF reset -----------------------------------------------*/
2290 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
2291 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
2292 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
2293 {
2294 I2C_MasterTransmit_TXE(hi2c);
2295 }
2296 /* BTF set -------------------------------------------------------------*/
2297 else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
2298 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
2299 {
2300 I2C_MasterTransmit_BTF(hi2c);
2301 }
2302 }
2303 /* I2C in mode Receiver --------------------------------------------------*/
2304 else
2305 {
2306 /* RXNE set and BTF reset -----------------------------------------------*/
2307 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
2308 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
2309 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
2310 {
2311 I2C_MasterReceive_RXNE(hi2c);
2312 }
2313 /* BTF set -------------------------------------------------------------*/
2314 else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
2315 {
2316 I2C_MasterReceive_BTF(hi2c);
2317 }
2318 }
2319 }
2320 /* Slave mode selected */
2321 else
2322 {
2323 /* ADDR set --------------------------------------------------------------*/
2324 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) && \
2325 (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
2326 {
2327 I2C_Slave_ADDR(hi2c);
2328 }
2329 /* STOPF set --------------------------------------------------------------*/
2330 else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && \
2331 (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
2332 {
2333 I2C_Slave_STOPF(hi2c);
2334 }
2335 /* I2C in mode Transmitter -----------------------------------------------*/
2336 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2337 {
2338 /* TXE set and BTF reset -----------------------------------------------*/
2339 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
2340 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
2341 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
2342 {
2343 I2C_SlaveTransmit_TXE(hi2c);
2344 }
2345 /* BTF set -------------------------------------------------------------*/
2346 else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
2347 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
2348 {
2349 I2C_SlaveTransmit_BTF(hi2c);
2350 }
2351 }
2352 /* I2C in mode Receiver --------------------------------------------------*/
2353 else
2354 {
2355 /* RXNE set and BTF reset ----------------------------------------------*/
2356 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
2357 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
2358 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
2359 {
2360 I2C_SlaveReceive_RXNE(hi2c);
2361 }
2362 /* BTF set -------------------------------------------------------------*/
2363 else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
2364 {
2365 I2C_SlaveReceive_BTF(hi2c);
2366 }
2367 }
2368 }
2369 }
2370
2371 /**
2372 * @brief This function handles I2C error interrupt request.
2373 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2374 * the configuration information for I2C module
2375 * @retval HAL status
2376 */
2377 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
2378 {
2379
2380 /* I2C Bus error interrupt occurred ----------------------------------------*/
2381 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && \
2382 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
2383 {
2384 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
2385
2386 /* Clear BERR flag */
2387 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
2388 }
2389
2390 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
2391 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && \
2392 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
2393 {
2394 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
2395
2396 /* Clear ARLO flag */
2397 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
2398 }
2399
2400 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
2401 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) && \
2402 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
2403 {
2404 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == RESET) && \
2405 (hi2c->XferCount == 0) && \
2406 (hi2c->State == HAL_I2C_STATE_BUSY_TX))
2407 {
2408 I2C_Slave_AF(hi2c);
2409 }
2410 else
2411 {
2412 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
2413 /* Clear AF flag */
2414 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2415 }
2416 }
2417
2418 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
2419 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && \
2420 (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
2421 {
2422 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
2423 /* Clear OVR flag */
2424 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
2425 }
2426
2427 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
2428 {
2429 hi2c->State = HAL_I2C_STATE_READY;
2430
2431 /* Disable EVT, BUF and ERR interrupts */
2432 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2433
2434 HAL_I2C_ErrorCallback(hi2c);
2435 }
2436 }
2437
2438 /**
2439 * @brief Master Tx Transfer completed callbacks.
2440 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2441 * the configuration information for I2C module
2442 * @retval None
2443 */
2444 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
2445 {
2446 /* NOTE : This function should not be modified, when the callback is needed,
2447 the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
2448 */
2449 }
2450
2451 /**
2452 * @brief Master Rx Transfer completed callbacks.
2453 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2454 * the configuration information for I2C module
2455 * @retval None
2456 */
2457 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
2458 {
2459 /* NOTE : This function should not be modified, when the callback is needed,
2460 the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
2461 */
2462 }
2463
2464 /** @brief Slave Tx Transfer completed callbacks.
2465 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2466 * the configuration information for I2C module
2467 * @retval None
2468 */
2469 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
2470 {
2471 /* NOTE : This function should not be modified, when the callback is needed,
2472 the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
2473 */
2474 }
2475
2476 /**
2477 * @brief Slave Rx Transfer completed callbacks.
2478 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2479 * the configuration information for I2C module
2480 * @retval None
2481 */
2482 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
2483 {
2484 /* NOTE : This function should not be modified, when the callback is needed,
2485 the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
2486 */
2487 }
2488
2489 /**
2490 * @brief Memory Tx Transfer completed callbacks.
2491 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2492 * the configuration information for I2C module
2493 * @retval None
2494 */
2495 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
2496 {
2497 /* NOTE : This function should not be modified, when the callback is needed,
2498 the HAL_I2C_MemTxCpltCallback can be implemented in the user file
2499 */
2500 }
2501
2502 /**
2503 * @brief Memory Rx Transfer completed callbacks.
2504 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2505 * the configuration information for I2C module
2506 * @retval None
2507 */
2508 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
2509 {
2510 /* NOTE : This function should not be modified, when the callback is needed,
2511 the HAL_I2C_MemRxCpltCallback can be implemented in the user file
2512 */
2513 }
2514
2515 /**
2516 * @brief I2C error callbacks.
2517 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2518 * the configuration information for I2C module
2519 * @retval None
2520 */
2521 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
2522 {
2523 /* NOTE : This function should not be modified, when the callback is needed,
2524 the HAL_I2C_ErrorCallback can be implemented in the user file
2525 */
2526 }
2527
2528 /**
2529 * @}
2530 */
2531
2532 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
2533 * @brief Peripheral State and Errors functions
2534 *
2535 @verbatim
2536 ===============================================================================
2537 ##### Peripheral State and Errors functions #####
2538 ===============================================================================
2539 [..]
2540 This subsection permits to get in run-time the status of the peripheral
2541 and the data flow.
2542
2543 @endverbatim
2544 * @{
2545 */
2546
2547 /**
2548 * @brief Returns the I2C state.
2549 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2550 * the configuration information for I2C module
2551 * @retval HAL state
2552 */
2553 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
2554 {
2555 return hi2c->State;
2556 }
2557
2558 /**
2559 * @brief Return the I2C error code
2560 * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
2561 * the configuration information for the specified I2C.
2562 * @retval I2C Error Code
2563 */
2564 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
2565 {
2566 return hi2c->ErrorCode;
2567 }
2568
2569 /**
2570 * @}
2571 */
2572
2573 /**
2574 * @}
2575 */
2576
2577
2578 /** @addtogroup I2C_Private_Functions
2579 * @{
2580 */
2581
2582
2583 /**
2584 * @brief Handle TXE flag for Master
2585 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2586 * the configuration information for I2C module
2587 * @retval HAL status
2588 */
2589 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
2590 {
2591 /* Write data to DR */
2592 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2593 hi2c->XferCount--;
2594
2595 if(hi2c->XferCount == 0)
2596 {
2597 /* Disable BUF interrupt */
2598 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2599 }
2600
2601 return HAL_OK;
2602 }
2603
2604 /**
2605 * @brief Handle BTF flag for Master transmitter
2606 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2607 * the configuration information for I2C module
2608 * @retval HAL status
2609 */
2610 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
2611 {
2612 if(hi2c->XferCount != 0)
2613 {
2614 /* Write data to DR */
2615 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2616 hi2c->XferCount--;
2617 }
2618 else
2619 {
2620 /* Disable EVT, BUF and ERR interrupt */
2621 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2622
2623 /* Generate Stop */
2624 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
2625
2626 /* Wait until BUSY flag is reset */
2627 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2628 {
2629 return HAL_TIMEOUT;
2630 }
2631
2632 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
2633 {
2634 hi2c->State = HAL_I2C_STATE_READY;
2635
2636 HAL_I2C_MemTxCpltCallback(hi2c);
2637 }
2638 else
2639 {
2640 hi2c->State = HAL_I2C_STATE_READY;
2641
2642 HAL_I2C_MasterTxCpltCallback(hi2c);
2643 }
2644 }
2645 return HAL_OK;
2646 }
2647
2648 /**
2649 * @brief Handle RXNE flag for Master
2650 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2651 * the configuration information for I2C module
2652 * @retval HAL status
2653 */
2654 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
2655 {
2656 uint32_t tmp = 0;
2657
2658 tmp = hi2c->XferCount;
2659 if(tmp > 3)
2660 {
2661 /* Read data from DR */
2662 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2663 hi2c->XferCount--;
2664 }
2665 else if((tmp == 2) || (tmp == 3))
2666 {
2667 /* Disable BUF interrupt */
2668 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2669 }
2670 else
2671 {
2672 /* Disable EVT, BUF and ERR interrupt */
2673 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2674
2675 /* Read data from DR */
2676 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2677 hi2c->XferCount--;
2678
2679 /* Wait until BUSY flag is reset */
2680 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2681 {
2682 return HAL_TIMEOUT;
2683 }
2684
2685 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2686 {
2687 hi2c->State = HAL_I2C_STATE_READY;
2688
2689 HAL_I2C_MemRxCpltCallback(hi2c);
2690 }
2691 else
2692 {
2693 hi2c->State = HAL_I2C_STATE_READY;
2694
2695 HAL_I2C_MasterRxCpltCallback(hi2c);
2696 }
2697 }
2698 return HAL_OK;
2699 }
2700
2701 /**
2702 * @brief Handle BTF flag for Master receiver
2703 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2704 * the configuration information for I2C module
2705 * @retval HAL status
2706 */
2707 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
2708 {
2709 if(hi2c->XferCount == 3)
2710 {
2711 /* Disable Acknowledge */
2712 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2713
2714 /* Read data from DR */
2715 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2716 hi2c->XferCount--;
2717 }
2718 else if(hi2c->XferCount == 2)
2719 {
2720 /* Generate Stop */
2721 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
2722
2723 /* Read data from DR */
2724 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2725 hi2c->XferCount--;
2726
2727 /* Read data from DR */
2728 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2729 hi2c->XferCount--;
2730
2731 /* Disable EVT and ERR interrupt */
2732 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2733
2734 /* Wait until BUSY flag is reset */
2735 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2736 {
2737 return HAL_TIMEOUT;
2738 }
2739
2740 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2741 {
2742 hi2c->State = HAL_I2C_STATE_READY;
2743
2744 HAL_I2C_MemRxCpltCallback(hi2c);
2745 }
2746 else
2747 {
2748 hi2c->State = HAL_I2C_STATE_READY;
2749
2750 HAL_I2C_MasterRxCpltCallback(hi2c);
2751 }
2752 }
2753 else
2754 {
2755 /* Read data from DR */
2756 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2757 hi2c->XferCount--;
2758 }
2759 return HAL_OK;
2760 }
2761
2762 /**
2763 * @brief Handle TXE flag for Slave
2764 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2765 * the configuration information for I2C module
2766 * @retval HAL status
2767 */
2768 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
2769 {
2770 if(hi2c->XferCount != 0)
2771 {
2772 /* Write data to DR */
2773 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2774 hi2c->XferCount--;
2775 }
2776 return HAL_OK;
2777 }
2778
2779 /**
2780 * @brief Handle BTF flag for Slave transmitter
2781 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2782 * the configuration information for I2C module
2783 * @retval HAL status
2784 */
2785 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
2786 {
2787 if(hi2c->XferCount != 0)
2788 {
2789 /* Write data to DR */
2790 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2791 hi2c->XferCount--;
2792 }
2793 return HAL_OK;
2794 }
2795
2796 /**
2797 * @brief Handle RXNE flag for Slave
2798 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2799 * the configuration information for I2C module
2800 * @retval HAL status
2801 */
2802 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
2803 {
2804 if(hi2c->XferCount != 0)
2805 {
2806 /* Read data from DR */
2807 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2808 hi2c->XferCount--;
2809 }
2810 return HAL_OK;
2811 }
2812
2813 /**
2814 * @brief Handle BTF flag for Slave receiver
2815 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2816 * the configuration information for I2C module
2817 * @retval HAL status
2818 */
2819 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
2820 {
2821 if(hi2c->XferCount != 0)
2822 {
2823 /* Read data from DR */
2824 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2825 hi2c->XferCount--;
2826 }
2827 return HAL_OK;
2828 }
2829
2830 /**
2831 * @brief Handle ADD flag for Slave
2832 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2833 * the configuration information for I2C module
2834 * @retval HAL status
2835 */
2836 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
2837 {
2838 /* Clear ADDR flag */
2839 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2840
2841 return HAL_OK;
2842 }
2843
2844 /**
2845 * @brief Handle STOPF flag for Slave
2846 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2847 * the configuration information for I2C module
2848 * @retval HAL status
2849 */
2850 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
2851 {
2852 /* Disable EVT, BUF and ERR interrupt */
2853 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2854
2855 /* Clear STOPF flag */
2856 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
2857
2858 /* Disable Acknowledge */
2859 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2860
2861 /* Wait until BUSY flag is reset */
2862 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2863 {
2864 return HAL_TIMEOUT;
2865 }
2866
2867 hi2c->State = HAL_I2C_STATE_READY;
2868
2869 HAL_I2C_SlaveRxCpltCallback(hi2c);
2870
2871 return HAL_OK;
2872 }
2873
2874 /**
2875 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2876 * the configuration information for I2C module
2877 * @retval HAL status
2878 */
2879 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
2880 {
2881 /* Disable EVT, BUF and ERR interrupt */
2882 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2883
2884 /* Clear AF flag */
2885 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2886
2887 /* Disable Acknowledge */
2888 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2889
2890 /* Wait until BUSY flag is reset */
2891 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2892 {
2893 return HAL_TIMEOUT;
2894 }
2895
2896 hi2c->State = HAL_I2C_STATE_READY;
2897
2898 HAL_I2C_SlaveTxCpltCallback(hi2c);
2899
2900 return HAL_OK;
2901 }
2902
2903 /**
2904 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2905 * the configuration information for I2C module
2906 * @param DevAddress: Target device address
2907 * @param Timeout: Timeout duration
2908 * @retval HAL status
2909 */
2910 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
2911 {
2912 /* Generate Start */
2913 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2914
2915 /* Wait until SB flag is set */
2916 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2917 {
2918 return HAL_TIMEOUT;
2919 }
2920
2921 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
2922 {
2923 /* Send slave address */
2924 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2925 }
2926 else
2927 {
2928 /* Send header of slave address */
2929 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
2930
2931 /* Wait until ADD10 flag is set */
2932 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
2933 {
2934 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2935 {
2936 return HAL_ERROR;
2937 }
2938 else
2939 {
2940 return HAL_TIMEOUT;
2941 }
2942 }
2943
2944 /* Send slave address */
2945 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
2946 }
2947
2948 /* Wait until ADDR flag is set */
2949 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
2950 {
2951 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2952 {
2953 return HAL_ERROR;
2954 }
2955 else
2956 {
2957 return HAL_TIMEOUT;
2958 }
2959 }
2960
2961 return HAL_OK;
2962 }
2963
2964 /**
2965 * @brief Master sends target device address for read request.
2966 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2967 * the configuration information for I2C module
2968 * @param DevAddress: Target device address
2969 * @param Timeout: Timeout duration
2970 * @retval HAL status
2971 */
2972 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
2973 {
2974 /* Enable Acknowledge */
2975 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2976
2977 /* Generate Start */
2978 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2979
2980 /* Wait until SB flag is set */
2981 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2982 {
2983 return HAL_TIMEOUT;
2984 }
2985
2986 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
2987 {
2988 /* Send slave address */
2989 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
2990 }
2991 else
2992 {
2993 /* Send header of slave address */
2994 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
2995
2996 /* Wait until ADD10 flag is set */
2997 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
2998 {
2999 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3000 {
3001 return HAL_ERROR;
3002 }
3003 else
3004 {
3005 return HAL_TIMEOUT;
3006 }
3007 }
3008
3009 /* Send slave address */
3010 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3011
3012 /* Wait until ADDR flag is set */
3013 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3014 {
3015 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3016 {
3017 return HAL_ERROR;
3018 }
3019 else
3020 {
3021 return HAL_TIMEOUT;
3022 }
3023 }
3024
3025 /* Clear ADDR flag */
3026 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3027
3028 /* Generate Restart */
3029 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3030
3031 /* Wait until SB flag is set */
3032 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3033 {
3034 return HAL_TIMEOUT;
3035 }
3036
3037 /* Send header of slave address */
3038 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
3039 }
3040
3041 /* Wait until ADDR flag is set */
3042 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3043 {
3044 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3045 {
3046 return HAL_ERROR;
3047 }
3048 else
3049 {
3050 return HAL_TIMEOUT;
3051 }
3052 }
3053
3054 return HAL_OK;
3055 }
3056
3057 /**
3058 * @brief Master sends target device address followed by internal memory address for write request.
3059 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3060 * the configuration information for I2C module
3061 * @param DevAddress: Target device address
3062 * @param MemAddress: Internal memory address
3063 * @param MemAddSize: Size of internal memory address
3064 * @param Timeout: Timeout duration
3065 * @retval HAL status
3066 */
3067 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3068 {
3069 /* Generate Start */
3070 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3071
3072 /* Wait until SB flag is set */
3073 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3074 {
3075 return HAL_TIMEOUT;
3076 }
3077
3078 /* Send slave address */
3079 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3080
3081 /* Wait until ADDR flag is set */
3082 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3083 {
3084 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3085 {
3086 return HAL_ERROR;
3087 }
3088 else
3089 {
3090 return HAL_TIMEOUT;
3091 }
3092 }
3093
3094 /* Clear ADDR flag */
3095 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3096
3097 /* Wait until TXE flag is set */
3098 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3099 {
3100 return HAL_TIMEOUT;
3101 }
3102
3103 /* If Memory address size is 8Bit */
3104 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3105 {
3106 /* Send Memory Address */
3107 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3108 }
3109 /* If Memory address size is 16Bit */
3110 else
3111 {
3112 /* Send MSB of Memory Address */
3113 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3114
3115 /* Wait until TXE flag is set */
3116 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3117 {
3118 return HAL_TIMEOUT;
3119 }
3120
3121 /* Send LSB of Memory Address */
3122 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3123 }
3124
3125 return HAL_OK;
3126 }
3127
3128 /**
3129 * @brief Master sends target device address followed by internal memory address for read request.
3130 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3131 * the configuration information for I2C module
3132 * @param DevAddress: Target device address
3133 * @param MemAddress: Internal memory address
3134 * @param MemAddSize: Size of internal memory address
3135 * @param Timeout: Timeout duration
3136 * @retval HAL status
3137 */
3138 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3139 {
3140 /* Enable Acknowledge */
3141 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3142
3143 /* Generate Start */
3144 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3145
3146 /* Wait until SB flag is set */
3147 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3148 {
3149 return HAL_TIMEOUT;
3150 }
3151
3152 /* Send slave address */
3153 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3154
3155 /* Wait until ADDR flag is set */
3156 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3157 {
3158 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3159 {
3160 return HAL_ERROR;
3161 }
3162 else
3163 {
3164 return HAL_TIMEOUT;
3165 }
3166 }
3167
3168 /* Clear ADDR flag */
3169 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3170
3171 /* Wait until TXE flag is set */
3172 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3173 {
3174 return HAL_TIMEOUT;
3175 }
3176
3177 /* If Memory address size is 8Bit */
3178 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3179 {
3180 /* Send Memory Address */
3181 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3182 }
3183 /* If Memory address size is 16Bit */
3184 else
3185 {
3186 /* Send MSB of Memory Address */
3187 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3188
3189 /* Wait until TXE flag is set */
3190 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3191 {
3192 return HAL_TIMEOUT;
3193 }
3194
3195 /* Send LSB of Memory Address */
3196 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3197 }
3198
3199 /* Wait until TXE flag is set */
3200 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3201 {
3202 return HAL_TIMEOUT;
3203 }
3204
3205 /* Generate Restart */
3206 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3207
3208 /* Wait until SB flag is set */
3209 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3210 {
3211 return HAL_TIMEOUT;
3212 }
3213
3214 /* Send slave address */
3215 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3216
3217 /* Wait until ADDR flag is set */
3218 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3219 {
3220 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3221 {
3222 return HAL_ERROR;
3223 }
3224 else
3225 {
3226 return HAL_TIMEOUT;
3227 }
3228 }
3229
3230 return HAL_OK;
3231 }
3232
3233 /**
3234 * @brief DMA I2C master transmit process complete callback.
3235 * @param hdma: DMA handle
3236 * @retval None
3237 */
3238 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
3239 {
3240 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3241
3242 /* Wait until BTF flag is reset */
3243 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3244 {
3245 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3246 }
3247
3248 /* Generate Stop */
3249 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3250
3251 /* Disable DMA Request */
3252 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3253
3254 hi2c->XferCount = 0;
3255
3256 /* Wait until BUSY flag is reset */
3257 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3258 {
3259 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3260 }
3261
3262 hi2c->State = HAL_I2C_STATE_READY;
3263
3264 /* Check if Errors has been detected during transfer */
3265 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3266 {
3267 HAL_I2C_ErrorCallback(hi2c);
3268 }
3269 else
3270 {
3271 HAL_I2C_MasterTxCpltCallback(hi2c);
3272 }
3273 }
3274
3275 /**
3276 * @brief DMA I2C slave transmit process complete callback.
3277 * @param hdma: DMA handle
3278 * @retval None
3279 */
3280 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
3281 {
3282 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3283
3284 /* Wait until AF flag is reset */
3285 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3286 {
3287 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3288 }
3289
3290 /* Clear AF flag */
3291 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3292
3293 /* Disable Address Acknowledge */
3294 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3295
3296 /* Disable DMA Request */
3297 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3298
3299 hi2c->XferCount = 0;
3300
3301 /* Wait until BUSY flag is reset */
3302 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3303 {
3304 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3305 }
3306
3307 hi2c->State = HAL_I2C_STATE_READY;
3308
3309 /* Check if Errors has been detected during transfer */
3310 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3311 {
3312 HAL_I2C_ErrorCallback(hi2c);
3313 }
3314 else
3315 {
3316 HAL_I2C_SlaveTxCpltCallback(hi2c);
3317 }
3318 }
3319
3320 /**
3321 * @brief DMA I2C master receive process complete callback
3322 * @param hdma: DMA handle
3323 * @retval None
3324 */
3325 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
3326 {
3327 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3328
3329 /* Generate Stop */
3330 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3331
3332 /* Disable Last DMA */
3333 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3334
3335 /* Disable Acknowledge */
3336 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3337
3338 /* Disable DMA Request */
3339 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3340
3341 hi2c->XferCount = 0;
3342
3343 /* Wait until BUSY flag is reset */
3344 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3345 {
3346 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3347 }
3348
3349 hi2c->State = HAL_I2C_STATE_READY;
3350
3351 /* Check if Errors has been detected during transfer */
3352 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3353 {
3354 HAL_I2C_ErrorCallback(hi2c);
3355 }
3356 else
3357 {
3358 HAL_I2C_MasterRxCpltCallback(hi2c);
3359 }
3360 }
3361
3362 /**
3363 * @brief DMA I2C slave receive process complete callback.
3364 * @param hdma: DMA handle
3365 * @retval None
3366 */
3367 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
3368 {
3369 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3370
3371 /* Wait until STOPF flag is reset */
3372 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3373 {
3374 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3375 }
3376
3377 /* Clear STOPF flag */
3378 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3379
3380 /* Disable Address Acknowledge */
3381 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3382
3383 /* Disable DMA Request */
3384 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3385
3386 hi2c->XferCount = 0;
3387
3388 /* Wait until BUSY flag is reset */
3389 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3390 {
3391 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3392 }
3393
3394 hi2c->State = HAL_I2C_STATE_READY;
3395
3396 /* Check if Errors has been detected during transfer */
3397 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3398 {
3399 HAL_I2C_ErrorCallback(hi2c);
3400 }
3401 else
3402 {
3403 HAL_I2C_SlaveRxCpltCallback(hi2c);
3404 }
3405 }
3406
3407 /**
3408 * @brief DMA I2C Memory Write process complete callback
3409 * @param hdma: DMA handle
3410 * @retval None
3411 */
3412 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
3413 {
3414 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3415
3416 /* Wait until BTF flag is reset */
3417 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3418 {
3419 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3420 }
3421
3422 /* Generate Stop */
3423 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3424
3425 /* Disable DMA Request */
3426 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3427
3428 hi2c->XferCount = 0;
3429
3430 /* Wait until BUSY flag is reset */
3431 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3432 {
3433 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3434 }
3435
3436 hi2c->State = HAL_I2C_STATE_READY;
3437
3438 /* Check if Errors has been detected during transfer */
3439 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3440 {
3441 HAL_I2C_ErrorCallback(hi2c);
3442 }
3443 else
3444 {
3445 HAL_I2C_MemTxCpltCallback(hi2c);
3446 }
3447 }
3448
3449 /**
3450 * @brief DMA I2C Memory Read process complete callback
3451 * @param hdma: DMA handle
3452 * @retval None
3453 */
3454 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
3455 {
3456 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3457
3458 /* Generate Stop */
3459 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3460
3461 /* Disable Last DMA */
3462 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3463
3464 /* Disable Acknowledge */
3465 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3466
3467 /* Disable DMA Request */
3468 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3469
3470 hi2c->XferCount = 0;
3471
3472 /* Wait until BUSY flag is reset */
3473 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3474 {
3475 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3476 }
3477
3478 hi2c->State = HAL_I2C_STATE_READY;
3479
3480 /* Check if Errors has been detected during transfer */
3481 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3482 {
3483 HAL_I2C_ErrorCallback(hi2c);
3484 }
3485 else
3486 {
3487 HAL_I2C_MemRxCpltCallback(hi2c);
3488 }
3489 }
3490
3491 /**
3492 * @brief DMA I2C communication error callback.
3493 * @param hdma: DMA handle
3494 * @retval None
3495 */
3496 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
3497 {
3498 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3499
3500 /* Disable Acknowledge */
3501 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3502
3503 hi2c->XferCount = 0;
3504
3505 hi2c->State = HAL_I2C_STATE_READY;
3506
3507 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
3508
3509 HAL_I2C_ErrorCallback(hi2c);
3510 }
3511
3512 /**
3513 * @brief This function handles I2C Communication Timeout.
3514 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3515 * the configuration information for I2C module
3516 * @param Flag: specifies the I2C flag to check.
3517 * @param Status: The new Flag status (SET or RESET).
3518 * @param Timeout: Timeout duration
3519 * @retval HAL status
3520 */
3521 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
3522 {
3523 uint32_t tickstart = 0;
3524
3525 /* Get tick */
3526 tickstart = HAL_GetTick();
3527
3528 /* Wait until flag is set */
3529 if(Status == RESET)
3530 {
3531 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3532 {
3533 /* Check for the Timeout */
3534 if(Timeout != HAL_MAX_DELAY)
3535 {
3536 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3537 {
3538 hi2c->State= HAL_I2C_STATE_READY;
3539
3540 /* Process Unlocked */
3541 __HAL_UNLOCK(hi2c);
3542
3543 return HAL_TIMEOUT;
3544 }
3545 }
3546 }
3547 }
3548 else
3549 {
3550 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
3551 {
3552 /* Check for the Timeout */
3553 if(Timeout != HAL_MAX_DELAY)
3554 {
3555 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3556 {
3557 hi2c->State= HAL_I2C_STATE_READY;
3558
3559 /* Process Unlocked */
3560 __HAL_UNLOCK(hi2c);
3561
3562 return HAL_TIMEOUT;
3563 }
3564 }
3565 }
3566 }
3567 return HAL_OK;
3568 }
3569
3570 /**
3571 * @brief This function handles I2C Communication Timeout for Master addressing phase.
3572 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3573 * the configuration information for I2C module
3574 * @param Flag: specifies the I2C flag to check.
3575 * @param Timeout: Timeout duration
3576 * @retval HAL status
3577 */
3578 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
3579 {
3580 uint32_t tickstart = 0;
3581
3582 /* Get tick */
3583 tickstart = HAL_GetTick();
3584
3585 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3586 {
3587 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
3588 {
3589 /* Generate Stop */
3590 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3591
3592 /* Clear AF Flag */
3593 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3594
3595 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
3596 hi2c->State= HAL_I2C_STATE_READY;
3597
3598 /* Process Unlocked */
3599 __HAL_UNLOCK(hi2c);
3600
3601 return HAL_ERROR;
3602 }
3603
3604 /* Check for the Timeout */
3605 if(Timeout != HAL_MAX_DELAY)
3606 {
3607 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3608 {
3609 hi2c->State= HAL_I2C_STATE_READY;
3610
3611 /* Process Unlocked */
3612 __HAL_UNLOCK(hi2c);
3613
3614 return HAL_TIMEOUT;
3615 }
3616 }
3617 }
3618 return HAL_OK;
3619 }
3620
3621 /**
3622 * @}
3623 */
3624
3625 #endif /* HAL_I2C_MODULE_ENABLED */
3626
3627 /**
3628 * @}
3629 */
3630
3631 /**
3632 * @}
3633 */
3634
3635 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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