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1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_i2c.h
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief Header file of I2C HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_I2C_H
40 #define __STM32L1xx_HAL_I2C_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx_hal_def.h"
48
49 /** @addtogroup STM32L1xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup I2C
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup I2C_Exported_Types I2C Exported Types
59 * @{
60 */
61
62 /**
63 * @brief I2C Configuration Structure definition
64 */
65 typedef struct
66 {
67 uint32_t ClockSpeed; /*!< Specifies the clock frequency.
68 This parameter must be set to a value lower than 400kHz */
69
70 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
71 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
72
73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
74 This parameter can be a 7-bit or 10-bit address. */
75
76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
77 This parameter can be a value of @ref I2C_addressing_mode */
78
79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
80 This parameter can be a value of @ref I2C_dual_addressing_mode */
81
82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
83 This parameter can be a 7-bit address. */
84
85 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
86 This parameter can be a value of @ref I2C_general_call_addressing_mode */
87
88 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
89 This parameter can be a value of @ref I2C_nostretch_mode */
90
91 }I2C_InitTypeDef;
92
93 /**
94 * @brief HAL State structures definition
95 */
96 typedef enum
97 {
98 HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */
99 HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */
100 HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */
101 HAL_I2C_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
102 HAL_I2C_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
103 HAL_I2C_STATE_MEM_BUSY_TX = 0x32, /*!< Memory Data Transmission process is ongoing */
104 HAL_I2C_STATE_MEM_BUSY_RX = 0x42, /*!< Memory Data Reception process is ongoing */
105 HAL_I2C_STATE_TIMEOUT = 0x03, /*!< I2C timeout state */
106 HAL_I2C_STATE_ERROR = 0x04 /*!< I2C error state */
107
108 }HAL_I2C_StateTypeDef;
109
110 /**
111 * @brief HAL I2C Error Code structure definition
112 */
113 typedef enum
114 {
115 HAL_I2C_ERROR_NONE = 0x00, /*!< No error */
116 HAL_I2C_ERROR_BERR = 0x01, /*!< BERR error */
117 HAL_I2C_ERROR_ARLO = 0x02, /*!< ARLO error */
118 HAL_I2C_ERROR_AF = 0x04, /*!< AF error */
119 HAL_I2C_ERROR_OVR = 0x08, /*!< OVR error */
120 HAL_I2C_ERROR_DMA = 0x10, /*!< DMA transfer error */
121 HAL_I2C_ERROR_TIMEOUT = 0x20 /*!< Timeout error */
122
123 }HAL_I2C_ErrorTypeDef;
124
125 /**
126 * @brief I2C handle Structure definition
127 */
128 typedef struct
129 {
130 I2C_TypeDef *Instance; /*!< I2C registers base address */
131
132 I2C_InitTypeDef Init; /*!< I2C communication parameters */
133
134 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
135
136 uint16_t XferSize; /*!< I2C transfer size */
137
138 __IO uint16_t XferCount; /*!< I2C transfer counter */
139
140 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
141
142 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
143
144 HAL_LockTypeDef Lock; /*!< I2C locking object */
145
146 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
147
148 __IO HAL_I2C_ErrorTypeDef ErrorCode; /* I2C Error code */
149
150 }I2C_HandleTypeDef;
151 /**
152 * @}
153 */
154
155
156 /* Exported constants --------------------------------------------------------*/
157
158 /** @defgroup I2C_Exported_Constants I2C Exported Constants
159 * @{
160 */
161
162 /** @defgroup I2C_duty_cycle_in_fast_mode I2C_duty_cycle_in_fast_mode
163 * @{
164 */
165 #define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000)
166 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
167
168 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
169 ((CYCLE) == I2C_DUTYCYCLE_16_9))
170 /**
171 * @}
172 */
173
174 /** @defgroup I2C_addressing_mode I2C_addressing_mode
175 * @{
176 */
177 #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000)
178 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000))
179
180 #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
181 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
182 /**
183 * @}
184 */
185
186 /** @defgroup I2C_dual_addressing_mode I2C_dual_addressing_mode
187 * @{
188 */
189 #define I2C_DUALADDRESS_DISABLED ((uint32_t)0x00000000)
190 #define I2C_DUALADDRESS_ENABLED I2C_OAR2_ENDUAL
191
192 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) || \
193 ((ADDRESS) == I2C_DUALADDRESS_ENABLED))
194 /**
195 * @}
196 */
197
198 /** @defgroup I2C_general_call_addressing_mode I2C_general_call_addressing_mode
199 * @{
200 */
201 #define I2C_GENERALCALL_DISABLED ((uint32_t)0x00000000)
202 #define I2C_GENERALCALL_ENABLED I2C_CR1_ENGC
203
204 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) || \
205 ((CALL) == I2C_GENERALCALL_ENABLED))
206 /**
207 * @}
208 */
209
210 /** @defgroup I2C_nostretch_mode I2C_nostretch_mode
211 * @{
212 */
213 #define I2C_NOSTRETCH_DISABLED ((uint32_t)0x00000000)
214 #define I2C_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH
215
216 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) || \
217 ((STRETCH) == I2C_NOSTRETCH_ENABLED))
218 /**
219 * @}
220 */
221
222 /** @defgroup I2C_Memory_Address_Size I2C_Memory_Address_Size
223 * @{
224 */
225 #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
226 #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010)
227
228 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
229 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
230 /**
231 * @}
232 */
233
234 /** @defgroup I2C_Interrupt_configuration_definition I2C_Interrupt_configuration_definition
235 * @{
236 */
237 #define I2C_IT_BUF I2C_CR2_ITBUFEN
238 #define I2C_IT_EVT I2C_CR2_ITEVTEN
239 #define I2C_IT_ERR I2C_CR2_ITERREN
240 /**
241 * @}
242 */
243
244 /** @defgroup I2C_Flag_definition I2C_Flag_definition
245 * @{
246 */
247 #define I2C_FLAG_OVR ((uint32_t)(1 << 16 | I2C_SR1_OVR))
248 #define I2C_FLAG_AF ((uint32_t)(1 << 16 | I2C_SR1_AF))
249 #define I2C_FLAG_ARLO ((uint32_t)(1 << 16 | I2C_SR1_ARLO))
250 #define I2C_FLAG_BERR ((uint32_t)(1 << 16 | I2C_SR1_BERR))
251 #define I2C_FLAG_TXE ((uint32_t)(1 << 16 | I2C_SR1_TXE))
252 #define I2C_FLAG_RXNE ((uint32_t)(1 << 16 | I2C_SR1_RXNE))
253 #define I2C_FLAG_STOPF ((uint32_t)(1 << 16 | I2C_SR1_STOPF))
254 #define I2C_FLAG_ADD10 ((uint32_t)(1 << 16 | I2C_SR1_ADD10))
255 #define I2C_FLAG_BTF ((uint32_t)(1 << 16 | I2C_SR1_BTF))
256 #define I2C_FLAG_ADDR ((uint32_t)(1 << 16 | I2C_SR1_ADDR))
257 #define I2C_FLAG_SB ((uint32_t)(1 << 16 | I2C_SR1_SB))
258 #define I2C_FLAG_DUALF ((uint32_t)(2 << 16 | I2C_SR2_DUALF))
259 #define I2C_FLAG_GENCALL ((uint32_t)(2 << 16 | I2C_SR2_GENCALL))
260 #define I2C_FLAG_TRA ((uint32_t)(2 << 16 | I2C_SR2_TRA))
261 #define I2C_FLAG_BUSY ((uint32_t)(2 << 16 | I2C_SR2_BUSY))
262 #define I2C_FLAG_MSL ((uint32_t)(2 << 16 | I2C_SR2_MSL))
263
264
265 #define I2C_FLAG_MASK ((uint32_t)0x0000FFFF)
266
267 /**
268 * @}
269 */
270
271 /** @defgroup I2C_Clock_Speed_definition I2C_Clock_Speed_definition
272 * @{
273 */
274 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000))
275 /**
276 * @}
277 */
278
279 /** @defgroup I2C_Own_Address1_definition I2C_Own_Address1_definition
280 * @{
281 */
282 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00)) == 0)
283 /**
284 * @}
285 */
286
287 /** @defgroup I2C_Own_Address2_definition I2C_Own_Address2_definition
288 * @{
289 */
290 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01)) == 0)
291 /**
292 * @}
293 */
294
295
296 /**
297 * @}
298 */
299
300 /* Exported macro ------------------------------------------------------------*/
301 /** @defgroup I2C_Exported_Macros I2C Exported Macros
302 * @{
303 */
304
305 /** @brief Reset I2C handle state
306 * @param __HANDLE__: specifies the I2C Handle.
307 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
308 * @retval None
309 */
310 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
311
312 /** @brief Enable or disable the specified I2C interrupts.
313 * @param __HANDLE__: specifies the I2C Handle.
314 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
315 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
316 * This parameter can be one of the following values:
317 * @arg I2C_IT_BUF: Buffer interrupt enable
318 * @arg I2C_IT_EVT: Event interrupt enable
319 * @arg I2C_IT_ERR: Error interrupt enable
320 * @retval None
321 */
322
323 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
324 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
325
326 /** @brief Checks if the specified I2C interrupt source is enabled or disabled.
327 * @param __HANDLE__: specifies the I2C Handle.
328 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
329 * @param __INTERRUPT__: specifies the I2C interrupt source to check.
330 * This parameter can be one of the following values:
331 * @arg I2C_IT_BUF: Buffer interrupt enable
332 * @arg I2C_IT_EVT: Event interrupt enable
333 * @arg I2C_IT_ERR: Error interrupt enable
334 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
335 */
336 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
337
338 /** @brief Checks whether the specified I2C flag is set or not.
339 * @param __HANDLE__: specifies the I2C Handle.
340 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
341 * @param __FLAG__: specifies the flag to check.
342 * This parameter can be one of the following values:
343 * @arg I2C_FLAG_OVR: Overrun/Underrun flag
344 * @arg I2C_FLAG_AF: Acknowledge failure flag
345 * @arg I2C_FLAG_ARLO: Arbitration lost flag
346 * @arg I2C_FLAG_BERR: Bus error flag
347 * @arg I2C_FLAG_TXE: Data register empty flag
348 * @arg I2C_FLAG_RXNE: Data register not empty flag
349 * @arg I2C_FLAG_STOPF: Stop detection flag
350 * @arg I2C_FLAG_ADD10: 10-bit header sent flag
351 * @arg I2C_FLAG_BTF: Byte transfer finished flag
352 * @arg I2C_FLAG_ADDR: Address sent flag
353 * Address matched flag
354 * @arg I2C_FLAG_SB: Start bit flag
355 * @arg I2C_FLAG_DUALF: Dual flag
356 * @arg I2C_FLAG_GENCALL: General call header flag
357 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
358 * @arg I2C_FLAG_BUSY: Bus busy flag
359 * @arg I2C_FLAG_MSL: Master/Slave flag
360 * @retval The new state of __FLAG__ (TRUE or FALSE).
361 */
362 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16)) == 0x01)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \
363 ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
364
365 /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
366 * @param __HANDLE__: specifies the I2C Handle.
367 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
368 * @param __FLAG__: specifies the flag to clear.
369 * This parameter can be any combination of the following values:
370 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
371 * @arg I2C_FLAG_AF: Acknowledge failure flag
372 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
373 * @arg I2C_FLAG_BERR: Bus error flag
374 * @retval None
375 */
376 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
377
378 /** @brief Clears the I2C ADDR pending flag.
379 * @param __HANDLE__: specifies the I2C Handle.
380 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
381 * @retval None
382 */
383
384 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
385 (__HANDLE__)->Instance->SR2;}while(0)
386
387 /** @brief Clears the I2C STOPF pending flag.
388 * @param __HANDLE__: specifies the I2C Handle.
389 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
390 * @retval None
391 */
392 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
393 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE);}while(0)
394
395 /** @brief Enable the I2C peripheral.
396 * @param __HANDLE__: specifies the I2C Handle.
397 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
398 * @retval None
399 */
400 #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
401
402 /** @brief Disable the I2C peripheral.
403 * @param __HANDLE__: specifies the I2C Handle.
404 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
405 * @retval None
406 */
407 #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
408
409 /**
410 * @}
411 */
412
413 /** @defgroup I2C_Private_Macros I2C Private Macros
414 * @{
415 */
416
417 #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000)
418 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000) ? ((__FREQRANGE__) + 1) : ((((__FREQRANGE__) * 300) / 1000) + 1))
419 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1)) & I2C_CCR_CCR) < 4)? 4:((__PCLK__) / ((__SPEED__) << 1)))
420 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3)) : (((__PCLK__) / ((__SPEED__) * 25)) | I2C_DUTYCYCLE_16_9))
421 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
422 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0)? 1 : \
423 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
424
425 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
426 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
427
428 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
429 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0))))
430 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1))))
431
432 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
433 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
434
435 /**
436 * @}
437 */
438
439
440 /* Exported functions --------------------------------------------------------*/
441 /** @addtogroup I2C_Exported_Functions
442 * @{
443 */
444
445 /* Initialization/de-initialization functions **********************************/
446 /** @addtogroup I2C_Exported_Functions_Group1
447 * @{
448 */
449
450 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
451 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
452 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
453 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
454
455 /**
456 * @}
457 */
458
459
460 /* I/O operation functions *****************************************************/
461 /** @addtogroup I2C_Exported_Functions_Group2
462 * @{
463 */
464
465 /******* Blocking mode: Polling */
466 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
467 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
468 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
469 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
470 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
471 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
472 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
473
474 /******* Non-Blocking mode: Interrupt */
475 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
476 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
477 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
478 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
479 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
480 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
481
482 /******* Non-Blocking mode: DMA */
483 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
484 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
485 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
486 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
487 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
488 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
489
490 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
491 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
492 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
493 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
494 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
495 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
496 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
497 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
498 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
499 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
500
501 /**
502 * @}
503 */
504
505
506 /* Peripheral Control and State functions **************************************/
507 /** @addtogroup I2C_Exported_Functions_Group3
508 * @{
509 */
510
511 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
512 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
513 /**
514 * @}
515 */
516
517 /**
518 * @}
519 */
520
521
522
523 /**
524 * @}
525 */
526
527 /**
528 * @}
529 */
530
531 #ifdef __cplusplus
532 }
533 #endif
534
535
536 #endif /* __STM32L1xx_HAL_I2C_H */
537
538 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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