tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/i2c_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2015 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include "mbed_assert.h"
  17 #include "i2c_api.h"
  18
  19 #include "cmsis.h"
  20 #include "pinmap.h"
  21 #include "clk_freqs.h"
  22 #include "PeripheralPins.h"
  23
  24 static const uint16_t ICR[0x40] = {
  25       20,   22,   24,   26,   28,
  26       30,   34,   40,   28,   32,
  27       36,   40,   44,   48,   56,
  28       68,   48,   56,   64,   72,
  29       80,   88,  104,  128,   80,
  30       96,  112,  128,  144,  160,
  31       192,  240,  160,  192,  224,
  32       256,  288,  320,  384,  480,
  33       320,  384,  448,  512,  576,
  34       640,  768,  960,  640,  768,
  35       896, 1024, 1152, 1280, 1536,
  36       1920, 1280, 1536, 1792, 2048,
  37       2304, 2560, 3072, 3840
  38 };
  39
  40
  41 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
  42     // determine the I2C to use
  43     I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
  44     I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
  45     obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
  46     MBED_ASSERT((int)obj->i2c != NC);
  47
  48 #if defined(TARGET_K20DX256)
  49     switch ((int)obj->i2c) {
  50         case I2C_0: SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
  51         case I2C_1: SIM->SCGC4 |= SIM_SCGC4_I2C1_MASK;
  52     }
  53 #else
  54     SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
  55 #endif
  56
  57     // set default frequency at 100k
  58     i2c_frequency(obj, 100000);
  59
  60     // enable I2C interface
  61     obj->i2c->C1 |= 0x80;
  62
  63     pinmap_pinout(sda, PinMap_I2C_SDA);
  64     pinmap_pinout(scl, PinMap_I2C_SCL);
  65     /* enable open drain for I2C pins, only port b available */
  66     uint32_t pin_n  = (uint32_t)(sda & 0x7C) >> 2;
  67     PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
  68     pin_n  = (uint32_t)(scl & 0x7C) >> 2;
  69     PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
  70 }
  71
  72 int i2c_start(i2c_t *obj) {
  73     // if we are in the middle of a transaction
  74     // activate the repeat_start flag
  75     if (obj->i2c->S & I2C_S_BUSY_MASK) {
  76         obj->i2c->C1 |= 0x04;
  77     } else {
  78         obj->i2c->C1 |= I2C_C1_MST_MASK;
  79         obj->i2c->C1 |= I2C_C1_TX_MASK;
  80     }
  81     return 0;
  82 }
  83
  84 int i2c_stop(i2c_t *obj) {
  85     volatile uint32_t n = 0;
  86     obj->i2c->C1 &= ~I2C_C1_MST_MASK;
  87     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
  88
  89     // It seems that there are timing problems
  90     // when there is no waiting time after a STOP.
  91     // This wait is also included on the samples
  92     // code provided with the freedom board
  93     for (n = 0; n < 100; n++)
  94         __NOP();
  95     return 0;
  96 }
  97
  98 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
  99     uint32_t i, timeout = 100000;
 100
 101     for (i = 0; i < timeout; i++) {
 102         if (obj->i2c->S & mask)
 103             return 0;
 104     }
 105
 106     return 1;
 107 }
 108
 109 // this function waits the end of a tx transfer and return the status of the transaction:
 110 //    0: OK ack received
 111 //    1: OK ack not received
 112 //    2: failure
 113 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
 114
 115     // wait for the interrupt flag
 116     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
 117         return 2;
 118     }
 119
 120     obj->i2c->S |= I2C_S_IICIF_MASK;
 121
 122     // wait transfer complete
 123     if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
 124         return 2;
 125     }
 126
 127     // check if we received the ACK or not
 128     return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
 129 }
 130
 131 // this function waits the end of a rx transfer and return the status of the transaction:
 132 //    0: OK
 133 //    1: failure
 134 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
 135     // wait for the end of the rx transfer
 136     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
 137         return 1;
 138     }
 139
 140     obj->i2c->S |= I2C_S_IICIF_MASK;
 141
 142     return 0;
 143 }
 144
 145 static void i2c_send_nack(i2c_t *obj) {
 146     obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
 147 }
 148
 149 static void i2c_send_ack(i2c_t *obj) {
 150     obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
 151 }
 152
 153 static int i2c_do_write(i2c_t *obj, int value) {
 154     // write the data
 155     obj->i2c->D = value;
 156
 157     // init and wait the end of the transfer
 158     return i2c_wait_end_tx_transfer(obj);
 159 }
 160
 161 static int i2c_do_read(i2c_t *obj, char * data, int last) {
 162     if (last) {
 163         i2c_send_nack(obj);
 164     } else {
 165         i2c_send_ack(obj);
 166     }
 167
 168     *data = (obj->i2c->D & 0xFF);
 169
 170     // start rx transfer and wait the end of the transfer
 171     return i2c_wait_end_rx_transfer(obj);
 172 }
 173
 174 void i2c_frequency(i2c_t *obj, int hz) {
 175     uint8_t icr = 0;
 176     uint8_t mult = 0;
 177     uint32_t error = 0;
 178     uint32_t p_error = 0xffffffff;
 179     uint32_t ref = 0;
 180     uint8_t i, j;
 181     // bus clk
 182     uint32_t PCLK = bus_frequency();
 183     uint32_t pulse = PCLK / (hz * 2);
 184
 185     // we look for the values that minimize the error
 186
 187     // test all the MULT values
 188     for (i = 1; i < 5; i*=2) {
 189         for (j = 0; j < 0x40; j++) {
 190             ref = PCLK / (i*ICR[j]);
 191             if (ref > (uint32_t)hz)
 192                 continue;
 193             error = hz - ref;
 194             if (error < p_error) {
 195                 icr = j;
 196                 mult = i/2;
 197                 p_error = error;
 198             }
 199         }
 200     }
 201     pulse = icr | (mult << 6);
 202
 203     // I2C Rate
 204     obj->i2c->F = pulse;
 205 }
 206
 207 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
 208     int count;
 209     char dummy_read, *ptr;
 210
 211     if (i2c_start(obj)) {
 212         i2c_stop(obj);
 213         return I2C_ERROR_BUS_BUSY;
 214     }
 215
 216     if (i2c_do_write(obj, (address | 0x01))) {
 217         i2c_stop(obj);
 218         return I2C_ERROR_NO_SLAVE;
 219     }
 220
 221     // set rx mode
 222     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 223
 224     // Read in bytes
 225     for (count = 0; count < (length); count++) {
 226         ptr = (count == 0) ? &dummy_read : &data[count - 1];
 227         uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
 228         if (i2c_do_read(obj, ptr, stop_)) {
 229             i2c_stop(obj);
 230             return count;
 231         }
 232     }
 233
 234     // If not repeated start, send stop.
 235     if (stop)
 236         i2c_stop(obj);
 237
 238     // last read
 239     data[count-1] = obj->i2c->D;
 240
 241     return length;
 242 }
 243 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
 244     int i;
 245
 246     if (i2c_start(obj)) {
 247         i2c_stop(obj);
 248         return I2C_ERROR_BUS_BUSY;
 249     }
 250
 251     if (i2c_do_write(obj, (address & 0xFE))) {
 252         i2c_stop(obj);
 253         return I2C_ERROR_NO_SLAVE;
 254     }
 255
 256     for (i = 0; i < length; i++) {
 257         if(i2c_do_write(obj, data[i])) {
 258             i2c_stop(obj);
 259             return i;
 260         }
 261     }
 262
 263     if (stop)
 264         i2c_stop(obj);
 265
 266     return length;
 267 }
 268
 269 void i2c_reset(i2c_t *obj) {
 270     i2c_stop(obj);
 271 }
 272
 273 int i2c_byte_read(i2c_t *obj, int last) {
 274     char data;
 275
 276     // set rx mode
 277     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 278
 279     // Setup read
 280     i2c_do_read(obj, &data, last);
 281
 282     // set tx mode
 283     obj->i2c->C1 |= I2C_C1_TX_MASK;
 284     return obj->i2c->D;
 285 }
 286
 287 int i2c_byte_write(i2c_t *obj, int data) {
 288     // set tx mode
 289     obj->i2c->C1 |= I2C_C1_TX_MASK;
 290
 291     return !i2c_do_write(obj, (data & 0xFF));
 292 }
 293
 294
 295 #if DEVICE_I2CSLAVE
 296 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
 297     if (enable_slave) {
 298         // set slave mode
 299         obj->i2c->C1 &= ~I2C_C1_MST_MASK;
 300         obj->i2c->C1 |= I2C_C1_IICIE_MASK;
 301     } else {
 302         // set master mode
 303         obj->i2c->C1 |= I2C_C1_MST_MASK;
 304     }
 305 }
 306
 307 int i2c_slave_receive(i2c_t *obj) {
 308     switch(obj->i2c->S) {
 309         // read addressed
 310         case 0xE6:
 311             return 1;
 312         // write addressed
 313         case 0xE2:
 314             return 3;
 315         default:
 316             return 0;
 317     }
 318 }
 319
 320 int i2c_slave_read(i2c_t *obj, char *data, int length) {
 321     uint8_t dummy_read;
 322     uint8_t * ptr;
 323     int count;
 324
 325     // set rx mode
 326     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 327
 328     // first dummy read
 329     dummy_read = obj->i2c->D;
 330     if (i2c_wait_end_rx_transfer(obj))
 331         return 0;
 332
 333     // read address
 334     dummy_read = obj->i2c->D;
 335     if (i2c_wait_end_rx_transfer(obj))
 336         return 0;
 337
 338     // read (length - 1) bytes
 339     for (count = 0; count < (length - 1); count++) {
 340         data[count] = obj->i2c->D;
 341         if (i2c_wait_end_rx_transfer(obj))
 342             return count;
 343     }
 344
 345     // read last byte
 346     ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
 347     *ptr = obj->i2c->D;
 348
 349     return (length) ? (count + 1) : 0;
 350 }
 351
 352 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
 353     int i, count = 0;
 354
 355     // set tx mode
 356     obj->i2c->C1 |= I2C_C1_TX_MASK;
 357
 358     for (i = 0; i < length; i++) {
 359         if (i2c_do_write(obj, data[count++]) == 2)
 360             return i;
 361     }
 362
 363     // set rx mode
 364     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 365
 366     // dummy rx transfer needed
 367     // otherwise the master cannot generate a stop bit
 368     obj->i2c->D;
 369     if (i2c_wait_end_rx_transfer(obj) == 2)
 370         return count;
 371
 372     return count;
 373 }
 374
 375 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
 376     obj->i2c->A1 = address & 0xfe;
 377 }
 378 #endif