tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K22F/device/MK22F51212/MK22F51212_rfvbat.h

   1 /*
   2 ** ###################################################################
   3 **     Compilers:           Keil ARM C/C++ Compiler
   4 **                          Freescale C/C++ for Embedded ARM
   5 **                          GNU C Compiler
   6 **                          IAR ANSI C/C++ Compiler for ARM
   7 **
   8 **     Reference manual:    K22P121M120SF7RM, Rev. 1, March 24, 2014
   9 **     Version:             rev. 2.5, 2014-05-06
  10 **     Build:               b140604
  11 **
  12 **     Abstract:
  13 **         Extension to the CMSIS register access layer header.
  14 **
  15 **     Copyright (c) 2014 Freescale Semiconductor, Inc.
  16 **     All rights reserved.
  17 **
  18 **     Redistribution and use in source and binary forms, with or without modification,
  19 **     are permitted provided that the following conditions are met:
  20 **
  21 **     o Redistributions of source code must retain the above copyright notice, this list
  22 **       of conditions and the following disclaimer.
  23 **
  24 **     o Redistributions in binary form must reproduce the above copyright notice, this
  25 **       list of conditions and the following disclaimer in the documentation and/or
  26 **       other materials provided with the distribution.
  27 **
  28 **     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  29 **       contributors may be used to endorse or promote products derived from this
  30 **       software without specific prior written permission.
  31 **
  32 **     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  33 **     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  34 **     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35 **     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  36 **     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  37 **     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  38 **     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  39 **     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 **     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  41 **     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 **
  43 **     http:                 www.freescale.com
  44 **     mail:                 support@freescale.com
  45 **
  46 **     Revisions:
  47 **     - rev. 1.0 (2013-07-23)
  48 **         Initial version.
  49 **     - rev. 1.1 (2013-09-17)
  50 **         RM rev. 0.4 update.
  51 **     - rev. 2.0 (2013-10-29)
  52 **         Register accessor macros added to the memory map.
  53 **         Symbols for Processor Expert memory map compatibility added to the memory map.
  54 **         Startup file for gcc has been updated according to CMSIS 3.2.
  55 **         System initialization updated.
  56 **     - rev. 2.1 (2013-10-30)
  57 **         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
  58 **     - rev. 2.2 (2013-12-20)
  59 **         Update according to reference manual rev. 0.6,
  60 **     - rev. 2.3 (2014-01-13)
  61 **         Update according to reference manual rev. 0.61,
  62 **     - rev. 2.4 (2014-02-10)
  63 **         The declaration of clock configurations has been moved to separate header file system_MK22F51212.h
  64 **     - rev. 2.5 (2014-05-06)
  65 **         Update according to reference manual rev. 1.0,
  66 **         Update of system and startup files.
  67 **         Module access macro module_BASES replaced by module_BASE_PTRS.
  68 **
  69 ** ###################################################################
  70 */
  71
  72 /*
  73  * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
  74  *
  75  * This file was generated automatically and any changes may be lost.
  76  */
  77 #ifndef __HW_RFVBAT_REGISTERS_H__
  78 #define __HW_RFVBAT_REGISTERS_H__
  79
  80 #include "MK22F51212.h"
  81 #include "fsl_bitaccess.h"
  82
  83 /*
  84  * MK22F51212 RFVBAT
  85  *
  86  * VBAT register file
  87  *
  88  * Registers defined in this header file:
  89  * - HW_RFVBAT_REGn - VBAT register file register
  90  *
  91  * - hw_rfvbat_t - Struct containing all module registers.
  92  */
  93
  94 #define HW_RFVBAT_INSTANCE_COUNT (1U) /*!< Number of instances of the RFVBAT module. */
  95
  96 /*******************************************************************************
  97  * HW_RFVBAT_REGn - VBAT register file register
  98  ******************************************************************************/
  99
 100 /*!
 101  * @brief HW_RFVBAT_REGn - VBAT register file register (RW)
 102  *
 103  * Reset value: 0x00000000U
 104  *
 105  * Each register can be accessed as 8-, 16-, or 32-bits.
 106  */
 107 typedef union _hw_rfvbat_regn
 108 {
 109     uint32_t U;
 110     struct _hw_rfvbat_regn_bitfields
 111     {
 112         uint32_t LL : 8;               /*!< [7:0]  */
 113         uint32_t LH : 8;               /*!< [15:8]  */
 114         uint32_t HL : 8;               /*!< [23:16]  */
 115         uint32_t HH : 8;               /*!< [31:24]  */
 116     } B;
 117 } hw_rfvbat_regn_t;
 118
 119 /*!
 120  * @name Constants and macros for entire RFVBAT_REGn register
 121  */
 122 /*@{*/
 123 #define HW_RFVBAT_REGn_COUNT (8U)
 124
 125 #define HW_RFVBAT_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
 126
 127 #define HW_RFVBAT_REGn(x, n)     (*(__IO hw_rfvbat_regn_t *) HW_RFVBAT_REGn_ADDR(x, n))
 128 #define HW_RFVBAT_REGn_RD(x, n)  (HW_RFVBAT_REGn(x, n).U)
 129 #define HW_RFVBAT_REGn_WR(x, n, v) (HW_RFVBAT_REGn(x, n).U = (v))
 130 #define HW_RFVBAT_REGn_SET(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) |  (v)))
 131 #define HW_RFVBAT_REGn_CLR(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) & ~(v)))
 132 #define HW_RFVBAT_REGn_TOG(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) ^  (v)))
 133 /*@}*/
 134
 135 /*
 136  * Constants & macros for individual RFVBAT_REGn bitfields
 137  */
 138
 139 /*!
 140  * @name Register RFVBAT_REGn, field LL[7:0] (RW)
 141  *
 142  * Low lower byte
 143  */
 144 /*@{*/
 145 #define BP_RFVBAT_REGn_LL    (0U)          /*!< Bit position for RFVBAT_REGn_LL. */
 146 #define BM_RFVBAT_REGn_LL    (0x000000FFU) /*!< Bit mask for RFVBAT_REGn_LL. */
 147 #define BS_RFVBAT_REGn_LL    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_LL. */
 148
 149 /*! @brief Read current value of the RFVBAT_REGn_LL field. */
 150 #define BR_RFVBAT_REGn_LL(x, n) (HW_RFVBAT_REGn(x, n).B.LL)
 151
 152 /*! @brief Format value for bitfield RFVBAT_REGn_LL. */
 153 #define BF_RFVBAT_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LL) & BM_RFVBAT_REGn_LL)
 154
 155 /*! @brief Set the LL field to a new value. */
 156 #define BW_RFVBAT_REGn_LL(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_LL) | BF_RFVBAT_REGn_LL(v)))
 157 /*@}*/
 158
 159 /*!
 160  * @name Register RFVBAT_REGn, field LH[15:8] (RW)
 161  *
 162  * Low higher byte
 163  */
 164 /*@{*/
 165 #define BP_RFVBAT_REGn_LH    (8U)          /*!< Bit position for RFVBAT_REGn_LH. */
 166 #define BM_RFVBAT_REGn_LH    (0x0000FF00U) /*!< Bit mask for RFVBAT_REGn_LH. */
 167 #define BS_RFVBAT_REGn_LH    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_LH. */
 168
 169 /*! @brief Read current value of the RFVBAT_REGn_LH field. */
 170 #define BR_RFVBAT_REGn_LH(x, n) (HW_RFVBAT_REGn(x, n).B.LH)
 171
 172 /*! @brief Format value for bitfield RFVBAT_REGn_LH. */
 173 #define BF_RFVBAT_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LH) & BM_RFVBAT_REGn_LH)
 174
 175 /*! @brief Set the LH field to a new value. */
 176 #define BW_RFVBAT_REGn_LH(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_LH) | BF_RFVBAT_REGn_LH(v)))
 177 /*@}*/
 178
 179 /*!
 180  * @name Register RFVBAT_REGn, field HL[23:16] (RW)
 181  *
 182  * High lower byte
 183  */
 184 /*@{*/
 185 #define BP_RFVBAT_REGn_HL    (16U)         /*!< Bit position for RFVBAT_REGn_HL. */
 186 #define BM_RFVBAT_REGn_HL    (0x00FF0000U) /*!< Bit mask for RFVBAT_REGn_HL. */
 187 #define BS_RFVBAT_REGn_HL    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_HL. */
 188
 189 /*! @brief Read current value of the RFVBAT_REGn_HL field. */
 190 #define BR_RFVBAT_REGn_HL(x, n) (HW_RFVBAT_REGn(x, n).B.HL)
 191
 192 /*! @brief Format value for bitfield RFVBAT_REGn_HL. */
 193 #define BF_RFVBAT_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HL) & BM_RFVBAT_REGn_HL)
 194
 195 /*! @brief Set the HL field to a new value. */
 196 #define BW_RFVBAT_REGn_HL(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_HL) | BF_RFVBAT_REGn_HL(v)))
 197 /*@}*/
 198
 199 /*!
 200  * @name Register RFVBAT_REGn, field HH[31:24] (RW)
 201  *
 202  * High higher byte
 203  */
 204 /*@{*/
 205 #define BP_RFVBAT_REGn_HH    (24U)         /*!< Bit position for RFVBAT_REGn_HH. */
 206 #define BM_RFVBAT_REGn_HH    (0xFF000000U) /*!< Bit mask for RFVBAT_REGn_HH. */
 207 #define BS_RFVBAT_REGn_HH    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_HH. */
 208
 209 /*! @brief Read current value of the RFVBAT_REGn_HH field. */
 210 #define BR_RFVBAT_REGn_HH(x, n) (HW_RFVBAT_REGn(x, n).B.HH)
 211
 212 /*! @brief Format value for bitfield RFVBAT_REGn_HH. */
 213 #define BF_RFVBAT_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HH) & BM_RFVBAT_REGn_HH)
 214
 215 /*! @brief Set the HH field to a new value. */
 216 #define BW_RFVBAT_REGn_HH(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_HH) | BF_RFVBAT_REGn_HH(v)))
 217 /*@}*/
 218
 219 /*******************************************************************************
 220  * hw_rfvbat_t - module struct
 221  ******************************************************************************/
 222 /*!
 223  * @brief All RFVBAT module registers.
 224  */
 225 #pragma pack(1)
 226 typedef struct _hw_rfvbat
 227 {
 228     __IO hw_rfvbat_regn_t REGn[8];         /*!< [0x0] VBAT register file register */
 229 } hw_rfvbat_t;
 230 #pragma pack()
 231
 232 /*! @brief Macro to access all RFVBAT registers. */
 233 /*! @param x RFVBAT module instance base address. */
 234 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
 235  *     use the '&' operator, like <code>&HW_RFVBAT(RFVBAT_BASE)</code>. */
 236 #define HW_RFVBAT(x)   (*(hw_rfvbat_t *)(x))
 237
 238 #endif /* __HW_RFVBAT_REGISTERS_H__ */
 239 /* EOF */