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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_KPSDK_MCUS / TARGET_KPSDK_CODE / hal / can / fsl_flexcan_hal.h
1 /*
2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30 #ifndef __FSL_FLEXCAN_HAL_H__
31 #define __FSL_FLEXCAN_HAL_H__
32
33 #include <assert.h>
34 #include <stdint.h>
35 #include <stdbool.h>
36 #include "fsl_flexcan_features.h"
37 #include "fsl_device_registers.h"
38
39 #ifndef MBED_NO_FLEXCAN
40
41 /*!
42 * @addtogroup flexcan_hal
43 * @{
44 */
45
46 /*******************************************************************************
47 * Definitions
48 ******************************************************************************/
49
50 /*! @brief FlexCAN constants*/
51 enum _flexcan_constants
52 {
53 kFlexCanMessageSize = 8, /*!< FlexCAN message buffer data size in bytes*/
54 };
55
56 /*! @brief The Status enum is used to report current status of the FlexCAN interface.*/
57 enum _flexcan_err_status
58 {
59 kFlexCan_RxWrn = 0x0080, /*!< Reached warning level for RX errors*/
60 kFlexCan_TxWrn = 0x0100, /*!< Reached warning level for TX errors*/
61 kFlexCan_StfErr = 0x0200, /*!< Stuffing Error*/
62 kFlexCan_FrmErr = 0x0400, /*!< Form Error*/
63 kFlexCan_CrcErr = 0x0800, /*!< Cyclic Redundancy Check Error*/
64 kFlexCan_AckErr = 0x1000, /*!< Received no ACK on transmission*/
65 kFlexCan_Bit0Err = 0x2000, /*!< Unable to send dominant bit*/
66 kFlexCan_Bit1Err = 0x4000, /*!< Unable to send recessive bit*/
67 };
68
69 /*! @brief FlexCAN status return codes*/
70 typedef enum _flexcan_status
71 {
72 kStatus_FLEXCAN_Success = 0,
73 kStatus_FLEXCAN_OutOfRange,
74 kStatus_FLEXCAN_UnknownProperty,
75 kStatus_FLEXCAN_InvalidArgument,
76 kStatus_FLEXCAN_Fail,
77 kStatus_FLEXCAN_TimeOut,
78 } flexcan_status_t;
79
80
81 /*! @brief FlexCAN operation modes*/
82 typedef enum _flexcan_operation_modes {
83 kFlexCanNormalMode, /*!< Normal mode or user mode*/
84 kFlexCanListenOnlyMode, /*!< Listen-only mode*/
85 kFlexCanLoopBackMode, /*!< Loop-back mode*/
86 kFlexCanFreezeMode, /*!< Freeze mode*/
87 kFlexCanDisableMode, /*!< Module disable mode*/
88 } flexcan_operation_modes_t;
89
90 /*! @brief FlexCAN message buffer CODE for Rx buffers*/
91 typedef enum _flexcan_mb_code_rx {
92 kFlexCanRX_Inactive = 0x0, /*!< MB is not active.*/
93 kFlexCanRX_Full = 0x2, /*!< MB is full.*/
94 kFlexCanRX_Empty = 0x4, /*!< MB is active and empty.*/
95 kFlexCanRX_Overrun = 0x6, /*!< MB is overwritten into a full buffer.*/
96 kFlexCanRX_Busy = 0x8, /*!< FlexCAN is updating the contents of the MB.*/
97 /*! The CPU must not access the MB.*/
98 kFlexCanRX_Ranswer = 0xA, /*!< A frame was configured to recognize a Remote Request Frame*/
99 /*! and transmit a Response Frame in return.*/
100 kFlexCanRX_NotUsed = 0xF, /*!< Not used*/
101 } flexcan_mb_code_rx_t;
102
103 /*! @brief FlexCAN message buffer CODE FOR Tx buffers*/
104 typedef enum _flexcan_mb_code_tx {
105 kFlexCanTX_Inactive = 0x08, /*!< MB is not active.*/
106 kFlexCanTX_Abort = 0x09, /*!< MB is aborted.*/
107 kFlexCanTX_Data = 0x0C, /*!< MB is a TX Data Frame(MB RTR must be 0).*/
108 kFlexCanTX_Remote = 0x1C, /*!< MB is a TX Remote Request Frame (MB RTR must be 1).*/
109 kFlexCanTX_Tanswer = 0x0E, /*!< MB is a TX Response Request Frame from.*/
110 /*! an incoming Remote Request Frame.*/
111 kFlexCanTX_NotUsed = 0xF, /*!< Not used*/
112 } flexcan_mb_code_tx_t;
113
114 /*! @brief FlexCAN message buffer transmission types*/
115 typedef enum _flexcan_mb_transmission_type {
116 kFlexCanMBStatusType_TX, /*!< Transmit MB*/
117 kFlexCanMBStatusType_TXRemote, /*!< Transmit remote request MB*/
118 kFlexCanMBStatusType_RX, /*!< Receive MB*/
119 kFlexCanMBStatusType_RXRemote, /*!< Receive remote request MB*/
120 kFlexCanMBStatusType_RXTXRemote, /*!< FlexCAN remote frame receives remote request and*/
121 /*! transmits MB.*/
122 } flexcan_mb_transmission_type_t;
123
124 typedef enum _flexcan_rx_fifo_id_element_format {
125 kFlexCanRxFifoIdElementFormat_A, /*!< One full ID (standard and extended) per ID Filter Table*/
126 /*! element.*/
127 kFlexCanRxFifoIdElementFormat_B, /*!< Two full standard IDs or two partial 14-bit (standard and*/
128 /*! extended) IDs per ID Filter Table element.*/
129 kFlexCanRxFifoIdElementFormat_C, /*!< Four partial 8-bit Standard IDs per ID Filter Table*/
130 /*! element.*/
131 kFlexCanRxFifoIdElementFormat_D, /*!< All frames rejected.*/
132 } flexcan_rx_fifo_id_element_format_t;
133
134 /*! @brief FlexCAN Rx FIFO filters number*/
135 typedef enum _flexcan_rx_fifo_id_filter_number {
136 kFlexCanRxFifoIDFilters_8 = 0x0, /*!< 8 Rx FIFO Filters*/
137 kFlexCanRxFifoIDFilters_16 = 0x1, /*!< 16 Rx FIFO Filters*/
138 kFlexCanRxFifoIDFilters_24 = 0x2, /*!< 24 Rx FIFO Filters*/
139 kFlexCanRxFifoIDFilters_32 = 0x3, /*!< 32 Rx FIFO Filters*/
140 kFlexCanRxFifoIDFilters_40 = 0x4, /*!< 40 Rx FIFO Filters*/
141 kFlexCanRxFifoIDFilters_48 = 0x5, /*!< 48 Rx FIFO Filters*/
142 kFlexCanRxFifoIDFilters_56 = 0x6, /*!< 56 Rx FIFO Filters*/
143 kFlexCanRxFifoIDFilters_64 = 0x7, /*!< 64 Rx FIFO Filters*/
144 kFlexCanRxFifoIDFilters_72 = 0x8, /*!< 72 Rx FIFO Filters*/
145 kFlexCanRxFifoIDFilters_80 = 0x9, /*!< 80 Rx FIFO Filters*/
146 kFlexCanRxFifoIDFilters_88 = 0xA, /*!< 88 Rx FIFO Filters*/
147 kFlexCanRxFifoIDFilters_96 = 0xB, /*!< 96 Rx FIFO Filters*/
148 kFlexCanRxFifoIDFilters_104 = 0xC, /*!< 104 Rx FIFO Filters*/
149 kFlexCanRxFifoIDFilters_112 = 0xD, /*!< 112 Rx FIFO Filters*/
150 kFlexCanRxFifoIDFilters_120 = 0xE, /*!< 120 Rx FIFO Filters*/
151 kFlexCanRxFifoIDFilters_128 = 0xF /*!< 128 Rx FIFO Filters*/
152 } flexcan_rx_fifo_id_filter_num_t;
153
154 /*! @brief FlexCAN RX FIFO ID filter table structure*/
155 typedef struct FLEXCANIdTable {
156 bool is_remote_mb; /*!< Remote frame*/
157 bool is_extended_mb; /*!< Extended frame*/
158 uint32_t *id_filter; /*!< Rx FIFO ID filter elements*/
159 } flexcan_id_table_t;
160
161 /*! @brief FlexCAN RX mask type.*/
162 typedef enum _flexcan_rx_mask_type {
163 kFlexCanRxMask_Global, /*!< Rx global mask*/
164 kFlexCanRxMask_Individual, /*!< Rx individual mask*/
165 } flexcan_rx_mask_type_t;
166
167 /*! @brief FlexCAN MB ID type*/
168 typedef enum _flexcan_mb_id_type {
169 kFlexCanMbId_Std, /*!< Standard ID*/
170 kFlexCanMbId_Ext, /*!< Extended ID*/
171 } flexcan_mb_id_type_t;
172
173 /*! @brief FlexCAN clock source*/
174 typedef enum _flexcan_clk_source {
175 kFlexCanClkSource_Osc, /*!< Oscillator clock*/
176 kFlexCanClkSource_Ipbus, /*!< Peripheral clock*/
177 } flexcan_clk_source_t;
178
179 /*! @brief FlexCAN error interrupt types*/
180 typedef enum _flexcan_int_type {
181 kFlexCanInt_Buf, /*!< OR'd message buffers interrupt*/
182 kFlexCanInt_Err, /*!< Error interrupt*/
183 kFlexCanInt_Boff, /*!< Bus off interrupt*/
184 kFlexCanInt_Wakeup, /*!< Wakeup interrupt*/
185 kFlexCanInt_Txwarning, /*!< TX warning interrupt*/
186 kFlexCanInt_Rxwarning, /*!< RX warning interrupt*/
187 } flexcan_int_type_t;
188
189 /*! @brief FlexCAN bus error counters*/
190 typedef struct FLEXCANBerrCounter {
191 uint16_t txerr; /*!< Transmit error counter*/
192 uint16_t rxerr; /*!< Receive error counter*/
193 } flexcan_berr_counter_t;
194
195 /*! @brief FlexCAN MB code and status for transmit and receive */
196 typedef struct FLEXCANMbCodeStatus {
197 uint32_t code; /*!< MB code for TX or RX buffers.
198 Defined by flexcan_mb_code_rx_t and flexcan_mb_code_tx_t */
199 flexcan_mb_id_type_t msg_id_type; /*!< Type of message ID (standard or extended)*/
200 uint32_t data_length; /*!< Length of Data in Bytes*/
201 } flexcan_mb_code_status_t;
202
203 /*! @brief FlexCAN message buffer structure*/
204 typedef struct FLEXCANMb {
205 uint32_t cs; /*!< Code and Status*/
206 uint32_t msg_id; /*!< Message Buffer ID*/
207 uint8_t data[kFlexCanMessageSize]; /*!< Bytes of the FlexCAN message*/
208 } flexcan_mb_t;
209
210 /*! @brief FlexCAN configuration*/
211 typedef struct FLEXCANUserConfig {
212 uint32_t max_num_mb; /*!< The maximum number of Message Buffers*/
213 flexcan_rx_fifo_id_filter_num_t num_id_filters; /*!< The number of Rx FIFO ID filters needed*/
214 bool is_rx_fifo_needed; /*!< 1 if needed; 0 if not*/
215 } flexcan_user_config_t;
216
217 /*! @brief FlexCAN timing related structures*/
218 typedef struct FLEXCANTimeSegment {
219 uint32_t propseg; /*!< Propagation segment*/
220 uint32_t pseg1; /*!< Phase segment 1*/
221 uint32_t pseg2; /*!< Phase segment 2*/
222 uint32_t pre_divider; /*!< Clock pre divider*/
223 uint32_t rjw; /*!< Resync jump width*/
224 } flexcan_time_segment_t;
225
226
227 /*******************************************************************************
228 * API
229 ******************************************************************************/
230
231 #if defined(__cplusplus)
232 extern "C" {
233 #endif
234
235 /*!
236 * @name Configuration
237 * @{
238 */
239
240 /*!
241 * @brief Enables FlexCAN controller.
242 *
243 * @param canBaseAddr The FlexCAN base address
244 * @return 0 if successful; non-zero failed
245 */
246 flexcan_status_t FLEXCAN_HAL_Enable(uint32_t canBaseAddr);
247
248 /*!
249 * @brief Disables FlexCAN controller.
250 *
251 * @param canBaseAddr The FlexCAN base address
252 * @return 0 if successful; non-zero failed
253 */
254 flexcan_status_t FLEXCAN_HAL_Disable(uint32_t canBaseAddr);
255
256 /*!
257 * @brief Checks whether the FlexCAN is enabled or disabled.
258 *
259 * @param canBaseAddr The FlexCAN base address
260 * @return State of FlexCAN enable(0)/disable(1)
261 */
262 static inline bool FLEXCAN_HAL_IsEnabled(uint32_t canBaseAddr)
263 {
264 return BR_CAN_MCR_MDIS(canBaseAddr);
265 }
266
267 /*!
268 * @brief Selects the clock source for FlexCAN.
269 *
270 * @param canBaseAddr The FlexCAN base address
271 * @param clk The FlexCAN clock source
272 * @return 0 if successful; non-zero failed
273 */
274 flexcan_status_t FLEXCAN_HAL_SelectClock(uint32_t canBaseAddr, flexcan_clk_source_t clk);
275
276 /*!
277 * @brief Initializes the FlexCAN controller.
278 *
279 * @param canBaseAddr The FlexCAN base address
280 * @param data The FlexCAN platform data.
281 * @return 0 if successful; non-zero failed
282 */
283 flexcan_status_t FLEXCAN_HAL_Init(uint32_t canBaseAddr, const flexcan_user_config_t *data);
284
285 /*!
286 * @brief Sets the FlexCAN time segments for setting up bit rate.
287 *
288 * @param canBaseAddr The FlexCAN base address
289 * @param time_seg FlexCAN time segments, which need to be set for the bit rate.
290 * @return 0 if successful; non-zero failed
291 */
292 void FLEXCAN_HAL_SetTimeSegments(uint32_t canBaseAddr, flexcan_time_segment_t *time_seg);
293
294 /*!
295 * @brief Gets the FlexCAN time segments to calculate the bit rate.
296 *
297 * @param canBaseAddr The FlexCAN base address
298 * @param time_seg FlexCAN time segments read for bit rate
299 * @return 0 if successful; non-zero failed
300 */
301 void FLEXCAN_HAL_GetTimeSegments(uint32_t canBaseAddr, flexcan_time_segment_t *time_seg);
302
303 /*!
304 * @brief Un freezes the FlexCAN module.
305 *
306 * @param canBaseAddr The FlexCAN base address
307 * @return 0 if successful; non-zero failed.
308 */
309 void FLEXCAN_HAL_ExitFreezeMode(uint32_t canBaseAddr);
310
311 /*!
312 * @brief Freezes the FlexCAN module.
313 *
314 * @param canBaseAddr The FlexCAN base address
315 */
316 void FLEXCAN_HAL_EnterFreezeMode(uint32_t canBaseAddr);
317
318 /*!
319 * @brief Enables operation mode.
320 *
321 * @param canBaseAddr The FlexCAN base address
322 * @param mode An operation mode to be enabled
323 * @return 0 if successful; non-zero failed.
324 */
325 flexcan_status_t FLEXCAN_HAL_EnableOperationMode(
326 uint32_t canBaseAddr,
327 flexcan_operation_modes_t mode);
328
329 /*!
330 * @brief Disables operation mode.
331 *
332 * @param canBaseAddr The FlexCAN base address
333 * @param mode An operation mode to be disabled
334 * @return 0 if successful; non-zero failed.
335 */
336 flexcan_status_t FLEXCAN_HAL_DisableOperationMode(
337 uint32_t canBaseAddr,
338 flexcan_operation_modes_t mode);
339
340 /*@}*/
341
342 /*!
343 * @name Data transfer
344 * @{
345 */
346
347 /*!
348 * @brief Sets the FlexCAN message buffer fields for transmitting.
349 *
350 * @param canBaseAddr The FlexCAN base address
351 * @param data The FlexCAN platform data
352 * @param mb_idx Index of the message buffer
353 * @param cs CODE/status values (TX)
354 * @param msg_id ID of the message to transmit
355 * @param mb_data Bytes of the FlexCAN message
356 * @return 0 if successful; non-zero failed
357 */
358 flexcan_status_t FLEXCAN_HAL_SetMbTx(
359 uint32_t canBaseAddr,
360 const flexcan_user_config_t *data,
361 uint32_t mb_idx,
362 flexcan_mb_code_status_t *cs,
363 uint32_t msg_id,
364 uint8_t *mb_data);
365
366 /*!
367 * @brief Sets the FlexCAN message buffer fields for receiving.
368 *
369 * @param canBaseAddr The FlexCAN base address
370 * @param data The FlexCAN platform data
371 * @param mb_idx Index of the message buffer
372 * @param cs CODE/status values (RX)
373 * @param msg_id ID of the message to receive
374 * @return 0 if successful; non-zero failed
375 */
376 flexcan_status_t FLEXCAN_HAL_SetMbRx(
377 uint32_t canBaseAddr,
378 const flexcan_user_config_t *data,
379 uint32_t mb_idx,
380 flexcan_mb_code_status_t *cs,
381 uint32_t msg_id);
382
383 /*!
384 * @brief Gets the FlexCAN message buffer fields.
385 *
386 * @param canBaseAddr The FlexCAN base address
387 * @param data The FlexCAN platform data
388 * @param mb_idx Index of the message buffer
389 * @param mb The fields of the message buffer
390 * @return 0 if successful; non-zero failed
391 */
392 flexcan_status_t FLEXCAN_HAL_GetMb(
393 uint32_t canBaseAddr,
394 const flexcan_user_config_t *data,
395 uint32_t mb_idx,
396 flexcan_mb_t *mb);
397
398 /*!
399 * @brief Locks the FlexCAN Rx message buffer.
400 *
401 * @param canBaseAddr The FlexCAN base address
402 * @param data The FlexCAN platform data
403 * @param mb_idx Index of the message buffer
404 * @return 0 if successful; non-zero failed
405 */
406 flexcan_status_t FLEXCAN_HAL_LockRxMb(
407 uint32_t canBaseAddr,
408 const flexcan_user_config_t *data,
409 uint32_t mb_idx);
410
411 /*!
412 * @brief Unlocks the FlexCAN Rx message buffer.
413 *
414 * @param canBaseAddr The FlexCAN base address
415 * @return 0 if successful; non-zero failed
416 */
417 static inline void FLEXCAN_HAL_UnlockRxMb(uint32_t canBaseAddr)
418 {
419 /* Unlock the mailbox */
420 HW_CAN_TIMER_RD(canBaseAddr);
421 }
422
423 /*!
424 * @brief Enables the Rx FIFO.
425 *
426 * @param canBaseAddr The FlexCAN base address
427 */
428 void FLEXCAN_HAL_EnableRxFifo(uint32_t canBaseAddr);
429
430 /*!
431 * @brief Disables the Rx FIFO.
432 *
433 * @param canBaseAddr The FlexCAN base address
434 */
435 void FLEXCAN_HAL_DisableRxFifo(uint32_t canBaseAddr);
436
437 /*!
438 * @brief Sets the number of the Rx FIFO filters.
439 *
440 * @param canBaseAddr The FlexCAN base address
441 * @param number The number of Rx FIFO filters
442 */
443 void FLEXCAN_HAL_SetRxFifoFiltersNumber(uint32_t canBaseAddr, uint32_t number);
444
445 /*!
446 * @brief Sets the maximum number of Message Buffers.
447 *
448 * @param canBaseAddr The FlexCAN base address
449 * @param data The FlexCAN platform data
450 */
451 void FLEXCAN_HAL_SetMaxMbNumber(
452 uint32_t canBaseAddr,
453 const flexcan_user_config_t *data);
454
455 /*!
456 * @brief Sets the Rx FIFO ID filter table elements.
457 *
458 * @param canBaseAddr The FlexCAN base address
459 * @param data The FlexCAN platform data
460 * @param id_format The format of the Rx FIFO ID Filter Table Elements
461 * @param id_filter_table The ID filter table elements which contain if RTR bit,
462 * IDE bit and RX message ID need to be set.
463 * @return 0 if successful; non-zero failed.
464 */
465 flexcan_status_t FLEXCAN_HAL_SetIdFilterTableElements(
466 uint32_t canBaseAddr,
467 const flexcan_user_config_t *data,
468 flexcan_rx_fifo_id_element_format_t id_format,
469 flexcan_id_table_t *id_filter_table);
470
471 /*!
472 * @brief Sets the FlexCAN Rx FIFO fields.
473 *
474 * @param canBaseAddr The FlexCAN base address
475 * @param data The FlexCAN platform data
476 * @param id_format The format of the Rx FIFO ID Filter Table Elements
477 * @param id_filter_table The ID filter table elements which contain RTR bit, IDE bit,
478 * and RX message ID.
479 * @return 0 if successful; non-zero failed.
480 */
481 flexcan_status_t FLEXCAN_HAL_SetRxFifo(
482 uint32_t canBaseAddr,
483 const flexcan_user_config_t *data,
484 flexcan_rx_fifo_id_element_format_t id_format,
485 flexcan_id_table_t *id_filter_table);
486
487 /*!
488 * @brief Gets the FlexCAN Rx FIFO data.
489 *
490 * @param canBaseAddr The FlexCAN base address
491 * @param rx_fifo The FlexCAN receive FIFO data
492 * @return 0 if successful; non-zero failed.
493 */
494 flexcan_status_t FLEXCAN_HAL_ReadFifo(
495 uint32_t canBaseAddr,
496 flexcan_mb_t *rx_fifo);
497
498 /*@}*/
499
500 /*!
501 * @name Interrupts
502 * @{
503 */
504
505 /*!
506 * @brief Enables the FlexCAN Message Buffer interrupt.
507 *
508 * @param canBaseAddr The FlexCAN base address
509 * @param data The FlexCAN platform data
510 * @param mb_idx Index of the message buffer
511 * @return 0 if successful; non-zero failed
512 */
513 flexcan_status_t FLEXCAN_HAL_EnableMbInt(
514 uint32_t canBaseAddr,
515 const flexcan_user_config_t *data,
516 uint32_t mb_idx);
517
518 /*!
519 * @brief Disables the FlexCAN Message Buffer interrupt.
520 *
521 * @param canBaseAddr The FlexCAN base address
522 * @param data The FlexCAN platform data
523 * @param mb_idx Index of the message buffer
524 * @return 0 if successful; non-zero failed
525 */
526 flexcan_status_t FLEXCAN_HAL_DisableMbInt(
527 uint32_t canBaseAddr,
528 const flexcan_user_config_t *data,
529 uint32_t mb_idx);
530
531 /*!
532 * @brief Enables error interrupt of the FlexCAN module.
533 * @param canBaseAddr The FlexCAN base address
534 */
535 void FLEXCAN_HAL_EnableErrInt(uint32_t canBaseAddr);
536
537 /*!
538 * @brief Disables error interrupt of the FlexCAN module.
539 *
540 * @param canBaseAddr The FlexCAN base address
541 */
542 void FLEXCAN_HAL_DisableErrInt(uint32_t canBaseAddr);
543
544 /*!
545 * @brief Enables Bus off interrupt of the FlexCAN module.
546 *
547 * @param canBaseAddr The FlexCAN base address
548 */
549 void FLEXCAN_HAL_EnableBusOffInt(uint32_t canBaseAddr);
550
551 /*!
552 * @brief Disables Bus off interrupt of the FlexCAN module.
553 *
554 * @param canBaseAddr The FlexCAN base address
555 */
556 void FLEXCAN_HAL_DisableBusOffInt(uint32_t canBaseAddr);
557
558 /*!
559 * @brief Enables Wakeup interrupt of the FlexCAN module.
560 *
561 * @param canBaseAddr The FlexCAN base address
562 */
563 void FLEXCAN_HAL_EnableWakeupInt(uint32_t canBaseAddr);
564
565 /*!
566 * @brief Disables Wakeup interrupt of the FlexCAN module.
567 *
568 * @param canBaseAddr The FlexCAN base address
569 */
570 void FLEXCAN_HAL_DisableWakeupInt(uint32_t canBaseAddr);
571
572 /*!
573 * @brief Enables TX warning interrupt of the FlexCAN module
574 *
575 * @param canBaseAddr The FlexCAN base address
576 */
577 void FLEXCAN_HAL_EnableTxWarningInt(uint32_t canBaseAddr);
578
579 /*!
580 * @brief Disables TX warning interrupt of the FlexCAN module.
581 *
582 * @param canBaseAddr The FlexCAN base address
583 */
584 void FLEXCAN_HAL_DisableTxWarningInt(uint32_t canBaseAddr);
585
586 /*!
587 * @brief Enables RX warning interrupt of the FlexCAN module.
588 *
589 * @param canBaseAddr The FlexCAN base address
590 */
591 void FLEXCAN_HAL_EnableRxWarningInt(uint32_t canBaseAddr);
592
593 /*!
594 * @brief Disables RX warning interrupt of the FlexCAN module.
595 *
596 * @param canBaseAddr The FlexCAN base address
597 */
598 void FLEXCAN_HAL_DisableRxWarningInt(uint32_t canBaseAddr);
599
600 /*@}*/
601
602 /*!
603 * @name Status
604 * @{
605 */
606
607 /*!
608 * @brief Gets the value of FlexCAN freeze ACK.
609 *
610 * @param canBaseAddr The FlexCAN base address
611 * @return freeze ACK state (1-freeze mode, 0-not in freeze mode).
612 */
613 static inline uint32_t FLEXCAN_HAL_GetFreezeAck(uint32_t canBaseAddr)
614 {
615 return HW_CAN_MCR(canBaseAddr).B.FRZACK;
616 }
617
618 /*!
619 * @brief Gets the individual FlexCAN MB interrupt flag.
620 *
621 * @param canBaseAddr The FlexCAN base address
622 * @param data The FlexCAN platform data
623 * @param mb_idx Index of the message buffer
624 * @return the individual MB interrupt flag (0 and 1 are the flag value)
625 */
626 uint8_t FLEXCAN_HAL_GetMbIntFlag(
627 uint32_t canBaseAddr,
628 const flexcan_user_config_t *data,
629 uint32_t mb_idx);
630
631 /*!
632 * @brief Gets all FlexCAN MB interrupt flags.
633 *
634 * @param canBaseAddr The FlexCAN base address
635 * @return all MB interrupt flags
636 */
637 static inline uint32_t FLEXCAN_HAL_GetAllMbIntFlags(uint32_t canBaseAddr)
638 {
639 return HW_CAN_IFLAG1_RD(canBaseAddr);
640 }
641
642 /*!
643 * @brief Clears the interrupt flag of the message buffers.
644 *
645 * @param canBaseAddr The FlexCAN base address
646 * @param reg_val The value to be written to the interrupt flag1 register.
647 */
648 /* See fsl_flexcan_hal.h for documentation of this function.*/
649 static inline void FLEXCAN_HAL_ClearMbIntFlag(
650 uint32_t canBaseAddr,
651 uint32_t reg_val)
652 {
653 /* Clear the corresponding message buffer interrupt flag*/
654 HW_CAN_IFLAG1_SET(canBaseAddr, reg_val);
655 }
656
657 /*!
658 * @brief Gets the transmit error counter and receives the error counter.
659 *
660 * @param canBaseAddr The FlexCAN base address
661 * @param err_cnt Transmit error counter and receive error counter
662 */
663 void FLEXCAN_HAL_GetErrCounter(
664 uint32_t canBaseAddr,
665 flexcan_berr_counter_t *err_cnt);
666
667 /*!
668 * @brief Gets error and status.
669 *
670 * @param canBaseAddr The FlexCAN base address
671 * @return The current error and status
672 */
673 static inline uint32_t FLEXCAN_HAL_GetErrStatus(uint32_t canBaseAddr)
674 {
675 return HW_CAN_ESR1_RD(canBaseAddr);
676 }
677
678 /*!
679 * @brief Clears all other interrupts in ERRSTAT register (Error, Busoff, Wakeup).
680 *
681 * @param canBaseAddr The FlexCAN base address
682 */
683 void FLEXCAN_HAL_ClearErrIntStatus(uint32_t canBaseAddr);
684
685 /*@}*/
686
687 /*!
688 * @name Mask
689 * @{
690 */
691
692 /*!
693 * @brief Sets the Rx masking type.
694 *
695 * @param canBaseAddr The FlexCAN base address
696 * @param type The FlexCAN Rx mask type
697 */
698 void FLEXCAN_HAL_SetMaskType(uint32_t canBaseAddr, flexcan_rx_mask_type_t type);
699
700 /*!
701 * @brief Sets the FlexCAN RX FIFO global standard mask.
702 *
703 * @param canBaseAddr The FlexCAN base address
704 * @param std_mask Standard mask
705 */
706 void FLEXCAN_HAL_SetRxFifoGlobalStdMask(
707 uint32_t canBaseAddr,
708 uint32_t std_mask);
709
710 /*!
711 * @brief Sets the FlexCAN Rx FIFO global extended mask.
712 *
713 * @param canBaseAddr The FlexCAN base address
714 * @param ext_mask Extended mask
715 */
716 void FLEXCAN_HAL_SetRxFifoGlobalExtMask(
717 uint32_t canBaseAddr,
718 uint32_t ext_mask);
719
720 /*!
721 * @brief Sets the FlexCAN Rx individual standard mask for ID filtering in the Rx MBs and the Rx FIFO.
722 *
723 * @param canBaseAddr The FlexCAN base address
724 * @param data The FlexCAN platform data
725 * @param mb_idx Index of the message buffer
726 * @param std_mask Individual standard mask
727 * @return 0 if successful; non-zero failed
728 */
729 flexcan_status_t FLEXCAN_HAL_SetRxIndividualStdMask(
730 uint32_t canBaseAddr,
731 const flexcan_user_config_t * data,
732 uint32_t mb_idx,
733 uint32_t std_mask);
734
735 /*!
736 * @brief Sets the FlexCAN Rx individual extended mask for ID filtering in the Rx MBs and the Rx FIFO.
737 *
738 * @param canBaseAddr The FlexCAN base address
739 * @param data The FlexCAN platform data
740 * @param mb_idx Index of the message buffer
741 * @param ext_mask Individual extended mask
742 * @return 0 if successful; non-zero failed
743 */
744 flexcan_status_t FLEXCAN_HAL_SetRxIndividualExtMask(
745 uint32_t canBaseAddr,
746 const flexcan_user_config_t * data,
747 uint32_t mb_idx,
748 uint32_t ext_mask);
749
750 /*!
751 * @brief Sets the FlexCAN Rx MB global standard mask.
752 *
753 * @param canBaseAddr The FlexCAN base address
754 * @param std_mask Standard mask
755 */
756 void FLEXCAN_HAL_SetRxMbGlobalStdMask(
757 uint32_t canBaseAddr,
758 uint32_t std_mask);
759
760 /*!
761 * @brief Sets the FlexCAN RX MB BUF14 standard mask.
762 *
763 * @param canBaseAddr The FlexCAN base address
764 * @param std_mask Standard mask
765 */
766 void FLEXCAN_HAL_SetRxMbBuf14StdMask(
767 uint32_t canBaseAddr,
768 uint32_t std_mask);
769
770 /*!
771 * @brief Sets the FlexCAN Rx MB BUF15 standard mask.
772 *
773 * @param canBaseAddr The FlexCAN base address
774 * @param std_mask Standard mask
775 * @return 0 if successful; non-zero failed
776 */
777 void FLEXCAN_HAL_SetRxMbBuf15StdMask(
778 uint32_t canBaseAddr,
779 uint32_t std_mask);
780
781 /*!
782 * @brief Sets the FlexCAN RX MB global extended mask.
783 *
784 * @param canBaseAddr The FlexCAN base address
785 * @param ext_mask Extended mask
786 */
787 void FLEXCAN_HAL_SetRxMbGlobalExtMask(
788 uint32_t canBaseAddr,
789 uint32_t ext_mask);
790
791 /*!
792 * @brief Sets the FlexCAN RX MB BUF14 extended mask.
793 *
794 * @param canBaseAddr The FlexCAN base address
795 * @param ext_mask Extended mask
796 */
797 void FLEXCAN_HAL_SetRxMbBuf14ExtMask(
798 uint32_t canBaseAddr,
799 uint32_t ext_mask);
800
801 /*!
802 * @brief Sets the FlexCAN RX MB BUF15 extended mask.
803 *
804 * @param canBaseAddr The FlexCAN base address
805 * @param ext_mask Extended mask
806 */
807 void FLEXCAN_HAL_SetRxMbBuf15ExtMask(
808 uint32_t canBaseAddr,
809 uint32_t ext_mask);
810
811 /*!
812 * @brief Gets the FlexCAN ID acceptance filter hit indicator on Rx FIFO.
813 *
814 * @param canBaseAddr The FlexCAN base address
815 * @return RX FIFO information
816 */
817 static inline uint32_t FLEXCAN_HAL_GetIdAcceptanceFilterRxFifo(uint32_t canBaseAddr)
818 {
819 return BR_CAN_RXFIR_IDHIT(canBaseAddr);
820 }
821
822 /*@}*/
823
824 #if defined(__cplusplus)
825 }
826 #endif
827
828 /*! @}*/
829
830 #endif /* MBED_NO_FLEXCAN */
831
832 #endif /* __FSL_FLEXCAN_HAL_H__*/
833
834 /*******************************************************************************
835 * EOF
836 ******************************************************************************/
837
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