2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include "fsl_edma_hal.h"
32 /*******************************************************************************
34 ******************************************************************************/
36 /*FUNCTION**********************************************************************
38 * Function Name : EDMA_HAL_Init
39 * Description : Initializes eDMA module to known state.
41 *END**************************************************************************/
42 void EDMA_HAL_Init(uint32_t baseAddr
)
46 /* Risk there, in SoCs with more than 1 group, we can't set the CR
47 * register to 0, or fault may happens. Stange that in K70 spec,
48 * the RM tell the reset value is 0. */
49 HW_DMA_CR_WR(baseAddr
, 0U);
51 for (i
= 0; i
< FSL_FEATURE_EDMA_MODULE_CHANNEL
; i
++)
53 EDMA_HAL_HTCDClearReg(baseAddr
, i
);
57 /*FUNCTION**********************************************************************
59 * Function Name : EDMA_HAL_CancelTransfer
60 * Description : Cancels the remaining data transfer.
62 *END**************************************************************************/
63 void EDMA_HAL_CancelTransfer(uint32_t baseAddr
)
65 BW_DMA_CR_CX(baseAddr
, 1U);
66 while (BR_DMA_CR_CX(baseAddr
))
70 /*FUNCTION**********************************************************************
72 * Function Name : EDMA_HAL_ErrorCancelTransfer
73 * Description : Cancels the remaining data transfer and treat it as error.
75 *END**************************************************************************/
76 void EDMA_HAL_ErrorCancelTransfer(uint32_t baseAddr
)
78 BW_DMA_CR_ECX(baseAddr
, 1U);
79 while (BR_DMA_CR_ECX(baseAddr
))
83 #if (FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U)
84 /*FUNCTION**********************************************************************
86 * Function Name : EDMA_HAL_SetGroupPriority
89 *END**************************************************************************/
90 void EDMA_HAL_SetGroupPriority(uint32_t baseAddr
, edma_group_priority_t groupPriority
)
93 if (groupPriority
== kEDMAGroup0PriorityLowGroup1PriorityHigh
)
95 BW_DMA_CR_GRP0PRI(baseAddr
, 0U);
96 BW_DMA_CR_GRP1PRI(baseAddr
, 1U);
100 BW_DMA_CR_GRP0PRI(baseAddr
, 1U);
101 BW_DMA_CR_GRP1PRI(baseAddr
, 0U);
106 /*FUNCTION**********************************************************************
108 * Function Name : EDMA_HAL_SetErrorIntCmd
109 * Description : Enable/Disable error interrupt for channels.
111 *END**************************************************************************/
112 void EDMA_HAL_SetErrorIntCmd(uint32_t baseAddr
, bool enable
, edma_channel_indicator_t channel
)
117 HW_DMA_SEEI_WR(baseAddr
, channel
);
121 HW_DMA_CEEI_WR(baseAddr
, channel
);
124 /*FUNCTION**********************************************************************
126 * Function Name : EDMA_HAL_SetDmaRequestCmd
127 * Description : Enable/Disable dma request for channel or all channels.
129 *END**************************************************************************/
130 void EDMA_HAL_SetDmaRequestCmd(uint32_t baseAddr
, edma_channel_indicator_t channel
,bool enable
)
135 HW_DMA_SERQ_WR(baseAddr
, channel
);
139 HW_DMA_CERQ_WR(baseAddr
, channel
);
143 /*FUNCTION**********************************************************************
145 * Function Name : EDMA_HAL_GetErrorIntCmd
146 * Description : Gets eDMA channel error interrupt enable status.
148 *END**************************************************************************/
149 bool EDMA_HAL_GetErrorIntCmd(uint32_t baseAddr
, uint32_t channel
)
151 return (bool)((HW_DMA_EEI_RD(baseAddr
) >> channel
) & 1U);
154 /*FUNCTION**********************************************************************
156 * Function Name : EDMA_HAL_HTCDClearReg
157 * Description : Set registers to 0 for hardware TCD of eDMA channel.
159 *END**************************************************************************/
160 void EDMA_HAL_HTCDClearReg(uint32_t baseAddr
,uint32_t channel
)
162 HW_DMA_TCDn_SADDR_WR(baseAddr
, channel
, 0U);
163 HW_DMA_TCDn_SOFF_WR(baseAddr
, channel
, 0U);
164 HW_DMA_TCDn_ATTR_WR(baseAddr
, channel
, 0U);
165 HW_DMA_TCDn_NBYTES_MLNO_WR(baseAddr
, channel
, 0U);
166 HW_DMA_TCDn_SLAST_WR(baseAddr
, channel
, 0U);
167 HW_DMA_TCDn_DADDR_WR(baseAddr
, channel
, 0U);
168 HW_DMA_TCDn_DOFF_WR(baseAddr
, channel
, 0U);
169 HW_DMA_TCDn_CITER_ELINKNO_WR(baseAddr
, channel
, 0U);
170 HW_DMA_TCDn_DLASTSGA_WR(baseAddr
, channel
, 0U);
171 HW_DMA_TCDn_CSR_WR(baseAddr
, channel
, 0U);
172 HW_DMA_TCDn_BITER_ELINKNO_WR(baseAddr
, channel
, 0U);
175 /*FUNCTION**********************************************************************
177 * Function Name : EDMA_HAL_HTCDSetAttribute
178 * Description : Configures the transfer attribute for eDMA channel.
180 *END**************************************************************************/
181 void EDMA_HAL_HTCDSetAttribute(
182 uint32_t baseAddr
, uint32_t channel
,
183 edma_modulo_t srcModulo
, edma_modulo_t destModulo
,
184 edma_transfer_size_t srcTransferSize
, edma_transfer_size_t destTransferSize
)
186 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
188 HW_DMA_TCDn_ATTR_WR(baseAddr
, channel
,
189 BF_DMA_TCDn_ATTR_SMOD(srcModulo
) | BF_DMA_TCDn_ATTR_DMOD(destModulo
) |
190 BF_DMA_TCDn_ATTR_SSIZE(srcTransferSize
) | BF_DMA_TCDn_ATTR_DSIZE(destTransferSize
));
193 /*FUNCTION**********************************************************************
195 * Function Name : EDMA_HAL_SetNbytes
196 * Description : Configures the nbytes for eDMA channel.
198 *END**************************************************************************/
199 void EDMA_HAL_HTCDSetNbytes(uint32_t baseAddr
, uint32_t channel
, uint32_t nbytes
)
201 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
203 if (BR_DMA_CR_EMLM(baseAddr
))
205 if (!(BR_DMA_TCDn_NBYTES_MLOFFNO_SMLOE(baseAddr
, channel
) ||
206 BR_DMA_TCDn_NBYTES_MLOFFNO_DMLOE(baseAddr
, channel
)))
208 BW_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(baseAddr
, channel
, nbytes
);
212 BW_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(baseAddr
, channel
, nbytes
);
218 BW_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(baseAddr
, channel
, nbytes
);
222 /*FUNCTION**********************************************************************
224 * Function Name : EDMA_HAL_GetHTCDNbytes
225 * Description : Get nbytes configuration data.
227 *END**************************************************************************/
228 uint32_t EDMA_HAL_HTCDGetNbytes(uint32_t baseAddr
, uint32_t channel
)
230 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
232 if (BR_DMA_CR_EMLM(baseAddr
))
234 if (BR_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(baseAddr
, channel
) ||
235 BR_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(baseAddr
, channel
))
237 return BR_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(baseAddr
, channel
);
241 return BR_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(baseAddr
, channel
);
246 return BR_DMA_TCDn_NBYTES_MLNO_NBYTES(baseAddr
, channel
);
250 /*FUNCTION**********************************************************************
252 * Function Name : EDMA_HAL_HTCD_SetMinorLoopOffset
253 * Description : Configures the minorloop offset for the hardware TCD.
255 *END**************************************************************************/
256 void EDMA_HAL_HTCDSetMinorLoopOffset(
257 uint32_t baseAddr
, uint32_t channel
, edma_minorloop_offset_config_t
*config
)
259 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
260 if ((config
->enableSrcMinorloop
== true) || (config
->enableDestMinorloop
== true))
262 BW_DMA_CR_EMLM(baseAddr
, true);
263 BW_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(baseAddr
, channel
, config
->enableSrcMinorloop
);
264 BW_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(baseAddr
, channel
, config
->enableDestMinorloop
);
265 BW_DMA_TCDn_NBYTES_MLOFFYES_MLOFF(baseAddr
, channel
, config
->offset
);
268 /*FUNCTION**********************************************************************
270 * Function Name : EDMA_HAL_HTCDSetScatterGatherLink
271 * Description : Configures the memory address for the next transfer TCD for the hardware TCD.
273 *END**************************************************************************/
274 void EDMA_HAL_HTCDSetScatterGatherLink(
275 uint32_t baseAddr
, uint32_t channel
, edma_software_tcd_t
*stcd
)
277 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
278 BW_DMA_TCDn_CSR_ESG(baseAddr
, channel
, true);
279 BW_DMA_TCDn_DLASTSGA_DLASTSGA(baseAddr
, channel
, (uint32_t)stcd
);
281 /*FUNCTION**********************************************************************
283 * Function Name : EDMA_HAL_HTCD_SetChannelMinorLink
284 * Description : Set Channel minor link for hardware TCD.
286 *END**************************************************************************/
287 void EDMA_HAL_HTCDSetChannelMinorLink(
288 uint32_t baseAddr
, uint32_t channel
, uint32_t linkChannel
, bool enable
)
290 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
294 BW_DMA_TCDn_BITER_ELINKYES_ELINK(baseAddr
, channel
, enable
);
295 BW_DMA_TCDn_BITER_ELINKYES_LINKCH(baseAddr
, channel
, linkChannel
);
296 BW_DMA_TCDn_CITER_ELINKYES_ELINK(baseAddr
, channel
, enable
);
297 BW_DMA_TCDn_CITER_ELINKYES_LINKCH(baseAddr
, channel
, linkChannel
);
301 BW_DMA_TCDn_BITER_ELINKNO_ELINK(baseAddr
, channel
, enable
);
302 BW_DMA_TCDn_CITER_ELINKNO_ELINK(baseAddr
, channel
, enable
);
305 /*FUNCTION**********************************************************************
307 * Function Name : EDMA_HAL_HTCD_HTCDSetMajorCount
308 * Description : Sets the major iteration count according to minor loop channel link setting.
310 *END**************************************************************************/
311 void EDMA_HAL_HTCDSetMajorCount(uint32_t baseAddr
, uint32_t channel
, uint32_t count
)
313 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
315 if (BR_DMA_TCDn_BITER_ELINKNO_ELINK(baseAddr
, channel
))
317 BW_DMA_TCDn_BITER_ELINKYES_BITER(baseAddr
, channel
, count
);
318 BW_DMA_TCDn_CITER_ELINKYES_CITER(baseAddr
, channel
, count
);
322 BW_DMA_TCDn_BITER_ELINKNO_BITER(baseAddr
, channel
, count
);
323 BW_DMA_TCDn_CITER_ELINKNO_CITER(baseAddr
, channel
, count
);
327 /*FUNCTION**********************************************************************
329 * Function Name : EDMA_HAL_HTCD_HTCDSetMajorCount
330 * Description : Gets the begin major iteration count according to minor loop channel link setting.
332 *END**************************************************************************/
333 uint32_t EDMA_HAL_HTCDGetBeginMajorCount(uint32_t baseAddr
, uint32_t channel
)
335 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
337 if (BR_DMA_TCDn_BITER_ELINKNO_ELINK(baseAddr
, channel
))
339 return BR_DMA_TCDn_BITER_ELINKYES_BITER(baseAddr
, channel
);
343 return BR_DMA_TCDn_BITER_ELINKNO_BITER(baseAddr
, channel
);
347 /*FUNCTION**********************************************************************
349 * Function Name : EDMA_HAL_HTCD_HTCDGetCurrentMajorCount
350 * Description : Gets the current major iteration count according to minor loop channel link setting.
352 *END**************************************************************************/
353 uint32_t EDMA_HAL_HTCDGetCurrentMajorCount(uint32_t baseAddr
, uint32_t channel
)
355 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
357 if (BR_DMA_TCDn_BITER_ELINKNO_ELINK(baseAddr
, channel
))
359 return BR_DMA_TCDn_CITER_ELINKYES_CITER(baseAddr
, channel
);
363 return BR_DMA_TCDn_CITER_ELINKNO_CITER(baseAddr
, channel
);
367 /*FUNCTION**********************************************************************
369 * Function Name : EDMA_HAL_HTCDGetUnfinishedBytes
370 * Description : Get the bytes number of bytes haven't been transferred for this hardware TCD.
372 *END**************************************************************************/
373 uint32_t EDMA_HAL_HTCDGetUnfinishedBytes(uint32_t baseAddr
, uint32_t channel
)
375 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
379 nbytes
= EDMA_HAL_HTCDGetNbytes(baseAddr
, channel
);
381 if (BR_DMA_TCDn_BITER_ELINKNO_ELINK(baseAddr
, channel
))
383 return (BR_DMA_TCDn_CITER_ELINKYES_CITER(baseAddr
, channel
) * nbytes
);
388 return (BR_DMA_TCDn_CITER_ELINKNO_CITER(baseAddr
, channel
) * nbytes
);
393 /*FUNCTION**********************************************************************
395 * Function Name : EDMA_HAL_HTCDGetFinishedBytes
396 * Description : Get the bytes number of bytes already be transferred for this hardware TCD.
398 *END**************************************************************************/
399 uint32_t EDMA_HAL_HTCDGetFinishedBytes(uint32_t baseAddr
, uint32_t channel
)
401 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
403 uint32_t nbytes
, begin_majorcount
, current_majorcount
;
405 nbytes
= EDMA_HAL_HTCDGetNbytes(baseAddr
, channel
);
406 begin_majorcount
= EDMA_HAL_HTCDGetBeginMajorCount(baseAddr
,channel
);
407 current_majorcount
= EDMA_HAL_HTCDGetCurrentMajorCount(baseAddr
,channel
);
409 return ((begin_majorcount
- current_majorcount
) * nbytes
);
412 /*FUNCTION**********************************************************************
414 * Function Name : EDMA_HAL_STCDSetAttribute
415 * Description : Configures the transfer attribute for software TCD.
417 *END**************************************************************************/
418 void EDMA_HAL_STCDSetAttribute(
419 edma_software_tcd_t
*stcd
,
420 edma_modulo_t srcModulo
, edma_modulo_t destModulo
,
421 edma_transfer_size_t srcTransferSize
, edma_transfer_size_t destTransferSize
)
425 stcd
->ATTR
= DMA_ATTR_SMOD(srcModulo
) | DMA_ATTR_DMOD(destModulo
) |
426 DMA_ATTR_SSIZE(srcTransferSize
) | DMA_ATTR_DSIZE(destTransferSize
);
429 /*FUNCTION**********************************************************************
431 * Function Name : EDMA_HAL_STCDSetNbytes
432 * Description : Configures the nbytes for software TCD
434 *END**************************************************************************/
435 void EDMA_HAL_STCDSetNbytes(uint32_t baseAddr
, edma_software_tcd_t
*stcd
, uint32_t nbytes
)
439 if (BR_DMA_CR_EMLM(baseAddr
))
441 if (stcd
->NBYTES
.MLOFFNO
| (DMA_NBYTES_MLOFFNO_SMLOE_MASK
| DMA_NBYTES_MLOFFNO_DMLOE_MASK
))
443 stcd
->NBYTES
.MLOFFYES
= (stcd
->NBYTES
.MLOFFYES
& ~DMA_NBYTES_MLOFFYES_NBYTES_MASK
) |
444 DMA_NBYTES_MLOFFYES_NBYTES(nbytes
);
448 stcd
->NBYTES
.MLOFFNO
= (stcd
->NBYTES
.MLOFFNO
& ~DMA_NBYTES_MLOFFNO_NBYTES_MASK
) |
449 DMA_NBYTES_MLOFFNO_NBYTES(nbytes
);
454 stcd
->NBYTES
.MLNO
= (stcd
->NBYTES
.MLNO
& ~DMA_NBYTES_MLNO_NBYTES_MASK
) |
455 DMA_NBYTES_MLNO_NBYTES(nbytes
);
460 /*FUNCTION**********************************************************************
462 * Function Name : EDMA_HAL_STCDSetMinorLoopOffset
465 *END**************************************************************************/
466 void EDMA_HAL_STCDSetMinorLoopOffset(
467 uint32_t baseAddr
, edma_software_tcd_t
*stcd
, edma_minorloop_offset_config_t
*config
)
470 stcd
->NBYTES
.MLOFFYES
= (stcd
->NBYTES
.MLOFFYES
&
471 ~(DMA_NBYTES_MLOFFYES_SMLOE_MASK
| DMA_NBYTES_MLOFFYES_DMLOE_MASK
)) |
472 (((uint32_t)config
->enableSrcMinorloop
<< DMA_NBYTES_MLOFFYES_SMLOE_SHIFT
) |
473 ((uint32_t)config
->enableDestMinorloop
<< DMA_NBYTES_MLOFFYES_DMLOE_SHIFT
));
475 if ((config
->enableSrcMinorloop
== true) || (config
->enableDestMinorloop
== true))
477 BW_DMA_CR_EMLM(baseAddr
, true);
478 stcd
->NBYTES
.MLOFFYES
= (stcd
->NBYTES
.MLOFFYES
& ~DMA_NBYTES_MLOFFYES_MLOFF_MASK
) |
479 DMA_NBYTES_MLOFFYES_MLOFF(config
->offset
);
483 /*FUNCTION**********************************************************************
488 *END**************************************************************************/
489 void EDMA_HAL_STCDSetScatterGatherLink(
490 edma_software_tcd_t
*stcd
, edma_software_tcd_t
*nextStcd
)
494 EDMA_HAL_STCDSetScatterGatherCmd(stcd
, true);
495 stcd
->DLAST_SGA
= DMA_DLAST_SGA_DLASTSGA((uint32_t)nextStcd
);
498 /*FUNCTION**********************************************************************
500 * Function Name : EDMA_HAL_STCDSetChannelMinorLink
503 *END**************************************************************************/
504 void EDMA_HAL_STCDSetChannelMinorLink(
505 edma_software_tcd_t
*stcd
, uint32_t linkChannel
, bool enable
)
511 stcd
->BITER
.ELINKYES
= (stcd
->BITER
.ELINKYES
& ~DMA_BITER_ELINKYES_ELINK_MASK
) |
512 ((uint32_t)enable
<< DMA_BITER_ELINKYES_ELINK_SHIFT
);
513 stcd
->BITER
.ELINKYES
= (stcd
->BITER
.ELINKYES
& ~DMA_BITER_ELINKYES_LINKCH_MASK
) |
514 DMA_BITER_ELINKYES_LINKCH(linkChannel
);
515 stcd
->CITER
.ELINKYES
= (stcd
->CITER
.ELINKYES
& ~DMA_CITER_ELINKYES_ELINK_MASK
) |
516 ((uint32_t)enable
<< DMA_CITER_ELINKYES_ELINK_SHIFT
);
517 stcd
->CITER
.ELINKYES
= (stcd
->CITER
.ELINKYES
& ~DMA_CITER_ELINKYES_LINKCH_MASK
) |
518 DMA_CITER_ELINKYES_LINKCH(linkChannel
);
522 stcd
->BITER
.ELINKNO
= (stcd
->BITER
.ELINKNO
& ~DMA_BITER_ELINKNO_ELINK_MASK
) |
523 ((uint32_t)enable
<< DMA_BITER_ELINKNO_ELINK_SHIFT
);
524 stcd
->CITER
.ELINKNO
= (stcd
->CITER
.ELINKNO
& ~DMA_CITER_ELINKNO_ELINK_MASK
) |
525 ((uint32_t)enable
<< DMA_CITER_ELINKNO_ELINK_SHIFT
);
528 /*FUNCTION**********************************************************************
530 * Function Name : EDMA_HAL_STCDSetMajorCount
531 * Description : Sets the major iteration count according to minor loop channel link setting.
533 *END**************************************************************************/
534 void EDMA_HAL_STCDSetMajorCount(edma_software_tcd_t
*stcd
, uint32_t count
)
538 if (stcd
->BITER
.ELINKNO
& DMA_BITER_ELINKNO_ELINK_MASK
)
540 stcd
->BITER
.ELINKYES
= (stcd
->BITER
.ELINKYES
& ~DMA_BITER_ELINKYES_BITER_MASK
) |
541 DMA_BITER_ELINKYES_BITER(count
);
542 stcd
->CITER
.ELINKYES
= (stcd
->CITER
.ELINKYES
& ~DMA_CITER_ELINKYES_CITER_MASK
) |
543 DMA_CITER_ELINKYES_CITER(count
);
547 stcd
->BITER
.ELINKNO
= (stcd
->BITER
.ELINKNO
& ~DMA_BITER_ELINKNO_BITER_MASK
) |
548 DMA_BITER_ELINKNO_BITER(count
);
549 stcd
->CITER
.ELINKNO
= (stcd
->CITER
.ELINKNO
& ~DMA_CITER_ELINKNO_CITER_MASK
) |
550 DMA_CITER_ELINKNO_CITER(count
);
554 /*FUNCTION**********************************************************************
556 * Function Name : EDMA_HAL_PushSTCDToHTCD
557 * Description : Copy the configuration data from the software TCD to hardware TCD.
559 *END**************************************************************************/
560 void EDMA_HAL_PushSTCDToHTCD(uint32_t baseAddr
, uint32_t channel
, edma_software_tcd_t
*stcd
)
562 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
565 HW_DMA_TCDn_SADDR_WR(baseAddr
, channel
, stcd
->SADDR
);
566 HW_DMA_TCDn_SOFF_WR(baseAddr
, channel
, stcd
->SOFF
);
567 HW_DMA_TCDn_ATTR_WR(baseAddr
, channel
, stcd
->ATTR
);
568 HW_DMA_TCDn_NBYTES_MLNO_WR(baseAddr
, channel
, stcd
->NBYTES
.MLNO
);
569 HW_DMA_TCDn_SLAST_WR(baseAddr
, channel
, stcd
->SLAST
);
570 HW_DMA_TCDn_DADDR_WR(baseAddr
, channel
, stcd
->DADDR
);
571 HW_DMA_TCDn_DOFF_WR(baseAddr
, channel
, stcd
->DOFF
);
572 HW_DMA_TCDn_CITER_ELINKYES_WR(baseAddr
, channel
, stcd
->CITER
.ELINKYES
);
573 HW_DMA_TCDn_DLASTSGA_WR(baseAddr
, channel
, stcd
->DLAST_SGA
);
574 HW_DMA_TCDn_CSR_WR(baseAddr
, channel
, stcd
->CSR
);
575 HW_DMA_TCDn_BITER_ELINKYES_WR(baseAddr
, channel
, stcd
->BITER
.ELINKYES
);
578 /*FUNCTION**********************************************************************
580 * Function Name : EDMA_HAL_SetSTCDBasicTransfer
581 * Description : Set the basic transfer for software TCD.
583 *END**************************************************************************/
584 edma_status_t
EDMA_HAL_STCDSetBasicTransfer(
585 uint32_t baseAddr
, edma_software_tcd_t
*stcd
, edma_transfer_config_t
*config
,
586 bool enableInt
, bool disableDmaRequest
)
590 EDMA_HAL_STCDSetSrcAddr(stcd
, config
->srcAddr
);
591 EDMA_HAL_STCDSetDestAddr(stcd
, config
->destAddr
);
593 EDMA_HAL_STCDSetSrcOffset(stcd
, config
->srcOffset
);
594 EDMA_HAL_STCDSetDestOffset(stcd
, config
->destOffset
);
596 EDMA_HAL_STCDSetAttribute(stcd
, config
->srcModulo
, config
->destModulo
,
597 config
->srcTransferSize
, config
->destTransferSize
);
599 EDMA_HAL_STCDSetSrcLastAdjust(stcd
, config
->srcLastAddrAdjust
);
600 EDMA_HAL_STCDSetDestLastAdjust(stcd
, config
->destLastAddrAdjust
);
601 EDMA_HAL_STCDSetNbytes(baseAddr
, stcd
, config
->minorLoopCount
);
602 EDMA_HAL_STCDSetMajorCount(stcd
, config
->majorLoopCount
);
604 EDMA_HAL_STCDSetIntCmd(stcd
, enableInt
);
605 EDMA_HAL_STCDSetDisableDmaRequestAfterTCDDoneCmd(stcd
, disableDmaRequest
);
606 return kStatus_EDMA_Success
;
609 #if (FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT > 0x0U)
610 /*FUNCTION**********************************************************************
612 * Function Name : EDMA_HAL_SetAsyncRequestInStopModeCmd
613 * Description : Enables/Disables an asynchronous request in stop mode.
615 *END**************************************************************************/
616 void EDMA_HAL_SetAsyncRequestInStopModeCmd(uint32_t baseAddr
, uint32_t channel
, bool enable
)
618 assert(channel
< FSL_FEATURE_EDMA_MODULE_CHANNEL
);
622 HW_DMA_EARS_SET(baseAddr
, 1U << channel
);
626 HW_DMA_EARS_CLR(baseAddr
, 1U << channel
);
630 /*******************************************************************************
632 ******************************************************************************/