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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_KPSDK_MCUS / TARGET_KPSDK_CODE / hal / mcg / fsl_mcg_hal_modes.h
1 /*
2 * Copyright (c) 2013, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30 #if !defined(__FSL_MCG_HAL_MODES_H__)
31 #define __FSL_MCG_HAL_MODES_H__
32
33 #include <stdint.h>
34 #include <stdbool.h>
35 #include <assert.h>
36 #include "fsl_mcg_features.h"
37 #include "fsl_mcg_hal.h"
38
39 //! @addtogroup mcg_hal
40 //! @{
41
42 ////////////////////////////////////////////////////////////////////////////////
43 // Definitions
44 ////////////////////////////////////////////////////////////////////////////////
45
46 /*! @brief MCG mode definitions */
47 typedef enum _mcg_modes {
48 kMcgModeFEI, /* FEI - FLL Engaged Internal */
49 kMcgModeFEE, /* FEE - FLL Engaged External */
50 kMcgModeFBI, /* FBI - FLL Bypassed Internal */
51 kMcgModeFBE, /* FBE - FLL Bypassed External */
52 kMcgModePEE, /* PEE - PLL Engaged External */
53 kMcgModePBE, /* PBE - PLL Bypassed Enternal */
54 kMcgModeBLPI, /* BLPI - Bypassed Low Power Internal */
55 kMcgModeBLPE, /* BLPE - Bypassed Low Power External */
56 kMcgModeSTOP, /* STOP - Stop */
57 kMcgModeError /* Unknown mode */
58 } mcg_modes_t;
59
60 /*! @brief MCG mode transition API error code definitions */
61 typedef enum McgModeErrorCode {
62
63 /* MCG mode error codes */
64
65 kMcgErrNotInFeiMode = 0x01, /* - Not in FEI mode */
66 kMcgErrNotInFeeMode = 0x02, /* - Not in FEE mode */
67 kMcgErrNotInFbiMode = 0x03, /* - Not in FBI mode */
68 kMcgErrNotInFbeMode = 0x04, /* - Not in FBE mode */
69 kMcgErrNotInBlpiMode = 0x05, /* - Not in BLPI mode */
70 kMcgErrNotInBlpeMode = 0x06, /* - Not in BLPE mode */
71 kMcgErrNotInPbeMode = 0x07, /* - Not in PBE mode */
72 kMcgErrNotInPeeMode = 0x08, /* - Not in PEE mode */
73
74 /* CLock MUX switching error codes */
75
76 kMcgErrIrefstClearTimeOut = 0x11, /* - IREFST did not clear within allowed time, FLL
77 reference did not switch over from internal to
78 external clock */
79 kMcgErrIrefstSetTimeout = 0x12, /* - IREFST did not set within allowed time, the FLL
80 reference did not switch over from external to
81 internal clock(NEED TO CHECK IN MOVES TO FBI MODE) */
82 kMcgErrIrcstClearTimeout = 0x13, /* - IRCST did not clear within allowed time,
83 slow IRC is not selected */
84 kMcgErrIrefstSetTimeout1 = 0x14, /* - IREFST did not set within allowed time,
85 fast IRC is not selected */
86 kMcgErrPllstClearTimeout = 0x15, /* - PLLST did not clear, PLLST did not switch to
87 FLL output, FLL is not running */
88 kMcgErrPllstSetTimeout = 0x16, /* - PLLST did not set, PLLST did not switch to PLL
89 ouptut, PLL is not running */
90 kMcgErrPllcst = 0x17, /* - PLLCST did not switch to the correct state,
91 the correct PLL is not selected as PLLS clock source */
92 kMcgErrClkst0 = 0x18, /* - CLKST != 0, MCG did not switch to FLL output */
93 kMcgErrClkst1 = 0x19, /* - CLKST != 1, MCG did not switch to internal reference
94 clock source */
95 kMcgErrClkst2 = 0x1A, /* - CLKST != 2, MCG did not switch to external clock */
96 kMcgErrClkst3 = 0x1B, /* - CLKST != 3, MCG did not switch to PLL */
97
98 /* Oscillator error codes */
99
100 kMcgErrOscEtalRange = 0x21, /* - external frequency is bigger than max frequency */
101 kMcgErrOscXtalRange = 0x22, /* - crystal frequency outside allowed range */
102 kMcgErrOscSetTimeout = 0x23, /* - OSCINIT/OSCINIT2 did not set within allowed time */
103
104 /* IRC and FLL error codes */
105
106 kMcgErrIrcSlowRange = 0x31, /* - slow IRC is outside allowed range */
107 kMcgErrIrcFastRange = 0x32, /* - fast IRC is outside allowed range */
108 kMcgErrFllRange0Min = 0x33, /* - FLL frequency is below minimum value for range 0 */
109 kMcgErrFllRange0Max = 0x34, /* - FLL frequency is above maximum value for range 0 */
110 kMcgErrFllRange1Min = 0x35, /* - FLL frequency is below minimum value for range 1 */
111 kMcgErrFllRange1Max = 0x36, /* - FLL frequency is above maximum value for range 1 */
112 kMcgErrFllRange2Min = 0x37, /* - FLL frequency is below minimum value for range 2 */
113 kMcgErrFllRange2Max = 0x38, /* - FLL frequency is above maximum value for range 2 */
114 kMcgErrFllRange3Min = 0x39, /* - FLL frequency is below minimum value for range 3 */
115 kMcgErrFllRange3Max = 0x3A, /* - FLL frequency is above maximum value for range 3 */
116 kMcgErrFllDrstDrsRange = 0x3B, /* - DRS is out of range */
117
118 kMcgErrFllFreqency = 0x3C,
119
120 /* PLL error codes */
121
122 kMcgErrPllPrdidRange = 0x41, /* - PRDIV outside allowed range */
123 kMcgErrPllVdivRange = 0x42, /* - VDIV outside allowed range */
124 kMcgErrPllRefClkRange = 0x43, /* - PLL reference clock frequency, out of allowed range */
125 kMcgErrPllLockBit = 0x44, /* - LOCK or LOCK2 bit did not set */
126 kMcgErrPllOutClkRange = 0x45, /* - PLL output frequency is outside allowed range (NEED
127 TO ADD THIS CHECK TO fbe_pbe and blpe_pbe) only in
128 fei-pee at this time */
129 kMcgErrMax = 0x1000
130 } mcg_mode_error_code_t;
131
132 ////////////////////////////////////////////////////////////////////////////////
133 // API
134 ////////////////////////////////////////////////////////////////////////////////
135
136 #if defined(__cplusplus)
137 extern "C" {
138 #endif // __cplusplus
139
140 /*!
141 * @brief Gets the current MCG mode.
142 *
143 * This is an internal function that checks the MCG registers and determine
144 * the current MCG mode
145 *
146 * @param baseAddr Base address for current MCG instance.
147 * @return mcgMode Current MCG mode or error code mcg_modes_t
148 */
149 mcg_modes_t CLOCK_HAL_GetMcgMode(uint32_t baseAddr);
150
151 /*!
152 * @brief Checks the FLL frequency integrity.
153 *
154 * This function calculates and checks the FLL frequency value based on input value.
155 *
156 * @param baseAddr Base address for current MCG instance.
157 * @param fllRef - FLL reference clock in Hz.
158 *
159 * @return value FLL output frequency (Hz) or error code
160 */
161 uint32_t CLOCK_HAL_GetFllFrequency(uint32_t baseAddr, int32_t fllRef);
162
163 /*!
164 * @brief Mode transition FEI to FEE mode
165 *
166 * This function transitions the MCG from FEI mode to FEE mode.
167 *
168 * @param baseAddr Base address for current MCG instance.
169 * @param oscselVal - oscillator selection value
170 * 0 - OSC 0, 1 - RTC 32k, 2 - IRC 48M
171 * @param crystalVal - external clock frequency in Hz
172 * oscselVal - 0
173 * erefsVal - 0: osc0 external clock frequency
174 * erefsVal - 1: osc0 crystal clock frequency
175 * oscselVal - 1: RTC 32Khz clock source frequency
176 * oscselVal - 2: IRC 48Mhz clock source frequency
177 * @param hgoVal - selects whether low power or high gain mode is selected
178 * for the crystal oscillator. This value is only valid when
179 * oscselVal is 0 and erefsVal is 1.
180 * @param erefsVal - selects external clock (=0) or crystal OSC (=1)
181 *
182 * @return value MCGCLKOUT frequency (Hz) or error code
183 */
184 uint32_t CLOCK_HAL_SetFeiToFeeMode(uint32_t baseAddr, mcg_oscsel_select_t oscselVal,
185 uint32_t crystalVal, mcg_high_gain_osc_select_t hgoVal,
186 mcg_external_ref_clock_select_t erefsVal);
187
188 /*!
189 * @brief Mode transition FEI to FBI mode
190 *
191 * This function transitions the MCG from FEI mode to FBI mode.
192 *
193 * @param baseAddr Base address for current MCG instance.
194 * @param ircFreq - internal reference clock frequency value
195 * @param ircSelect - slow or fast clock selection
196 * 0: slow, 1: fast
197 * @return value MCGCLKOUT frequency (Hz) or error code
198 */
199 uint32_t CLOCK_HAL_SetFeiToFbiMode(uint32_t baseAddr, uint32_t ircFreq,
200 mcg_internal_ref_clock_select_t ircSelect);
201
202 /*!
203 * @brief Mode transition FEI to FBE mode
204 *
205 * This function transitions the MCG from FEI mode to FBE mode.
206 *
207 * @param baseAddr Base address for current MCG instance.
208 * @param oscselVal - oscillator selection value
209 * 0 - OSC 0, 1 - RTC 32k, 2 - IRC 48M
210 * @param crystalVal - external clock frequency in Hz
211 * oscselVal - 0
212 * erefsVal - 0: osc0 external clock frequency
213 * erefsVal - 1: osc0 crystal clock frequency
214 * oscselVal - 1: RTC 32Khz clock source frequency
215 * oscselVal - 2: IRC 48Mhz clock source frequency
216 * @param hgoVal - selects whether low power or high gain mode is selected
217 * for the crystal oscillator. This value is only valid when
218 * oscselVal is 0 and erefsVal is 1.
219 * @param erefsVal - selects external clock (=0) or crystal OSC (=1)
220 *
221 * @return value MCGCLKOUT frequency (Hz) or error code
222 */
223 uint32_t CLOCK_HAL_SetFeiToFbeMode(uint32_t baseAddr, mcg_oscsel_select_t oscselVal,
224 uint32_t crystalVal, mcg_high_gain_osc_select_t hgoVal,
225 mcg_external_ref_clock_select_t erefsVal);
226
227 /*!
228 * @brief Mode transition FEE to FEI mode
229 *
230 * This function transitions the MCG from FEE mode to FEI mode.
231 *
232 * @param baseAddr Base address for current MCG instance.
233 * @param ircFreq - internal reference clock frequency value (slow)
234 *
235 * @return value MCGCLKOUT frequency (Hz) or error code
236 */
237 uint32_t CLOCK_HAL_SetFeeToFeiMode(uint32_t baseAddr, uint32_t ircFreq);
238
239 /*!
240 * @brief Mode transition FEE to FBI mode
241 *
242 * This function transitions the MCG from FEE mode to FBI mode.
243 *
244 * @param baseAddr Base address for current MCG instance.
245 * @param ircFreq - internal reference clock frequency value
246 * @param ircSelect - slow or fast clock selection
247 * 0: slow, 1: fast
248 *
249 * @return value MCGCLKOUT frequency (Hz) or error code
250 */
251 uint32_t CLOCK_HAL_SetFeeToFbiMode(uint32_t baseAddr, uint32_t ircFreq,
252 mcg_internal_ref_clock_select_t ircSelect);
253
254 /*!
255 * @brief Mode transition FEE to FBE mode
256 *
257 * This function transitions the MCG from FEE mode to FBE mode.
258 *
259 * @param baseAddr Base address for current MCG instance.
260 * @param crystalVal - external reference clock frequency value
261 *
262 * @return value MCGCLKOUT frequency (Hz) or error code
263 */
264 uint32_t CLOCK_HAL_SetFeeToFbeMode(uint32_t baseAddr, uint32_t crystalVal);
265
266 /*!
267 * @brief Mode transition FBI to FEI mode
268 *
269 * This function transitions the MCG from FBI mode to FEI mode.
270 *
271 * @param baseAddr Base address for current MCG instance.
272 * @param ircFreq - internal reference clock frequency value (slow)
273 *
274 * @return value MCGCLKOUT frequency (Hz) or error code
275 */
276 uint32_t CLOCK_HAL_SetFbiToFeiMode(uint32_t baseAddr, uint32_t ircFreq);
277
278 /*!
279 * @brief Mode transition FBI to FEE mode
280 *
281 * This function transitions the MCG from FBI mode to FEE mode.
282 *
283 * @param baseAddr Base address for current MCG instance.
284 * @param oscselVal - oscillator selection value
285 * 0 - OSC 0, 1 - RTC 32k, 2 - IRC 48M
286 * @param crystalVal - external clock frequency in Hz
287 * oscselVal - 0
288 * erefsVal - 0: osc0 external clock frequency
289 * erefsVal - 1: osc0 crystal clock frequency
290 * oscselVal - 1: RTC 32Khz clock source frequency
291 * oscselVal - 2: IRC 48Mhz clock source frequency
292 * @param hgoVal - selects whether low power or high gain mode is selected
293 * for the crystal oscillator. This value is only valid when
294 * oscselVal is 0 and erefsVal is 1.
295 * @param erefsVal - selects external clock (=0) or crystal OSC (=1)
296 *
297 * @return value MCGCLKOUT frequency (Hz) or error code
298 */
299 uint32_t CLOCK_HAL_SetFbiToFeeMode(uint32_t baseAddr, mcg_oscsel_select_t oscselVal,
300 uint32_t crystalVal, mcg_high_gain_osc_select_t hgoVal,
301 mcg_external_ref_clock_select_t erefsVal);
302
303 /*!
304 * @brief Mode transition FBI to FBE mode
305 *
306 * This function transitions the MCG from FBI mode to FBE mode.
307 *
308 * @param baseAddr Base address for current MCG instance.
309 * @param oscselVal - oscillator selection value
310 * 0 - OSC 0, 1 - RTC 32k, 2 - IRC 48M
311 * @param crystalVal - external clock frequency in Hz
312 * oscselVal - 0
313 * erefsVal - 0: osc0 external clock frequency
314 * erefsVal - 1: osc0 crystal clock frequency
315 * oscselVal - 1: RTC 32Khz clock source frequency
316 * oscselVal - 2: IRC 48Mhz clock source frequency
317 * @param hgoVal - selects whether low power or high gain mode is selected
318 * for the crystal oscillator. This value is only valid when
319 * oscselVal is 0 and erefsVal is 1.
320 * @param erefsVal - selects external clock (=0) or crystal OSC (=1)
321 *
322 * @return value MCGCLKOUT frequency (Hz) or error code
323 */
324 uint32_t CLOCK_HAL_SetFbiToFbeMode(uint32_t baseAddr, mcg_oscsel_select_t oscselVal,
325 uint32_t crystalVal, mcg_high_gain_osc_select_t hgoVal,
326 mcg_external_ref_clock_select_t erefsVal);
327
328 /*!
329 * @brief Mode transition FBI to BLPI mode
330 *
331 * This function transitions the MCG from FBI mode to BLPI mode.This is
332 * achieved by setting the MCG_C2[LP] bit.
333 *
334 * @param baseAddr Base address for current MCG instance.
335 * @param ircFreq - internal reference clock frequency value
336 * @param ircSelect - slow or fast clock selection
337 * 0: slow, 1: fast
338 *
339 * @return value MCGCLKOUT frequency (Hz) or error code
340 */
341 uint32_t CLOCK_HAL_SetFbiToBlpiMode(uint32_t baseAddr, uint32_t ircFreq,
342 mcg_internal_ref_clock_select_t ircSelect);
343
344 /*!
345 * @brief Mode transition BLPI to FBI mode
346 *
347 * This function transitions the MCG from BLPI mode to FBI mode.This is
348 * achieved by clearing the MCG_C2[LP] bit.
349 *
350 * @param baseAddr Base address for current MCG instance.
351 * @param ircFreq - internal reference clock frequency value
352 * @param ircSelect - slow or fast clock selection
353 * 0: slow, 1: fast
354 *
355 * @return value MCGCLKOUT frequency (Hz) or error code
356 */
357 uint32_t CLOCK_HAL_SetBlpiToFbiMode(uint32_t baseAddr, uint32_t ircFreq, uint8_t ircSelect);
358
359 /*!
360 * @brief Mode transition FBE to FEE mode
361 *
362 * This function transitions the MCG from FBE mode to FEE mode.
363 *
364 * @param baseAddr Base address for current MCG instance.
365 * @param crystalVal - external reference clock frequency value
366 *
367 * @return value MCGCLKOUT frequency (Hz) or error code
368 */
369 uint32_t CLOCK_HAL_SetFbeToFeeMode(uint32_t baseAddr, uint32_t crystalVal);
370
371 /*!
372 * @brief Mode transition FBE to FEI mode
373 *
374 * This function transitions the MCG from FBE mode to FEI mode.
375 *
376 * @param baseAddr Base address for current MCG instance.
377 * @param ircFreq - internal reference clock frequency value (slow)
378 *
379 * @return value MCGCLKOUT frequency (Hz) or error code
380 *END***********************************************************************************/
381 uint32_t CLOCK_HAL_SetFbeToFeiMode(uint32_t baseAddr, uint32_t ircFreq);
382
383 /*!
384 * @brief Mode transition FBE to FBI mode
385 *
386 * This function transitions the MCG from FBE mode to FBI mode.
387 *
388 * @param baseAddr Base address for current MCG instance.
389 * @param ircFreq - internal reference clock frequency value
390 * @param ircSelect - slow or fast clock selection
391 * 0: slow, 1: fast
392 *
393 * @return value MCGCLKOUT frequency (Hz) or error code
394 *END***********************************************************************************/
395 uint32_t CLOCK_HAL_SetFbeToFbiMode(uint32_t baseAddr, uint32_t ircFreq,
396 mcg_internal_ref_clock_select_t ircSelect);
397
398 /*!
399 * @brief Mode transition FBE to PBE mode
400 *
401 * This function transitions the MCG from FBE mode to PBE mode.
402 * The function requires the desired OSC and PLL be passed in to it for compatibility
403 * with the future support of OSC/PLL selection
404 * (This function presently only supports OSC0 as PLL source)
405 *
406 * @param baseAddr Base address for current MCG instance.
407 * @param crystalVal - external clock frequency in Hz
408 * @param pllcsSelect - 0 to select PLL0, non-zero to select PLL1.
409 * @param prdivVal - value to divide the external clock source by to create
410 * the desired PLL reference clock frequency
411 * @param vdivVal - value to multiply the PLL reference clock frequency by
412 *
413 * @return value MCGCLKOUT frequency (Hz) or error code
414 */
415 uint32_t CLOCK_HAL_SetFbeToPbeMode(uint32_t baseAddr, uint32_t crystalVal,
416 mcg_pll_clk_select_t pllcsSelect,
417 uint8_t prdivVal, uint8_t vdivVal);
418
419 /*!
420 * @brief Mode transition FBE to BLPE mode
421 *
422 * This function transitions the MCG from FBE mode to BLPE mode.
423 *
424 * @param baseAddr Base address for current MCG instance.
425 * @param crystalVal - external clock frequency in Hz
426 *
427 * @return value MCGCLKOUT frequency (Hz) or error code
428 */
429 uint32_t CLOCK_HAL_SetFbeToBlpeMode(uint32_t baseAddr, uint32_t crystalVal);
430
431 /*!
432 * @brief Mode transition PBE to FBE mode
433 *
434 * This function transitions the MCG from PBE mode to FBE mode.
435 *
436 * @param baseAddr Base address for current MCG instance.
437 * @param crystalVal - external clock frequency in Hz
438 *
439 * @return value MCGCLKOUT frequency (Hz) or error code
440 */
441 uint32_t CLOCK_HAL_SetPbeToFbeMode(uint32_t baseAddr, uint32_t crystalVal);
442
443 /*!
444 * @brief Mode transition PBE to PEE mode
445 *
446 * This function transitions the MCG from PBE mode to PEE mode.
447 *
448 * @param baseAddr Base address for current MCG instance.
449 * @param crystalVal - external clock frequency in Hz
450 * @param pllcsSelect - PLLCS select setting
451 * mcg_pll_clk_select_t is defined in fsl_mcg_hal.h
452 * 0: kMcgPllcsSelectPll0 PLL0 output clock is selected
453 * 1: kMcgPllcsSelectPll1 PLL1 output clock is selected
454 *
455 * @return value MCGCLKOUT frequency (Hz) or error code
456 */
457 uint32_t CLOCK_HAL_SetPbeToPeeMode(uint32_t baseAddr, uint32_t crystalVal,
458 mcg_pll_clk_select_t pllcsSelect);
459
460 /*!
461 * @brief Mode transition PBE to BLPE mode
462 *
463 * This function transitions the MCG from PBE mode to BLPE mode.
464 *
465 * @param baseAddr Base address for current MCG instance.
466 * @param crystalVal - external clock frequency in Hz
467 *
468 * @return value MCGCLKOUT frequency (Hz) or error code
469 */
470 uint32_t CLOCK_HAL_SetPbeToBlpeMode(uint32_t baseAddr, uint32_t crystalVal);
471
472 /*!
473 * @brief Mode transition PEE to PBE mode
474 *
475 * This function transitions the MCG from PEE mode to PBE mode.
476 *
477 * @param baseAddr Base address for current MCG instance.
478 * @param crystalVal - external clock frequency in Hz
479 *
480 * @return value MCGCLKOUT frequency (Hz) or error code
481 */
482 uint32_t CLOCK_HAL_SetPeeToPbeMode(uint32_t baseAddr, uint32_t crystalVal);
483
484 /*!
485 * @brief Mode transition BLPE to PBE mode
486 *
487 * This function transitions the MCG from BLPE mode to PBE mode.
488 * The function requires the desired OSC and PLL be passed in to it for compatibility
489 * with the future support of OSC/PLL selection
490 * (This function presently only supports OSC0 as PLL source)
491 *
492 * @param baseAddr Base address for current MCG instance.
493 * @param crystalVal - external clock frequency in Hz
494 * @param pllcsSelect - 0 to select PLL0, non-zero to select PLL1.
495 * @param prdivVal - value to divide the external clock source by to create
496 * the desired PLL reference clock frequency
497 * @param vdivVal - value to multiply the PLL reference clock frequency by
498 *
499 * @return value MCGCLKOUT frequency (Hz) or error code
500 */
501 uint32_t CLOCK_HAL_SetBlpeToPbeMode(uint32_t baseAddr, uint32_t crystalVal,
502 mcg_pll_clk_select_t pllcsSelect,
503 uint8_t prdivVal, uint8_t vdivVal);
504
505 /*!
506 * @brief Mode transition BLPE to FBE mode
507 *
508 * This function transitions the MCG from BLPE mode to FBE mode.
509 *
510 * @param baseAddr Base address for current MCG instance.
511 * @param crystalVal - external reference clock frequency value
512 *
513 * @return value MCGCLKOUT frequency (Hz) or error code
514 */
515 uint32_t CLOCK_HAL_SetBlpeToFbeMode(uint32_t baseAddr, uint32_t crystalVal);
516
517 #if defined(__cplusplus)
518 }
519 #endif // __cplusplus
520
521 //! @}
522
523 #endif // __FSL_MCG_HAL_MODES_H__
524 ////////////////////////////////////////////////////////////////////////////////
525 // EOF
526 ////////////////////////////////////////////////////////////////////////////////
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