tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include "mbed_assert.h"
  17 #include "i2c_api.h"
  18 #include "cmsis.h"
  19 #include "pinmap.h"
  20
  21 #if DEVICE_I2C
  22
  23 static const PinMap PinMap_I2C_SDA[] = {
  24     {P0_5 , I2C_0, 1},
  25     {P1_3 , I2C_1, 3},
  26     {P1_14, I2C_1, 1},
  27     {P1_24, I2C_1, 2},
  28     {NC   , NC   , 0}
  29 };
  30
  31 static const PinMap PinMap_I2C_SCL[] = {
  32     {P0_4 , I2C_0, 1},
  33     {P0_7 , I2C_1, 3},
  34     {P1_11, I2C_1, 1},
  35     {P1_30, I2C_1, 1},
  36     {NC   , NC,    0}
  37 };
  38
  39 #define I2C_CONSET(x)       (x->i2c->CONSET)
  40 #define I2C_CONCLR(x)       (x->i2c->CONCLR)
  41 #define I2C_STAT(x)         (x->i2c->STAT)
  42 #define I2C_DAT(x)          (x->i2c->DAT)
  43 #define I2C_SCLL(x, val)    (x->i2c->SCLL = val)
  44 #define I2C_SCLH(x, val)    (x->i2c->SCLH = val)
  45
  46 static const uint32_t I2C_addr_offset[2][4] = {
  47     {0x0C, 0x20, 0x24, 0x28}, // slave address offset
  48     {0x30, 0x34, 0x38, 0x3C}  // slave address mask offset
  49 };
  50
  51 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
  52     I2C_CONCLR(obj) = (start << 5)
  53                     | (stop << 4)
  54                     | (interrupt << 3)
  55                     | (acknowledge << 2);
  56 }
  57
  58 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
  59     I2C_CONSET(obj) = (start << 5)
  60                     | (stop << 4)
  61                     | (interrupt << 3)
  62                     | (acknowledge << 2);
  63 }
  64
  65 // Clear the Serial Interrupt (SI)
  66 static inline void i2c_clear_SI(i2c_t *obj) {
  67     i2c_conclr(obj, 0, 0, 1, 0);
  68 }
  69
  70 static inline int i2c_status(i2c_t *obj) {
  71     return I2C_STAT(obj);
  72 }
  73
  74 // Wait until the Serial Interrupt (SI) is set
  75 static int i2c_wait_SI(i2c_t *obj) {
  76     volatile int timeout = 0;
  77     while (!(I2C_CONSET(obj) & (1 << 3))) {
  78         timeout++;
  79         if (timeout > 100000) return -1;
  80     }
  81     return 0;
  82 }
  83
  84 static inline void i2c_interface_enable(i2c_t *obj) {
  85     I2C_CONSET(obj) = 0x40;
  86 }
  87
  88 static inline void i2c_power_enable(i2c_t *obj) {
  89     LPC_SYSCON->SYSAHBCLKCTRL |= ((1 << 5) | (1 << 25));
  90     LPC_SYSCON->PRESETCTRL |= ((1 << 1) | (1 << 3));
  91 }
  92
  93 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
  94     // determine the SPI to use
  95     I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
  96     I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
  97     obj->i2c = (LPC_I2C0_Type *)pinmap_merge(i2c_sda, i2c_scl);
  98     MBED_ASSERT((int)obj->i2c != NC);
  99
 100     // enable power
 101     i2c_power_enable(obj);
 102
 103     // set default frequency at 100k
 104     i2c_frequency(obj, 100000);
 105     i2c_conclr(obj, 1, 1, 1, 1);
 106     i2c_interface_enable(obj);
 107
 108     pinmap_pinout(sda, PinMap_I2C_SDA);
 109     pinmap_pinout(scl, PinMap_I2C_SCL);
 110 }
 111
 112 inline int i2c_start(i2c_t *obj) {
 113     int status = 0;
 114     // 8.1 Before master mode can be entered, I2CON must be initialised to:
 115     //  - I2EN STA STO SI AA - -
 116     //  -  1    0   0   0  x - -
 117     // if AA = 0, it can't enter slave mode
 118     i2c_conclr(obj, 1, 1, 1, 1);
 119
 120     // The master mode may now be entered by setting the STA bit
 121     // this will generate a start condition when the bus becomes free
 122     i2c_conset(obj, 1, 0, 0, 1);
 123
 124     i2c_wait_SI(obj);
 125     status = i2c_status(obj);
 126
 127     // Clear start bit now transmitted, and interrupt bit
 128     i2c_conclr(obj, 1, 0, 0, 0);
 129     return status;
 130 }
 131
 132 inline int i2c_stop(i2c_t *obj) {
 133     int timeout = 0;
 134
 135     // write the stop bit
 136     i2c_conset(obj, 0, 1, 0, 0);
 137     i2c_clear_SI(obj);
 138
 139     // wait for STO bit to reset
 140     while(I2C_CONSET(obj) & (1 << 4)) {
 141         timeout ++;
 142         if (timeout > 100000) return 1;
 143     }
 144
 145     return 0;
 146 }
 147
 148
 149 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
 150     // write the data
 151     I2C_DAT(obj) = value;
 152
 153     // clear SI to init a send
 154     i2c_clear_SI(obj);
 155
 156     // wait and return status
 157     i2c_wait_SI(obj);
 158     return i2c_status(obj);
 159 }
 160
 161 static inline int i2c_do_read(i2c_t *obj, int last) {
 162     // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
 163     if (last) {
 164         i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
 165     } else {
 166         i2c_conset(obj, 0, 0, 0, 1); // send a ACK
 167     }
 168
 169     // accept byte
 170     i2c_clear_SI(obj);
 171
 172     // wait for it to arrive
 173     i2c_wait_SI(obj);
 174
 175     // return the data
 176     return (I2C_DAT(obj) & 0xFF);
 177 }
 178
 179 void i2c_frequency(i2c_t *obj, int hz) {
 180     // No peripheral clock divider on the M0
 181     uint32_t PCLK = SystemCoreClock;
 182
 183     uint32_t pulse = PCLK / (hz * 2);
 184
 185     // I2C Rate
 186     I2C_SCLL(obj, pulse);
 187     I2C_SCLH(obj, pulse);
 188 }
 189
 190 // The I2C does a read or a write as a whole operation
 191 // There are two types of error conditions it can encounter
 192 //  1) it can not obtain the bus
 193 //  2) it gets error responses at part of the transmission
 194 //
 195 // We tackle them as follows:
 196 //  1) we retry until we get the bus. we could have a "timeout" if we can not get it
 197 //      which basically turns it in to a 2)
 198 //  2) on error, we use the standard error mechanisms to report/debug
 199 //
 200 // Therefore an I2C transaction should always complete. If it doesn't it is usually
 201 // because something is setup wrong (e.g. wiring), and we don't need to programatically
 202 // check for that
 203
 204 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
 205     int count, status;
 206
 207     status = i2c_start(obj);
 208
 209     if ((status != 0x10) && (status != 0x08)) {
 210         i2c_stop(obj);
 211         return I2C_ERROR_BUS_BUSY;
 212     }
 213
 214     status = i2c_do_write(obj, (address | 0x01), 1);
 215     if (status != 0x40) {
 216         i2c_stop(obj);
 217         return I2C_ERROR_NO_SLAVE;
 218     }
 219
 220     // Read in all except last byte
 221     for (count = 0; count < (length - 1); count++) {
 222         int value = i2c_do_read(obj, 0);
 223         status = i2c_status(obj);
 224         if (status != 0x50) {
 225             i2c_stop(obj);
 226             return count;
 227         }
 228         data[count] = (char) value;
 229     }
 230
 231     // read in last byte
 232     int value = i2c_do_read(obj, 1);
 233     status = i2c_status(obj);
 234     if (status != 0x58) {
 235         i2c_stop(obj);
 236         return length - 1;
 237     }
 238
 239     data[count] = (char) value;
 240
 241     // If not repeated start, send stop.
 242     if (stop) {
 243         i2c_stop(obj);
 244     }
 245
 246     return length;
 247 }
 248
 249 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
 250     int i, status;
 251
 252     status = i2c_start(obj);
 253
 254     if ((status != 0x10) && (status != 0x08)) {
 255         i2c_stop(obj);
 256         return I2C_ERROR_BUS_BUSY;
 257     }
 258
 259     status = i2c_do_write(obj, (address & 0xFE), 1);
 260     if (status != 0x18) {
 261         i2c_stop(obj);
 262         return I2C_ERROR_NO_SLAVE;
 263     }
 264
 265     for (i=0; i<length; i++) {
 266         status = i2c_do_write(obj, data[i], 0);
 267         if(status != 0x28) {
 268             i2c_stop(obj);
 269             return i;
 270         }
 271     }
 272
 273     // clearing the serial interrupt here might cause an unintended rewrite of the last byte
 274     // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
 275     // i2c_clear_SI(obj);
 276
 277     // If not repeated start, send stop.
 278     if (stop) {
 279         i2c_stop(obj);
 280     }
 281
 282     return length;
 283 }
 284
 285 void i2c_reset(i2c_t *obj) {
 286     i2c_stop(obj);
 287 }
 288
 289 int i2c_byte_read(i2c_t *obj, int last) {
 290     return (i2c_do_read(obj, last) & 0xFF);
 291 }
 292
 293 int i2c_byte_write(i2c_t *obj, int data) {
 294     int ack;
 295     int status = i2c_do_write(obj, (data & 0xFF), 0);
 296
 297     switch(status) {
 298         case 0x18: case 0x28:       // Master transmit ACKs
 299             ack = 1;
 300             break;
 301         case 0x40:                  // Master receive address transmitted ACK
 302             ack = 1;
 303             break;
 304         case 0xB8:                  // Slave transmit ACK
 305             ack = 1;
 306             break;
 307         default:
 308             ack = 0;
 309             break;
 310     }
 311
 312     return ack;
 313 }
 314
 315 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
 316     if (enable_slave != 0) {
 317         i2c_conclr(obj, 1, 1, 1, 0);
 318         i2c_conset(obj, 0, 0, 0, 1);
 319     } else {
 320         i2c_conclr(obj, 1, 1, 1, 1);
 321     }
 322 }
 323
 324 int i2c_slave_receive(i2c_t *obj) {
 325     int status;
 326     int retval;
 327
 328     status = i2c_status(obj);
 329     switch(status) {
 330         case 0x60: retval = 3; break;
 331         case 0x70: retval = 2; break;
 332         case 0xA8: retval = 1; break;
 333         default  : retval = 0; break;
 334     }
 335
 336     return(retval);
 337 }
 338
 339 int i2c_slave_read(i2c_t *obj, char *data, int length) {
 340     int count = 0;
 341     int status;
 342
 343     do {
 344         i2c_clear_SI(obj);
 345         i2c_wait_SI(obj);
 346         status = i2c_status(obj);
 347         if((status == 0x80) || (status == 0x90)) {
 348             data[count] = I2C_DAT(obj) & 0xFF;
 349         }
 350         count++;
 351     } while (((status == 0x80) || (status == 0x90) ||
 352             (status == 0x060) || (status == 0x70)) && (count < length));
 353
 354     if(status != 0xA0) {
 355         i2c_stop(obj);
 356     }
 357
 358     i2c_clear_SI(obj);
 359
 360     return count;
 361 }
 362
 363 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
 364     int count = 0;
 365     int status;
 366
 367     if(length <= 0) {
 368         return(0);
 369     }
 370
 371     do {
 372         status = i2c_do_write(obj, data[count], 0);
 373         count++;
 374     } while ((count < length) && (status == 0xB8));
 375
 376     if((status != 0xC0) && (status != 0xC8)) {
 377         i2c_stop(obj);
 378     }
 379
 380     i2c_clear_SI(obj);
 381
 382     return(count);
 383 }
 384
 385 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
 386     uint32_t addr;
 387
 388     if ((idx >= 0) && (idx <= 3)) {
 389         addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
 390         *((uint32_t *) addr) = address & 0xFF;
 391     }
 392 }
 393
 394 #endif