tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC13XX/spi_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include "mbed_assert.h"
  17 #include <math.h>
  18 #include "spi_api.h"
  19 #include "cmsis.h"
  20 #include "pinmap.h"
  21 #include "mbed_error.h"
  22
  23 static const PinMap PinMap_SPI_SCLK[] = {
  24     {P0_6 , SPI_0, 0x02},
  25     {P0_10, SPI_0, 0x02},
  26     {P1_29, SPI_0, 0x01},
  27     {P1_15, SPI_1, 0x03},
  28     {P1_20, SPI_1, 0x02},
  29     {NC   , NC   , 0}
  30 };
  31
  32 static const PinMap PinMap_SPI_MOSI[] = {
  33     {P0_9 , SPI_0, 0x01},
  34     {P0_21, SPI_1, 0x02},
  35     {P1_22, SPI_1, 0x02},
  36     {NC   , NC   , 0}
  37 };
  38
  39 static const PinMap PinMap_SPI_MISO[] = {
  40     {P0_8 , SPI_0, 0x01},
  41     {P0_22, SPI_1, 0x03},
  42     {P1_21, SPI_1, 0x02},
  43     {NC   , NC   , 0}
  44 };
  45
  46 static const PinMap PinMap_SPI_SSEL[] = {
  47     {P0_2 , SPI_0, 0x01},
  48     {P1_19, SPI_1, 0x02},
  49     {P1_23, SPI_1, 0x02},
  50     {NC   , NC   , 0}
  51 };
  52
  53 static inline int ssp_disable(spi_t *obj);
  54 static inline int ssp_enable(spi_t *obj);
  55
  56 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
  57     // determine the SPI to use
  58     SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
  59     SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
  60     SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
  61     SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
  62     SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
  63     SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
  64
  65     obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl);
  66     MBED_ASSERT((int)obj->spi != NC);
  67
  68     // enable power and clocking
  69     switch ((int)obj->spi) {
  70         case SPI_0:
  71             LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
  72             LPC_SYSCON->SSP0CLKDIV = 0x01;
  73             LPC_SYSCON->PRESETCTRL |= 1 << 0;
  74             break;
  75         case SPI_1:
  76             LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
  77             LPC_SYSCON->SSP1CLKDIV = 0x01;
  78             LPC_SYSCON->PRESETCTRL |= 1 << 2;
  79             break;
  80     }
  81
  82     // set default format and frequency
  83     if (ssel == NC) {
  84         spi_format(obj, 8, 0, 0);  // 8 bits, mode 0, master
  85     } else {
  86         spi_format(obj, 8, 0, 1);  // 8 bits, mode 0, slave
  87     }
  88     spi_frequency(obj, 1000000);
  89
  90     // enable the ssp channel
  91     ssp_enable(obj);
  92
  93     // pin out the spi pins
  94     pinmap_pinout(mosi, PinMap_SPI_MOSI);
  95     pinmap_pinout(miso, PinMap_SPI_MISO);
  96     pinmap_pinout(sclk, PinMap_SPI_SCLK);
  97     if (ssel != NC) {
  98         pinmap_pinout(ssel, PinMap_SPI_SSEL);
  99     }
 100 }
 101
 102 void spi_free(spi_t *obj) {}
 103
 104 void spi_format(spi_t *obj, int bits, int mode, int slave) {
 105     ssp_disable(obj);
 106     MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
 107
 108     int polarity = (mode & 0x2) ? 1 : 0;
 109     int phase = (mode & 0x1) ? 1 : 0;
 110
 111     // set it up
 112     int DSS = bits - 1;            // DSS (data select size)
 113     int SPO = (polarity) ? 1 : 0;  // SPO - clock out polarity
 114     int SPH = (phase) ? 1 : 0;     // SPH - clock out phase
 115
 116     int FRF = 0;                   // FRF (frame format) = SPI
 117     uint32_t tmp = obj->spi->CR0;
 118     tmp &= ~(0xFFFF);
 119     tmp |= DSS << 0
 120         | FRF << 4
 121         | SPO << 6
 122         | SPH << 7;
 123     obj->spi->CR0 = tmp;
 124
 125     tmp = obj->spi->CR1;
 126     tmp &= ~(0xD);
 127     tmp |= 0 << 0                   // LBM - loop back mode - off
 128         | ((slave) ? 1 : 0) << 2   // MS - master slave mode, 1 = slave
 129         | 0 << 3;                  // SOD - slave output disable - na
 130     obj->spi->CR1 = tmp;
 131
 132     ssp_enable(obj);
 133 }
 134
 135 void spi_frequency(spi_t *obj, int hz) {
 136     ssp_disable(obj);
 137
 138     uint32_t PCLK = SystemCoreClock;
 139
 140     int prescaler;
 141
 142     for (prescaler = 2; prescaler <= 254; prescaler += 2) {
 143         int prescale_hz = PCLK / prescaler;
 144
 145         // calculate the divider
 146         int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
 147
 148         // check we can support the divider
 149         if (divider < 256) {
 150             // prescaler
 151             obj->spi->CPSR = prescaler;
 152
 153             // divider
 154             obj->spi->CR0 &= ~(0xFFFF << 8);
 155             obj->spi->CR0 |= (divider - 1) << 8;
 156             ssp_enable(obj);
 157             return;
 158         }
 159     }
 160     error("Couldn't setup requested SPI frequency");
 161 }
 162
 163 static inline int ssp_disable(spi_t *obj) {
 164     return obj->spi->CR1 &= ~(1 << 1);
 165 }
 166
 167 static inline int ssp_enable(spi_t *obj) {
 168     return obj->spi->CR1 |= (1 << 1);
 169 }
 170
 171 static inline int ssp_readable(spi_t *obj) {
 172     return obj->spi->SR & (1 << 2);
 173 }
 174
 175 static inline int ssp_writeable(spi_t *obj) {
 176     return obj->spi->SR & (1 << 1);
 177 }
 178
 179 static inline void ssp_write(spi_t *obj, int value) {
 180     while (!ssp_writeable(obj));
 181     obj->spi->DR = value;
 182 }
 183
 184 static inline int ssp_read(spi_t *obj) {
 185     while (!ssp_readable(obj));
 186     return obj->spi->DR;
 187 }
 188
 189 static inline int ssp_busy(spi_t *obj) {
 190     return (obj->spi->SR & (1 << 4)) ? (1) : (0);
 191 }
 192
 193 int spi_master_write(spi_t *obj, int value) {
 194     ssp_write(obj, value);
 195     return ssp_read(obj);
 196 }
 197
 198 int spi_slave_receive(spi_t *obj) {
 199     return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
 200 }
 201
 202 int spi_slave_read(spi_t *obj) {
 203     return obj->spi->DR;
 204 }
 205
 206 void spi_slave_write(spi_t *obj, int value) {
 207     while (ssp_writeable(obj) == 0) ;
 208     obj->spi->DR = value;
 209 }
 210
 211 int spi_busy(spi_t *obj) {
 212     return ssp_busy(obj);
 213 }