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1 /* mbed Microcontroller Library
2 *******************************************************************************
3 * Copyright (c) 2014, STMicroelectronics
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice,
10 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *******************************************************************************
29 */
30 #include <stddef.h>
31 #include "cmsis.h"
32 #include "gpio_irq_api.h"
33 #include "pinmap.h"
34 #include "mbed_error.h"
35
36 #define EDGE_NONE (0)
37 #define EDGE_RISE (1)
38 #define EDGE_FALL (2)
39 #define EDGE_BOTH (3)
40
41 // Number of EXTI irq vectors (EXTI0_1, EXTI2_3, EXTI4_15)
42 #define CHANNEL_NUM (3)
43
44 // Max pins for one line (max with EXTI4_15)
45 #define MAX_PIN_LINE (12)
46
47 typedef struct gpio_channel {
48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
52 } gpio_channel_t;
53
54 static gpio_channel_t channels[CHANNEL_NUM] = {
55 {.pin_mask = 0},
56 {.pin_mask = 0},
57 {.pin_mask = 0}
58 };
59
60 // Used to return the index for channels array.
61 static uint32_t pin_base_nr[16] = {
62 // EXTI0_1
63 0, // pin 0
64 1, // pin 1
65 // EXTI2_3
66 0, // pin 2
67 1, // pin 3
68 // EXTI4_15
69 0, // pin 4
70 1, // pin 5
71 2, // pin 6
72 3, // pin 7
73 4, // pin 8
74 5, // pin 9
75 6, // pin 10
76 7, // pin 11
77 8, // pin 12
78 9, // pin 13
79 10, // pin 14
80 11 // pin 15
81 };
82
83 static gpio_irq_handler irq_handler;
84
85 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
86 {
87 gpio_channel_t *gpio_channel = &channels[irq_index];
88 uint32_t gpio_idx;
89
90 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
91 uint32_t current_mask = (1 << gpio_idx);
92
93 if (gpio_channel->pin_mask & current_mask) {
94 // Retrieve the gpio and pin that generate the irq
95 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
96 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
97
98 // Clear interrupt flag
99 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
100 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
101
102 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
103
104 // Check which edge has generated the irq
105 if ((gpio->IDR & pin) == 0) {
106 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
107 } else {
108 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
109 }
110 }
111 }
112 }
113 }
114
115 // EXTI lines 0 to 1
116 static void gpio_irq0(void)
117 {
118 handle_interrupt_in(0, 2);
119 }
120
121 // EXTI lines 2 to 3
122 static void gpio_irq1(void)
123 {
124 handle_interrupt_in(1, 2);
125 }
126
127 // EXTI lines 4 to 15
128 static void gpio_irq2(void)
129 {
130 handle_interrupt_in(2, 12);
131 }
132
133 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
134
135 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
136 {
137 IRQn_Type irq_n = (IRQn_Type)0;
138 uint32_t vector = 0;
139 uint32_t irq_index;
140 gpio_channel_t *gpio_channel;
141 uint32_t gpio_idx;
142
143 if (pin == NC) return -1;
144
145 uint32_t port_index = STM_PORT(pin);
146 uint32_t pin_index = STM_PIN(pin);
147
148 // Select irq number and interrupt routine
149 if ((pin_index == 0) || (pin_index == 1)) {
150 irq_n = EXTI0_1_IRQn;
151 vector = (uint32_t)&gpio_irq0;
152 irq_index = 0;
153 } else if ((pin_index == 2) || (pin_index == 3)) {
154 irq_n = EXTI2_3_IRQn;
155 vector = (uint32_t)&gpio_irq1;
156 irq_index = 1;
157 } else if ((pin_index > 3) && (pin_index < 16)) {
158 irq_n = EXTI4_15_IRQn;
159 vector = (uint32_t)&gpio_irq2;
160 irq_index = 2;
161 } else {
162 error("InterruptIn error: pin not supported.\n");
163 return -1;
164 }
165
166 // Enable GPIO clock
167 uint32_t gpio_add = Set_GPIO_Clock(port_index);
168
169 // Configure GPIO
170 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
171
172 // Enable EXTI interrupt
173 NVIC_SetVector(irq_n, vector);
174 NVIC_EnableIRQ(irq_n);
175
176 // Save informations for future use
177 obj->irq_n = irq_n;
178 obj->irq_index = irq_index;
179 obj->event = EDGE_NONE;
180 obj->pin = pin;
181
182 gpio_channel = &channels[irq_index];
183 gpio_idx = pin_base_nr[pin_index];
184 gpio_channel->pin_mask |= (1 << gpio_idx);
185 gpio_channel->channel_ids[gpio_idx] = id;
186 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
187 gpio_channel->channel_pin[gpio_idx] = pin_index;
188
189 irq_handler = handler;
190
191 return 0;
192 }
193
194 void gpio_irq_free(gpio_irq_t *obj)
195 {
196 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
197 uint32_t pin_index = STM_PIN(obj->pin);
198 uint32_t gpio_idx = pin_base_nr[pin_index];
199
200 gpio_channel->pin_mask &= ~(1 << gpio_idx);
201 gpio_channel->channel_ids[gpio_idx] = 0;
202 gpio_channel->channel_gpio[gpio_idx] = 0;
203 gpio_channel->channel_pin[gpio_idx] = 0;
204
205 // Disable EXTI line
206 pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
207 obj->event = EDGE_NONE;
208 }
209
210 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
211 {
212 uint32_t mode = STM_MODE_IT_EVT_RESET;
213 uint32_t pull = GPIO_NOPULL;
214
215 if (enable) {
216 if (event == IRQ_RISE) {
217 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
218 mode = STM_MODE_IT_RISING_FALLING;
219 obj->event = EDGE_BOTH;
220 } else { // NONE or RISE
221 mode = STM_MODE_IT_RISING;
222 obj->event = EDGE_RISE;
223 }
224 }
225 if (event == IRQ_FALL) {
226 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
227 mode = STM_MODE_IT_RISING_FALLING;
228 obj->event = EDGE_BOTH;
229 } else { // NONE or FALL
230 mode = STM_MODE_IT_FALLING;
231 obj->event = EDGE_FALL;
232 }
233 }
234 } else { // Disable
235 if (event == IRQ_RISE) {
236 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
237 mode = STM_MODE_IT_FALLING;
238 obj->event = EDGE_FALL;
239 } else { // NONE or RISE
240 mode = STM_MODE_IT_EVT_RESET;
241 obj->event = EDGE_NONE;
242 }
243 }
244 if (event == IRQ_FALL) {
245 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
246 mode = STM_MODE_IT_RISING;
247 obj->event = EDGE_RISE;
248 } else { // NONE or FALL
249 mode = STM_MODE_IT_EVT_RESET;
250 obj->event = EDGE_NONE;
251 }
252 }
253 }
254
255 pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0));
256 }
257
258 void gpio_irq_enable(gpio_irq_t *obj)
259 {
260 NVIC_EnableIRQ(obj->irq_n);
261 }
262
263 void gpio_irq_disable(gpio_irq_t *obj)
264 {
265 NVIC_DisableIRQ(obj->irq_n);
266 obj->event = EDGE_NONE;
267 }
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