tmk_core/tool/mbed/mbed-sdk/libraries/rtos/rtx/TARGET_CORTEX_A/HAL_CA.c

   1 /*----------------------------------------------------------------------------
   2  *      RL-ARM - RTX
   3  *----------------------------------------------------------------------------
   4  *      Name:    HAL_CA.C
   5  *      Purpose: Hardware Abstraction Layer for Cortex-A
   6  *      Rev.:
   7  *----------------------------------------------------------------------------
   8  *
   9  * Copyright (c) 2012 ARM Limited
  10  * All rights reserved.
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions are met:
  13  *  - Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  *  - Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *  - Neither the name of ARM  nor the names of its contributors may be used
  19  *    to endorse or promote products derived from this software without
  20  *    specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
  26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  32  * POSSIBILITY OF SUCH DAMAGE.
  33  *---------------------------------------------------------------------------*/
  34
  35 #include "rt_TypeDef.h"
  36 #include "RTX_Config.h"
  37 #include "rt_HAL_CA.h"
  38
  39 /*--------------------------- os_init_context -------------------------------*/
  40
  41 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
  42   /* Prepare TCB and saved context for a first time start of a task. */
  43   U32 *stk,i,size;
  44
  45   /* Prepare a complete interrupt frame for first task start */
  46   size = p_TCB->priv_stack >> 2;
  47   if (size == 0) {
  48     size = (U16)os_stackinfo >> 2;
  49   }
  50   /* Write to the top of stack. */
  51   stk = &p_TCB->stack[size];
  52
  53   /* Auto correct to 8-byte ARM stack alignment. */
  54   if ((U32)stk & 0x04) {
  55     stk--;
  56   }
  57
  58   stk -= 16;
  59
  60   /* Initial PC and default CPSR */
  61   stk[14] = (U32)task_body;
  62   /* Task run mode is inherited from the startup file. */
  63   /*  (non-privileged USER or privileged SYSTEM mode)  */
  64   stk[15] = (os_flags & 1) ? INIT_CPSR_SYS : INIT_CPSR_USER;
  65   /* Set T-bit if task function in Thumb mode. */
  66   if ((U32)task_body & 1) {
  67     stk[15] |= CPSR_T_BIT;
  68   }
  69   /* Assign a void pointer to R0. */
  70   stk[8]  = (U32)p_TCB->msg;
  71   /* Clear R1-R12,LR registers. */
  72   for (i = 0; i < 8; i++) {
  73     stk[i] = 0;
  74   }
  75   for (i = 9; i < 14; i++) {
  76     stk[i] = 0;
  77   }
  78
  79   /* Initial Task stack pointer. */
  80   p_TCB->tsk_stack = (U32)stk;
  81
  82   /* Task entry point. */
  83   p_TCB->ptask = task_body;
  84
  85   /* Set a magic word for checking of stack overflow. */
  86   p_TCB->stack[0] = MAGIC_WORD;
  87 }
  88
  89
  90 /*--------------------------- rt_ret_val ----------------------------------*/
  91
  92 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
  93   /* Get pointer to task return value registers (R0..R3) in Stack */
  94 #if (__TARGET_FPU_VFP)
  95   if (p_TCB->stack_frame & 0x2) {
  96     /* Extended Stack Frame: S0-31,FPSCR,Reserved,R4-R11,R0-R3,R12,LR,PC,xPSR */
  97     return (U32 *)(p_TCB->tsk_stack + 8*4 + 34*4);
  98   } else {
  99     /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
 100     return (U32 *)(p_TCB->tsk_stack + 8*4);
 101   }
 102 #else
 103   /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
 104   return (U32 *)(p_TCB->tsk_stack + 8*4);
 105 #endif
 106 }
 107
 108 void rt_ret_val (P_TCB p_TCB, U32 v0) {
 109   U32 *ret;
 110
 111   ret = rt_ret_regs(p_TCB);
 112   ret[0] = v0;
 113 }
 114
 115 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
 116   U32 *ret;
 117
 118   ret = rt_ret_regs(p_TCB);
 119   ret[0] = v0;
 120   ret[1] = v1;
 121 }
 122
 123
 124 /*----------------------------------------------------------------------------
 125  * end of file
 126  *---------------------------------------------------------------------------*/