1 /* File: startup_ARMCM3.s
2 * Purpose: startup file for Cortex-M3/M4 devices. Should use with
3 * GNU Tools for ARM Embedded Processors
7 * Copyright (C) 2011 ARM Limited. All rights reserved.
8 * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
9 * processor based microcontrollers. This file can be freely distributed
10 * within development tools that are supporting such ARM based processors.
12 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
13 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
15 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
16 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 The HEAP starts at the end of the DATA section and grows upward.
24 The STACK starts at the end of the RAM and grows downward.
26 The HEAP and stack STACK are only checked at compile time:
27 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
29 This is just a check for the bare minimum for the Heap+Stack area before
30 aborting compilation, it is not the run time limit:
31 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
36 .equ Stack_Size, __STACK_SIZE
38 .equ Stack_Size, 0xc00
44 .size __StackLimit, . - __StackLimit
46 .size __StackTop, . - __StackTop
51 .equ Heap_Size, __HEAP_SIZE
59 .size __HeapBase, . - __HeapBase
61 .size __HeapLimit, . - __HeapLimit
67 .long __StackTop /* Top of Stack */
68 .long Reset_Handler /* Reset Handler */
69 .long NMI_Handler /* NMI Handler */
70 .long HardFault_Handler /* Hard Fault Handler */
71 .long MemManage_Handler /* MPU Fault Handler */
72 .long BusFault_Handler /* Bus Fault Handler */
73 .long UsageFault_Handler /* Usage Fault Handler */
74 .long 0 /* Reserved */
75 .long 0 /* Reserved */
76 .long 0 /* Reserved */
77 .long 0 /* Reserved */
78 .long SVC_Handler /* SVCall Handler */
79 .long DebugMon_Handler /* Debug Monitor Handler */
80 .long 0 /* Reserved */
81 .long PendSV_Handler /* PendSV Handler */
82 .long SysTick_Handler /* SysTick Handler */
84 /* External interrupts */
85 .long WDT_IRQHandler /* 16: Watchdog Timer */
86 .long TIMER0_IRQHandler /* 17: Timer0 */
87 .long TIMER1_IRQHandler /* 18: Timer1 */
88 .long TIMER2_IRQHandler /* 19: Timer2 */
89 .long TIMER3_IRQHandler /* 20: Timer3 */
90 .long UART0_IRQHandler /* 21: UART0 */
91 .long UART1_IRQHandler /* 22: UART1 */
92 .long UART2_IRQHandler /* 23: UART2 */
93 .long UART3_IRQHandler /* 24: UART3 */
94 .long PWM1_IRQHandler /* 25: PWM1 */
95 .long I2C0_IRQHandler /* 26: I2C0 */
96 .long I2C1_IRQHandler /* 27: I2C1 */
97 .long I2C2_IRQHandler /* 28: I2C2 */
98 .long SPI_IRQHandler /* 29: SPI */
99 .long SSP0_IRQHandler /* 30: SSP0 */
100 .long SSP1_IRQHandler /* 31: SSP1 */
101 .long PLL0_IRQHandler /* 32: PLL0 Lock (Main PLL) */
102 .long RTC_IRQHandler /* 33: Real Time Clock */
103 .long EINT0_IRQHandler /* 34: External Interrupt 0 */
104 .long EINT1_IRQHandler /* 35: External Interrupt 1 */
105 .long EINT2_IRQHandler /* 36: External Interrupt 2 */
106 .long EINT3_IRQHandler /* 37: External Interrupt 3 */
107 .long ADC_IRQHandler /* 38: A/D Converter */
108 .long BOD_IRQHandler /* 39: Brown-Out Detect */
109 .long USB_IRQHandler /* 40: USB */
110 .long CAN_IRQHandler /* 41: CAN */
111 .long DMA_IRQHandler /* 42: General Purpose DMA */
112 .long I2S_IRQHandler /* 43: I2S */
113 .long ENET_IRQHandler /* 44: Ethernet */
114 .long RIT_IRQHandler /* 45: Repetitive Interrupt Timer */
115 .long MCPWM_IRQHandler /* 46: Motor Control PWM */
116 .long QEI_IRQHandler /* 47: Quadrature Encoder Interface */
117 .long PLL1_IRQHandler /* 48: PLL1 Lock (USB PLL) */
118 .long USBActivity_IRQHandler /* 49: USB Activity */
119 .long CANActivity_IRQHandler /* 50: CAN Activity */
121 .size __isr_vector, . - __isr_vector
128 .type Reset_Handler, %function
130 /* Loop to copy data from read only memory to RAM. The ranges
131 * of copy from/to are specified by following symbols evaluated in
133 * _etext: End of code section, i.e., begin of data sections to copy from.
134 * __data_start__/__data_end__: RAM address range that data should be
135 * copied to. Both must be aligned to 4 bytes boundary. */
138 ldr r2, =__data_start__
139 ldr r3, =__data_end__
146 blt .Lflash_to_ram_loop
153 .size Reset_Handler, . - Reset_Handler
156 /* Macro to define default handlers. Default handler
157 * will be weak symbol and just dead loops. They can be
158 * overwritten by other handlers */
159 .macro def_default_handler handler_name
163 .type \handler_name, %function
166 .size \handler_name, . - \handler_name
169 def_default_handler NMI_Handler
170 def_default_handler HardFault_Handler
171 def_default_handler MemManage_Handler
172 def_default_handler BusFault_Handler
173 def_default_handler UsageFault_Handler
174 def_default_handler SVC_Handler
175 def_default_handler DebugMon_Handler
176 def_default_handler PendSV_Handler
177 def_default_handler SysTick_Handler
178 def_default_handler Default_Handler
180 .macro def_irq_default_handler handler_name
182 .set \handler_name, Default_Handler
185 def_irq_default_handler WDT_IRQHandler
186 def_irq_default_handler TIMER0_IRQHandler
187 def_irq_default_handler TIMER1_IRQHandler
188 def_irq_default_handler TIMER2_IRQHandler
189 def_irq_default_handler TIMER3_IRQHandler
190 def_irq_default_handler UART0_IRQHandler
191 def_irq_default_handler UART1_IRQHandler
192 def_irq_default_handler UART2_IRQHandler
193 def_irq_default_handler UART3_IRQHandler
194 def_irq_default_handler PWM1_IRQHandler
195 def_irq_default_handler I2C0_IRQHandler
196 def_irq_default_handler I2C1_IRQHandler
197 def_irq_default_handler I2C2_IRQHandler
198 def_irq_default_handler SPI_IRQHandler
199 def_irq_default_handler SSP0_IRQHandler
200 def_irq_default_handler SSP1_IRQHandler
201 def_irq_default_handler PLL0_IRQHandler
202 def_irq_default_handler RTC_IRQHandler
203 def_irq_default_handler EINT0_IRQHandler
204 def_irq_default_handler EINT1_IRQHandler
205 def_irq_default_handler EINT2_IRQHandler
206 def_irq_default_handler EINT3_IRQHandler
207 def_irq_default_handler ADC_IRQHandler
208 def_irq_default_handler BOD_IRQHandler
209 def_irq_default_handler USB_IRQHandler
210 def_irq_default_handler CAN_IRQHandler
211 def_irq_default_handler DMA_IRQHandler
212 def_irq_default_handler I2S_IRQHandler
213 def_irq_default_handler ENET_IRQHandler
214 def_irq_default_handler RIT_IRQHandler
215 def_irq_default_handler MCPWM_IRQHandler
216 def_irq_default_handler QEI_IRQHandler
217 def_irq_default_handler PLL1_IRQHandler
218 def_irq_default_handler USBActivity_IRQHandler
219 def_irq_default_handler CANActivity_IRQHandler
220 def_irq_default_handler DEF_IRQHandler