tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2c.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f0xx_hal_i2c.h
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    11-December-2014
   7   * @brief   Header file of I2C HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F0xx_HAL_I2C_H
  40 #define __STM32F0xx_HAL_I2C_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f0xx_hal_def.h"
  48
  49 /** @addtogroup STM32F0xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup I2C
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup I2C_Exported_Types I2C Exported Types
  59   * @{
  60   */
  61
  62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
  63   * @brief  I2C Configuration Structure definition
  64   * @{
  65   */
  66 typedef struct
  67 {
  68   uint32_t Timing;              /*!< Specifies the I2C_TIMINGR_register value.
  69                                   This parameter calculated by referring to I2C initialization
  70                                          section in Reference manual */
  71
  72   uint32_t OwnAddress1;         /*!< Specifies the first device own address.
  73                                   This parameter can be a 7-bit or 10-bit address. */
  74
  75   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
  76                                   This parameter can be a value of @ref I2C_addressing_mode */
  77
  78   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.
  79                                   This parameter can be a value of @ref I2C_dual_addressing_mode */
  80
  81   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected
  82                                   This parameter can be a 7-bit address. */
  83
  84   uint32_t OwnAddress2Masks;    /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
  85                                   This parameter can be a value of @ref I2C_own_address2_masks. */
  86
  87   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.
  88                                   This parameter can be a value of @ref I2C_general_call_addressing_mode. */
  89
  90   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.
  91                                   This parameter can be a value of @ref I2C_nostretch_mode */
  92
  93 }I2C_InitTypeDef;
  94
  95 /**
  96   * @}
  97   */
  98
  99 /** @defgroup HAL_state_structure_definition HAL state structure definition
 100   * @brief  HAL State structure definition
 101   * @{
 102   */
 103
 104 typedef enum
 105 {
 106   HAL_I2C_STATE_RESET           = 0x00,  /*!< I2C not yet initialized or disabled         */
 107   HAL_I2C_STATE_READY           = 0x01,  /*!< I2C initialized and ready for use           */
 108   HAL_I2C_STATE_BUSY            = 0x02,  /*!< I2C internal process is ongoing             */
 109   HAL_I2C_STATE_MASTER_BUSY_TX  = 0x12,  /*!< Master Data Transmission process is ongoing */
 110   HAL_I2C_STATE_MASTER_BUSY_RX  = 0x22,  /*!< Master Data Reception process is ongoing    */
 111   HAL_I2C_STATE_SLAVE_BUSY_TX   = 0x32,  /*!< Slave Data Transmission process is ongoing  */
 112   HAL_I2C_STATE_SLAVE_BUSY_RX   = 0x42,  /*!< Slave Data Reception process is ongoing     */
 113   HAL_I2C_STATE_MEM_BUSY_TX     = 0x52,  /*!< Memory Data Transmission process is ongoing */
 114   HAL_I2C_STATE_MEM_BUSY_RX     = 0x62,  /*!< Memory Data Reception process is ongoing    */
 115   HAL_I2C_STATE_TIMEOUT         = 0x03,  /*!< Timeout state                               */
 116   HAL_I2C_STATE_ERROR           = 0x04   /*!< Reception process is ongoing                */
 117
 118 }HAL_I2C_StateTypeDef;
 119
 120 /**
 121   * @}
 122   */
 123
 124 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
 125   * @brief  I2C handle Structure definition
 126   * @{
 127   */
 128
 129 typedef struct
 130 {
 131   I2C_TypeDef                *Instance;  /*!< I2C registers base address     */
 132
 133   I2C_InitTypeDef            Init;       /*!< I2C communication parameters   */
 134
 135   uint8_t                    *pBuffPtr;  /*!< Pointer to I2C transfer buffer */
 136
 137   uint16_t                   XferSize;   /*!< I2C transfer size              */
 138
 139   __IO uint16_t              XferCount;  /*!< I2C transfer counter           */
 140
 141   DMA_HandleTypeDef          *hdmatx;    /*!< I2C Tx DMA handle parameters   */
 142
 143   DMA_HandleTypeDef          *hdmarx;    /*!< I2C Rx DMA handle parameters   */
 144
 145   HAL_LockTypeDef            Lock;       /*!< I2C locking object             */
 146
 147   __IO HAL_I2C_StateTypeDef  State;      /*!< I2C communication state        */
 148
 149   __IO uint32_t              ErrorCode;  /*!< I2C Error code
 150                                               This parameter can be a value of @ref I2C_Error   */
 151
 152 }I2C_HandleTypeDef;
 153 /**
 154   * @}
 155   */
 156
 157 /**
 158   * @}
 159   */
 160 /* Exported constants --------------------------------------------------------*/
 161
 162 /** @defgroup I2C_Exported_Constants I2C Exported Constants
 163   * @{
 164   */
 165
 166 /** @defgroup I2C_Error I2C Error
 167   * @brief  I2C Error
 168   * @{
 169   */
 170
 171 #define HAL_I2C_ERROR_NONE      ((uint32_t)0x00000000)    /*!< No error              */
 172 #define HAL_I2C_ERROR_BERR      ((uint32_t)0x00000001)    /*!< BERR error            */
 173 #define HAL_I2C_ERROR_ARLO      ((uint32_t)0x00000002)    /*!< ARLO error            */
 174 #define HAL_I2C_ERROR_AF        ((uint32_t)0x00000004)    /*!< AF error              */
 175 #define HAL_I2C_ERROR_OVR       ((uint32_t)0x00000008)    /*!< OVR error             */
 176 #define HAL_I2C_ERROR_DMA       ((uint32_t)0x00000010)    /*!< DMA transfer error    */
 177 #define HAL_I2C_ERROR_TIMEOUT   ((uint32_t)0x00000020)    /*!< Timeout error         */
 178 #define HAL_I2C_ERROR_SIZE      ((uint32_t)0x00000040)    /*!< Size Management error */
 179
 180 /**
 181   * @}
 182   */
 183
 184
 185 /** @defgroup I2C_addressing_mode I2C addressing mode
 186   * @{
 187   */
 188 #define I2C_ADDRESSINGMODE_7BIT          ((uint32_t)0x00000001)
 189 #define I2C_ADDRESSINGMODE_10BIT         ((uint32_t)0x00000002)
 190
 191 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT)                                        || \
 192                                          ((MODE) == I2C_ADDRESSINGMODE_10BIT))
 193 /**
 194   * @}
 195   */
 196
 197 /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
 198   * @{
 199   */
 200
 201 #define I2C_DUALADDRESS_DISABLED        ((uint32_t)0x00000000)
 202 #define I2C_DUALADDRESS_ENABLED         I2C_OAR2_OA2EN
 203
 204 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) || \
 205                                       ((ADDRESS) == I2C_DUALADDRESS_ENABLED))
 206 /**
 207   * @}
 208   */
 209
 210 /** @defgroup I2C_own_address2_masks I2C own address2 masks
 211   * @{
 212   */
 213
 214 #define I2C_OA2_NOMASK                  ((uint8_t)0x00)
 215 #define I2C_OA2_MASK01                  ((uint8_t)0x01)
 216 #define I2C_OA2_MASK02                  ((uint8_t)0x02)
 217 #define I2C_OA2_MASK03                  ((uint8_t)0x03)
 218 #define I2C_OA2_MASK04                  ((uint8_t)0x04)
 219 #define I2C_OA2_MASK05                  ((uint8_t)0x05)
 220 #define I2C_OA2_MASK06                  ((uint8_t)0x06)
 221 #define I2C_OA2_MASK07                  ((uint8_t)0x07)
 222
 223 #define IS_I2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == I2C_OA2_NOMASK) || \
 224                                          ((MASK) == I2C_OA2_MASK01) || \
 225                                          ((MASK) == I2C_OA2_MASK02) || \
 226                                          ((MASK) == I2C_OA2_MASK03) || \
 227                                          ((MASK) == I2C_OA2_MASK04) || \
 228                                          ((MASK) == I2C_OA2_MASK05) || \
 229                                          ((MASK) == I2C_OA2_MASK06) || \
 230                                          ((MASK) == I2C_OA2_MASK07))
 231 /**
 232   * @}
 233   */
 234
 235 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
 236   * @{
 237   */
 238 #define I2C_GENERALCALL_DISABLED        ((uint32_t)0x00000000)
 239 #define I2C_GENERALCALL_ENABLED         I2C_CR1_GCEN
 240
 241 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) || \
 242                                    ((CALL) == I2C_GENERALCALL_ENABLED))
 243 /**
 244   * @}
 245   */
 246
 247 /** @defgroup I2C_nostretch_mode I2C nostretch mode
 248   * @{
 249   */
 250 #define I2C_NOSTRETCH_DISABLED          ((uint32_t)0x00000000)
 251 #define I2C_NOSTRETCH_ENABLED           I2C_CR1_NOSTRETCH
 252
 253 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) || \
 254                                     ((STRETCH) == I2C_NOSTRETCH_ENABLED))
 255 /**
 256   * @}
 257   */
 258
 259 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
 260   * @{
 261   */
 262 #define I2C_MEMADD_SIZE_8BIT            ((uint32_t)0x00000001)
 263 #define I2C_MEMADD_SIZE_16BIT           ((uint32_t)0x00000002)
 264
 265 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
 266                                   ((SIZE) == I2C_MEMADD_SIZE_16BIT))
 267 /**
 268   * @}
 269   */
 270
 271 /** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition
 272   * @{
 273   */
 274
 275 #define  I2C_RELOAD_MODE                I2C_CR2_RELOAD
 276 #define  I2C_AUTOEND_MODE               I2C_CR2_AUTOEND
 277 #define  I2C_SOFTEND_MODE               ((uint32_t)0x00000000)
 278
 279 #define IS_TRANSFER_MODE(MODE)        (((MODE) == I2C_RELOAD_MODE)  || \
 280                                        ((MODE) == I2C_AUTOEND_MODE) || \
 281                                        ((MODE) == I2C_SOFTEND_MODE))
 282 /**
 283   * @}
 284   */
 285
 286 /** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition
 287   * @{
 288   */
 289
 290 #define  I2C_NO_STARTSTOP                 ((uint32_t)0x00000000)
 291 #define  I2C_GENERATE_STOP                I2C_CR2_STOP
 292 #define  I2C_GENERATE_START_READ          (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
 293 #define  I2C_GENERATE_START_WRITE         I2C_CR2_START
 294
 295 #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == I2C_GENERATE_STOP)        || \
 296                                          ((REQUEST) == I2C_GENERATE_START_READ)  || \
 297                                          ((REQUEST) == I2C_GENERATE_START_WRITE) || \
 298                                          ((REQUEST) == I2C_NO_STARTSTOP))
 299
 300 /**
 301   * @}
 302   */
 303
 304 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
 305   * @brief I2C Interrupt definition
 306   *        Elements values convention: 0xXXXXXXXX
 307   *           - XXXXXXXX  : Interrupt control mask
 308   * @{
 309   */
 310 #define I2C_IT_ERRI                       I2C_CR1_ERRIE
 311 #define I2C_IT_TCI                        I2C_CR1_TCIE
 312 #define I2C_IT_STOPI                      I2C_CR1_STOPIE
 313 #define I2C_IT_NACKI                      I2C_CR1_NACKIE
 314 #define I2C_IT_ADDRI                      I2C_CR1_ADDRIE
 315 #define I2C_IT_RXI                        I2C_CR1_RXIE
 316 #define I2C_IT_TXI                        I2C_CR1_TXIE
 317
 318 /**
 319   * @}
 320   */
 321
 322
 323 /** @defgroup I2C_Flag_definition I2C Flag definition
 324   * @{
 325   */
 326
 327 #define I2C_FLAG_TXE                      I2C_ISR_TXE
 328 #define I2C_FLAG_TXIS                     I2C_ISR_TXIS
 329 #define I2C_FLAG_RXNE                     I2C_ISR_RXNE
 330 #define I2C_FLAG_ADDR                     I2C_ISR_ADDR
 331 #define I2C_FLAG_AF                       I2C_ISR_NACKF
 332 #define I2C_FLAG_STOPF                    I2C_ISR_STOPF
 333 #define I2C_FLAG_TC                       I2C_ISR_TC
 334 #define I2C_FLAG_TCR                      I2C_ISR_TCR
 335 #define I2C_FLAG_BERR                     I2C_ISR_BERR
 336 #define I2C_FLAG_ARLO                     I2C_ISR_ARLO
 337 #define I2C_FLAG_OVR                      I2C_ISR_OVR
 338 #define I2C_FLAG_PECERR                   I2C_ISR_PECERR
 339 #define I2C_FLAG_TIMEOUT                  I2C_ISR_TIMEOUT
 340 #define I2C_FLAG_ALERT                    I2C_ISR_ALERT
 341 #define I2C_FLAG_BUSY                     I2C_ISR_BUSY
 342 #define I2C_FLAG_DIR                      I2C_ISR_DIR
 343 /**
 344   * @}
 345   */
 346
 347 /**
 348   * @}
 349   */
 350
 351 /* Exported macros -----------------------------------------------------------*/
 352
 353 /** @defgroup I2C_Exported_Macros I2C Exported Macros
 354   * @{
 355   */
 356
 357 /** @brief  Reset I2C handle state
 358   * @param  __HANDLE__: I2C handle.
 359   * @retval None
 360   */
 361 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
 362
 363 /** @brief  Enables or disables the specified I2C interrupts.
 364   * @param  __HANDLE__: specifies the I2C Handle.
 365   *         This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
 366   * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
 367   *         This parameter can be one of the following values:
 368   *            @arg I2C_IT_ERRI: Errors interrupt enable
 369   *            @arg I2C_IT_TCI: Transfer complete interrupt enable
 370   *            @arg I2C_IT_STOPI: STOP detection interrupt enable
 371   *            @arg I2C_IT_NACKI: NACK received interrupt enable
 372   *            @arg I2C_IT_ADDRI: Address match interrupt enable
 373   *            @arg I2C_IT_RXI: RX interrupt enable
 374   *            @arg I2C_IT_TXI: TX interrupt enable
 375   *
 376   * @retval None
 377   */
 378
 379 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
 380 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
 381
 382 /** @brief  Checks if the specified I2C interrupt source is enabled or disabled.
 383   * @param  __HANDLE__: specifies the I2C Handle.
 384   *         This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
 385   * @param  __INTERRUPT__: specifies the I2C interrupt source to check.
 386   *         This parameter can be one of the following values:
 387   *            @arg I2C_IT_ERRI: Errors interrupt enable
 388   *            @arg I2C_IT_TCI: Transfer complete interrupt enable
 389   *            @arg I2C_IT_STOPI: STOP detection interrupt enable
 390   *            @arg I2C_IT_NACKI: NACK received interrupt enable
 391   *            @arg I2C_IT_ADDRI: Address match interrupt enable
 392   *            @arg I2C_IT_RXI: RX interrupt enable
 393   *            @arg I2C_IT_TXI: TX interrupt enable
 394   *
 395   * @retval The new state of __IT__ (TRUE or FALSE).
 396   */
 397 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 398
 399 /** @brief  Checks whether the specified I2C flag is set or not.
 400   * @param  __HANDLE__: specifies the I2C Handle.
 401   *         This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
 402   * @param  __FLAG__: specifies the flag to check.
 403   *         This parameter can be one of the following values:
 404   *            @arg I2C_FLAG_TXE: Transmit data register empty
 405   *            @arg I2C_FLAG_TXIS: Transmit interrupt status
 406   *            @arg I2C_FLAG_RXNE: Receive data register not empty
 407   *            @arg I2C_FLAG_ADDR: Address matched (slave mode)
 408   *            @arg I2C_FLAG_AF: Acknowledge failure received flag
 409   *            @arg I2C_FLAG_STOPF: STOP detection flag
 410   *            @arg I2C_FLAG_TC: Transfer complete (master mode)
 411   *            @arg I2C_FLAG_TCR: Transfer complete reload
 412   *            @arg I2C_FLAG_BERR: Bus error
 413   *            @arg I2C_FLAG_ARLO: Arbitration lost
 414   *            @arg I2C_FLAG_OVR: Overrun/Underrun
 415   *            @arg I2C_FLAG_PECERR: PEC error in reception
 416   *            @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
 417   *            @arg I2C_FLAG_ALERT: SMBus alert
 418   *            @arg I2C_FLAG_BUSY: Bus busy
 419   *            @arg I2C_FLAG_DIR: Transfer direction (slave mode)
 420   *
 421   * @retval The new state of __FLAG__ (TRUE or FALSE).
 422   */
 423 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
 424
 425 /** @brief  Clears the I2C pending flags which are cleared by writing 1 in a specific bit.
 426   * @param  __HANDLE__: specifies the I2C Handle.
 427   *         This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
 428   * @param  __FLAG__: specifies the flag to clear.
 429   *         This parameter can be any combination of the following values:
 430   *            @arg I2C_FLAG_ADDR: Address matched (slave mode)
 431   *            @arg I2C_FLAG_AF: Acknowledge failure flag
 432   *            @arg I2C_FLAG_STOPF: STOP detection flag
 433   *            @arg I2C_FLAG_BERR: Bus error
 434   *            @arg I2C_FLAG_ARLO: Arbitration lost
 435   *            @arg I2C_FLAG_OVR: Overrun/Underrun
 436   *            @arg I2C_FLAG_PECERR: PEC error in reception
 437   *            @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
 438   *            @arg I2C_FLAG_ALERT: SMBus alert
 439   *
 440   * @retval None
 441   */
 442 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
 443
 444
 445 #define __HAL_I2C_ENABLE(__HANDLE__)                            ((__HANDLE__)->Instance->CR1 |=  I2C_CR1_PE)
 446 #define __HAL_I2C_DISABLE(__HANDLE__)                           ((__HANDLE__)->Instance->CR1 &=  ~I2C_CR1_PE)
 447
 448 #define __HAL_I2C_RESET_CR2(__HANDLE__)                         ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
 449
 450 #define __HAL_I2C_MEM_ADD_MSB(__ADDRESS__)                       ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
 451 #define __HAL_I2C_MEM_ADD_LSB(__ADDRESS__)                       ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
 452
 453 #define __HAL_I2C_GENERATE_START(__ADDMODE__,__ADDRESS__)       (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
 454                                                                   (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
 455
 456 #define IS_I2C_OWN_ADDRESS1(ADDRESS1)   ((ADDRESS1) <= (uint32_t)0x000003FF)
 457 #define IS_I2C_OWN_ADDRESS2(ADDRESS2)   ((ADDRESS2) <= (uint16_t)0x00FF)
 458 /**
 459   * @}
 460   */
 461
 462 /* Include I2C HAL Extended module */
 463 #include "stm32f0xx_hal_i2c_ex.h"
 464
 465 /* Exported functions --------------------------------------------------------*/
 466 /** @addtogroup I2C_Exported_Functions
 467   * @{
 468   */
 469
 470 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
 471   * @{
 472   */
 473
 474 /* Initialization/de-initialization functions  **********************************/
 475 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
 476 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
 477 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
 478 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
 479
 480 /**
 481   * @}
 482   */
 483
 484 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
 485   * @{
 486   */
 487
 488 /* IO operation functions  *****************************************************/
 489
 490  /******* Blocking mode: Polling */
 491 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 492 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 493 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 494 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 495 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 496 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 497 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
 498
 499  /******* Non-Blocking mode: Interrupt */
 500 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 501 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 502 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 503 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 504 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 505 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 506
 507  /******* Non-Blocking mode: DMA */
 508 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 509 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 510 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 511 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 512 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 513 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 514
 515  /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
 516 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
 517 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
 518 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
 519 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
 520 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
 521 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
 522 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
 523 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
 524 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
 525
 526 /**
 527   * @}
 528   */
 529
 530 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
 531   * @{
 532   */
 533
 534 /* Peripheral State and Errors functions  **************************************/
 535 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
 536 uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
 537
 538 /**
 539   * @}
 540   */
 541
 542 /**
 543   * @}
 544   */
 545
 546 /**
 547   * @}
 548   */
 549
 550 /**
 551   * @}
 552   */
 553
 554 #ifdef __cplusplus
 555 }
 556 #endif
 557
 558
 559 #endif /* __STM32F0xx_HAL_I2C_H */
 560
 561 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 562