tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/us_ticker.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include <stddef.h>
  17 #include "us_ticker_api.h"
  18 #include "PeripheralNames.h"
  19 #include "clk_freqs.h"
  20
  21 static void pit_init(void);
  22 static void lptmr_init(void);
  23
  24 static int us_ticker_inited = 0;
  25
  26 void us_ticker_init(void) {
  27     if (us_ticker_inited) return;
  28     us_ticker_inited = 1;
  29
  30     pit_init();
  31     lptmr_init();
  32 }
  33
  34 /******************************************************************************
  35  * Timer for us timing.
  36  ******************************************************************************/
  37 static void pit_init(void) {
  38     SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;   // Clock PIT
  39     PIT->MCR = 0;                       // Enable PIT
  40
  41     // Channel 1
  42     PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF;
  43     PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK;    // Chain to timer 0, disable Interrupts
  44     PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;   // Start timer 1
  45
  46     // Use channel 0 as a prescaler for channel 1
  47     PIT->CHANNEL[0].LDVAL = (bus_frequency() + 500000) / 1000000 - 1;
  48     PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TEN_MASK;    // Start timer 0, disable interrupts
  49 }
  50
  51 uint32_t us_ticker_read() {
  52     if (!us_ticker_inited)
  53         us_ticker_init();
  54
  55     // The PIT is a countdown timer
  56     return ~(PIT->CHANNEL[1].CVAL);
  57 }
  58
  59 /******************************************************************************
  60  * Timer Event
  61  *
  62  * It schedules interrupts at given (32bit)us interval of time.
  63  * It is implemented used the 16bit Low Power Timer that remains powered in all
  64  * power modes.
  65  ******************************************************************************/
  66 static void lptmr_isr(void);
  67
  68 static void lptmr_init(void) {
  69         uint32_t extosc;
  70
  71     /* Clock the timer */
  72     SIM->SCGC5 |= SIM_SCGC5_LPTMR_MASK;
  73
  74     /* Reset */
  75     LPTMR0->CSR = 0;
  76
  77 #if defined(TARGET_KL43Z)
  78     /* Set interrupt handler */
  79     NVIC_SetVector(LPTMR0_IRQn, (uint32_t)lptmr_isr);
  80     NVIC_EnableIRQ(LPTMR0_IRQn);
  81
  82
  83     MCG->C1 |= MCG_C1_IRCLKEN_MASK;
  84     extosc = mcgirc_frequency();
  85 #else
  86     /* Set interrupt handler */
  87     NVIC_SetVector(LPTimer_IRQn, (uint32_t)lptmr_isr);
  88     NVIC_EnableIRQ(LPTimer_IRQn);
  89
  90     /* Clock at (1)MHz -> (1)tick/us */
  91     /* Check if the external oscillator can be divided to 1MHz */
  92     extosc = extosc_frequency();
  93 #endif
  94     if (extosc != 0) {                      //If external oscillator found
  95         if (extosc % 1000000u == 0) {       //If it is a multiple if 1MHz
  96             extosc /= 1000000;
  97             if (extosc == 1)    {           //1MHz, set timerprescaler in bypass mode
  98                 LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PBYP_MASK;
  99                 return;
 100             } else {                        //See if we can divide it to 1MHz
 101                 uint32_t divider = 0;
 102                 extosc >>= 1;
 103                 while (1) {
 104                     if (extosc == 1) {
 105                         LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PRESCALE(divider);
 106                         return;
 107                     }
 108                     if (extosc % 2 != 0)    //If we can't divide by two anymore
 109                         break;
 110                     divider++;
 111                     extosc >>= 1;
 112                 }
 113             }
 114         }
 115     }
 116 #if defined(TARGET_KL43Z)
 117     //No suitable actual IRC oscillator clock -> Set it to (8MHz / divider)
 118     MCG->SC &= ~MCG_SC_FCRDIV_MASK;
 119     MCG->MC &= ~MCG->MC & MCG_MC_LIRC_DIV2_MASK;
 120     LPTMR0->PSR = LPTMR_PSR_PCS(0) | LPTMR_PSR_PRESCALE(2);
 121 #else
 122     //No suitable external oscillator clock -> Use fast internal oscillator (4MHz / divider)
 123     MCG->C1 |= MCG_C1_IRCLKEN_MASK;
 124     MCG->C2 |= MCG_C2_IRCS_MASK;
 125     LPTMR0->PSR =  LPTMR_PSR_PCS(0);
 126     switch (MCG->SC & MCG_SC_FCRDIV_MASK) {
 127         case MCG_SC_FCRDIV(0):                  //4MHz
 128             LPTMR0->PSR |= LPTMR_PSR_PRESCALE(1);
 129             break;
 130         case MCG_SC_FCRDIV(1):                  //2MHz
 131             LPTMR0->PSR |= LPTMR_PSR_PRESCALE(0);
 132             break;
 133         default:                                //1MHz or anything else, in which case we put it on 1MHz
 134             MCG->SC &= ~MCG_SC_FCRDIV_MASK;
 135             MCG->SC |= MCG_SC_FCRDIV(2);
 136             LPTMR0->PSR |= LPTMR_PSR_PBYP_MASK;
 137     }
 138 #endif
 139 }
 140
 141 void us_ticker_disable_interrupt(void) {
 142     LPTMR0->CSR &= ~LPTMR_CSR_TIE_MASK;
 143 }
 144
 145 void us_ticker_clear_interrupt(void) {
 146     // we already clear interrupt in lptmr_isr
 147 }
 148
 149 static uint32_t us_ticker_int_counter = 0;
 150 static uint16_t us_ticker_int_remainder = 0;
 151
 152 static void lptmr_set(unsigned short count) {
 153     /* Reset */
 154     LPTMR0->CSR = 0;
 155
 156     /* Set the compare register */
 157     LPTMR0->CMR = count;
 158
 159     /* Enable interrupt */
 160     LPTMR0->CSR |= LPTMR_CSR_TIE_MASK;
 161
 162     /* Start the timer */
 163     LPTMR0->CSR |= LPTMR_CSR_TEN_MASK;
 164 }
 165
 166 static void lptmr_isr(void) {
 167     // write 1 to TCF to clear the LPT timer compare flag
 168     LPTMR0->CSR |= LPTMR_CSR_TCF_MASK;
 169
 170     if (us_ticker_int_counter > 0) {
 171         lptmr_set(0xFFFF);
 172         us_ticker_int_counter--;
 173
 174     } else {
 175         if (us_ticker_int_remainder > 0) {
 176             lptmr_set(us_ticker_int_remainder);
 177             us_ticker_int_remainder = 0;
 178
 179         } else {
 180             // This function is going to disable the interrupts if there are
 181             // no other events in the queue
 182             us_ticker_irq_handler();
 183         }
 184     }
 185 }
 186
 187 void us_ticker_set_interrupt(timestamp_t timestamp) {
 188     int delta = (int)((uint32_t)timestamp - us_ticker_read());
 189     if (delta <= 0) {
 190         // This event was in the past:
 191         us_ticker_irq_handler();
 192         return;
 193     }
 194
 195     us_ticker_int_counter   = (uint32_t)(delta >> 16);
 196     us_ticker_int_remainder = (uint16_t)(0xFFFF & delta);
 197     if (us_ticker_int_counter > 0) {
 198         lptmr_set(0xFFFF);
 199         us_ticker_int_counter--;
 200     } else {
 201         lptmr_set(us_ticker_int_remainder);
 202         us_ticker_int_remainder = 0;
 203     }
 204 }