keyboard/onekey/config.h

   1 /*
   2 Copyright 2012 Jun Wako <wakojun@gmail.com>
   3
   4 This program is free software: you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation, either version 2 of the License, or
   7 (at your option) any later version.
   8
   9 This program is distributed in the hope that it will be useful,
  10 but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 GNU General Public License for more details.
  13
  14 You should have received a copy of the GNU General Public License
  15 along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18 #ifndef CONFIG_H
  19 #define CONFIG_H
  20
  21
  22 /* USB Device descriptor parameter */
  23 #define VENDOR_ID       0xFEED
  24 #define PRODUCT_ID      0x1111
  25 #define DEVICE_VER      0x0001
  26 #define MANUFACTURER    geekhack
  27 #define PRODUCT         Onekey
  28 #define DESCRIPTION     t.m.k. keyboard firmware for Onekey
  29
  30 /* key matrix size */
  31 #define MATRIX_ROWS 1
  32 #define MATRIX_COLS 1
  33
  34 /* define if matrix has ghost */
  35 //#define MATRIX_HAS_GHOST
  36
  37 /* Set 0 if debouncing isn't needed */
  38 #define DEBOUNCE    5
  39
  40 /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
  41 #define LOCKING_SUPPORT_ENABLE
  42 /* Locking resynchronize hack */
  43 #define LOCKING_RESYNC_ENABLE
  44
  45 /* key combination for command */
  46 #define IS_COMMAND() ( \
  47     keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
  48 )
  49
  50
  51
  52 /*
  53  * Feature disable options
  54  *  These options are also useful to firmware size reduction.
  55  */
  56
  57 /* disable debug print */
  58 //#define NO_DEBUG
  59
  60 /* disable print */
  61 //#define NO_PRINT
  62
  63 /* disable action features */
  64 //#define NO_ACTION_LAYER
  65 //#define NO_ACTION_TAPPING
  66 //#define NO_ACTION_ONESHOT
  67 //#define NO_ACTION_MACRO
  68 //#define NO_ACTION_FUNCTION
  69
  70
  71 /* PS/2 mouse */
  72 #ifdef PS2_USE_BUSYWAIT
  73 #   define PS2_CLOCK_PORT  PORTD
  74 #   define PS2_CLOCK_PIN   PIND
  75 #   define PS2_CLOCK_DDR   DDRD
  76 #   define PS2_CLOCK_BIT   1
  77 #   define PS2_DATA_PORT   PORTD
  78 #   define PS2_DATA_PIN    PIND
  79 #   define PS2_DATA_DDR    DDRD
  80 #   define PS2_DATA_BIT    2
  81 #endif
  82
  83
  84 #ifdef PS2_USE_INT
  85 /* uses INT1 for clock line(ATMega32U4) */
  86 #define PS2_CLOCK_PORT  PORTD
  87 #define PS2_CLOCK_PIN   PIND
  88 #define PS2_CLOCK_DDR   DDRD
  89 #define PS2_CLOCK_BIT   1
  90 #define PS2_DATA_PORT   PORTD
  91 #define PS2_DATA_PIN    PIND
  92 #define PS2_DATA_DDR    DDRD
  93 #define PS2_DATA_BIT    2
  94
  95 #define PS2_INT_INIT()  do {    \
  96     EICRA |= ((1<<ISC11) |      \
  97               (0<<ISC10));      \
  98 } while (0)
  99 #define PS2_INT_ON()  do {      \
 100     EIMSK |= (1<<INT1);         \
 101 } while (0)
 102 #define PS2_INT_OFF() do {      \
 103     EIMSK &= ~(1<<INT1);        \
 104 } while (0)
 105 #define PS2_INT_VECT    INT1_vect
 106 #endif
 107
 108
 109 #ifdef PS2_USE_USART
 110 #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
 111 /* XCK for clock line and RXD for data line */
 112 #define PS2_CLOCK_PORT  PORTD
 113 #define PS2_CLOCK_PIN   PIND
 114 #define PS2_CLOCK_DDR   DDRD
 115 #define PS2_CLOCK_BIT   5
 116 #define PS2_DATA_PORT   PORTD
 117 #define PS2_DATA_PIN    PIND
 118 #define PS2_DATA_DDR    DDRD
 119 #define PS2_DATA_BIT    2
 120
 121 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
 122 /* set DDR of CLOCK as input to be slave */
 123 #define PS2_USART_INIT() do {   \
 124     PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);   \
 125     PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);     \
 126     UCSR1C = ((1 << UMSEL10) |  \
 127               (3 << UPM10)   |  \
 128               (0 << USBS1)   |  \
 129               (3 << UCSZ10)  |  \
 130               (0 << UCPOL1));   \
 131     UCSR1A = 0;                 \
 132     UBRR1H = 0;                 \
 133     UBRR1L = 0;                 \
 134 } while (0)
 135 #define PS2_USART_RX_INT_ON() do {  \
 136     UCSR1B = ((1 << RXCIE1) |       \
 137               (1 << RXEN1));        \
 138 } while (0)
 139 #define PS2_USART_RX_POLL_ON() do { \
 140     UCSR1B = (1 << RXEN1);          \
 141 } while (0)
 142 #define PS2_USART_OFF() do {    \
 143     UCSR1C = 0;                 \
 144     UCSR1B &= ~((1 << RXEN1) |  \
 145                 (1 << TXEN1));  \
 146 } while (0)
 147 #define PS2_USART_RX_READY      (UCSR1A & (1<<RXC1))
 148 #define PS2_USART_RX_DATA       UDR1
 149 #define PS2_USART_ERROR         (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
 150 #define PS2_USART_RX_VECT       USART1_RX_vect
 151 #endif
 152 #endif
 153
 154 #endif