1 mbed patch for Infinity
2 -----------------------
3 Without ld script patch vector table it doesn't place vector table in binary file.
4 And clock setting is changed as Infinity uses internal oscillator instead of exteranl crystal.
6 diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld
7 index 600751c..55c3393 100644
8 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld
9 +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld
10 @@ -43,7 +43,7 @@ SECTIONS
14 - KEEP(*(.vector_table))
15 + KEEP(*(.isr_vector))
16 *(.text.Reset_Handler)
19 diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c
20 index 393d1f0..b78b71a 100644
21 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c
22 +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c
25 #define DISABLE_WDOG 1
27 -#define CLOCK_SETUP 1
28 +#define CLOCK_SETUP 0
29 /* Predefined clock setups
30 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
31 Reference clock source for MCG module is the slow internal clock source 32.768kHz
37 http://developer.mbed.org/users/MACRUM/notebook/mbed-library-internals/
62 ├── InterruptManager.h
89 common/ mbed API implementation
91 hal/ mbed HAL implementation interface
108 targets/hal/TARGET_<vendor>/TARGET_<board>/
109 mbed HAL implementation
111 targets/cmsis/ CMSIS interface
124 targets/cmsis/TARGET_<vendor>/TARGET_<chip>/
130 targets/cmsis/TARGET_<vendor>/TARGET_<chip>/TOOLSCHAIN_<tool>/
138 Massdrop Infinity Keyboard:
139 https://www.massdrop.com/buy/infinity-keyboard-kit
141 Freescale MK20DX128VLF5 48-QFP:
142 http://cache.freescale.com/files/32bit/doc/data_sheet/K20P48M50SF0.pdf
144 kiibohd controller(MD1):
145 https://github.com/kiibohd/controller
148 https://github.com/kiibohd/controller/tree/master/Bootloader
150 Program with bootloader:
151 $ dfu-util -D kiibohd.dfu.bin
154 https://github.com/kiibohd/controller/blob/master/Scan/MD1/pinout
202 PTA19 (LED only for PCB, not McHCK) (XTAL)
216 PTA1 (Not broken out on PCB, available on McHCK) (Pull-up)
235 Freescale kinetis MK20DX128
236 ===========================
237 If FSEC of flash config at 0x400-40F is changed accidentally SWD/JTAG debug access will be lost and very difficult to get back.
238 For example, high level adapter like stlink cannot work to get access back after FSEC is changed. To regain the chip to be programmable low level DAP inteface like JTAG, CMSIS-DAP or OpenSAD.
243 kiibohd bootloader: Lib/mk20dx128vlf5.bootloader.ld
244 0x0000_0000 +-------------------+ -----------------+---------------+
245 | .vectors | ---------. | StackPointer0 |
246 | .startup | \ | ResetHandler1 |
247 | .rodata | \ | ... |
248 0x0000_0400 | .flashconfig | 0x10 \ | ... |
249 | .text | \ | ... 61 | 0xF7
250 | .init | `--+---------------+ 0xF8
251 0x0000_1000 +-------------------+ 4KB
256 0x07FF_FFFF +-------------------+ 128KB
259 0x1FFF_E000 +-------------------+
263 0x2000_0000 +-------------------+
267 0x2000_2000 +-------------------+ _estack
275 Synopsis of SWD, JTAG and SWJ-DP transport:
276 https://fedcsis.org/proceedings/2012/pliks/279.pdf
278 OpenSDA Freescale: Mass storage bootloader & serial port; part of CMSIS-DAP?
279 http://cache.freescale.com/files/32bit/doc/user_guide/OPENSDAUG.pdf
338 http://openocd.sourceforge.net/doc/html/TAP-Declaration.html#TAP-Declaration
339 jtag newtap chipname tapname configparams...
340 hla newtap chipname tapname configparams...
341 swd newtap chipname tapname configparams...
342 cmsis-dap newtap chipname tapname configparams...
344 The tapname reflects the role of that TAP, and should follow this convention:
345 bs – For boundary scan if this is a separate TAP;
346 cpu – The main CPU of the chip, alternatively arm and dsp on chips with both ARM and DSP CPUs, arm1 and arm2 on chips with two ARMs, and so forth;
347 etb – For an embedded trace buffer (example: an ARM ETB11);
348 flash – If the chip has a flash TAP, like the str912;
349 jrc – For JTAG route controller (example: the ICEPick modules on many Texas Instruments chips, like the OMAP3530 on Beagleboards);
350 tap – Should be used only for FPGA- or CPLD-like devices with a single TAP;
351 unknownN – If you have no idea what the TAP is for (N is a number);
352 when in doubt – Use the chip maker's name in their data sheet. For example, the Freescale i.MX31 has a SDMA (Smart DMA) with a JTAG TAP; that TAP should be named sdma.
355 The length in bits of the instruction register, such as 4 or 5 bits.
359 http://openocd.sourceforge.net/doc/html/CPU-Configuration.html#CPU-Configuration
361 target create target_name type configparams...
362 $target_name configure configparams...
364 -chain-position dotted.name – names the TAP used to access this target.
365 -endian (big|little) – specifies whether the CPU uses big or little endian conventions
366 -event event_name event_body – See Target Events. Note that this updates a list of named event handlers. Calling this twice with two different event names assigns two different handlers, but calling it twice with the same event name assigns only one handler.
367 -work-area-backup (0|1) – says whether the work area gets backed up; by default, it is not backed up. When possible, use a working_area that doesn't need to be backed up, since performing a backup slows down operations. For example, the beginning of an SRAM block is likely to be used by most build systems, but the end is often unused.
368 -work-area-size size – specify work are size, in bytes. The same size applies regardless of whether its physical or virtual address is being used.
369 -work-area-phys address – set the work area base address to be used when no MMU is active.
370 -work-area-virt address – set the work area base address to be used when an MMU is active. Do not specify a value for this except on targets with an MMU. The value should normally correspond to a static mapping for the -work-area-phys address, set up by the current operating system.
371 -rtos rtos_type – enable rtos support for target, rtos_type can be one of auto|eCos|ThreadX| FreeRTOS|linux|ChibiOS|embKernel See RTOS Support.
375 http://openocd.sourceforge.net/doc/html/Flash-Commands.html#norconfiguration
377 flash bank name driver base size chip_width bus_width target [driver_options]
379 name ... may be used to reference the flash bank in other flash commands. A number is also available.
380 driver ... identifies the controller driver associated with the flash bank being declared. This is usually cfi for external flash, or else the name of a microcontroller with embedded flash memory. See Flash Driver List.
381 base ... Base address of the flash chip.
382 size ... Size of the chip, in bytes. For some drivers, this value is detected from the hardware.
383 chip_width ... Width of the flash chip, in bytes; ignored for most microcontroller drivers.
384 bus_width ... Width of the data bus used to access the chip, in bytes; ignored for most microcontroller drivers.
385 target ... Names the target used to issue commands to the flash controller.
386 driver_options ... drivers may support, or require, additional parameters. See the driver-specific documentation for more information.
388 flash write_image [erase] [unlock] filename [offset] [type]
393 http://openocd.sourceforge.net/doc/html/General-Commands.html#imageaccess
394 {mdw,mdh,mdb} addr [count]
395 dump {word, half-word, byte} data
396 {mww,mwh,mwb} addr data