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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/ieb_iodefine.h
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13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : ieb_iodefine.h
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef IEB_IODEFINE_H
30 #define IEB_IODEFINE_H
31 /* ->SEC M1.10.1 : Not magic number */
35 volatile uint8_t B0BCR
; /* B0BCR */
36 volatile uint8_t dummy495
[3]; /* */
37 volatile uint8_t B0PSR
; /* B0PSR */
38 volatile uint8_t dummy496
[3]; /* */
39 volatile uint16_t B0UAR
; /* B0UAR */
40 volatile uint8_t dummy497
[2]; /* */
41 volatile uint16_t B0SAR
; /* B0SAR */
42 volatile uint8_t dummy498
[2]; /* */
43 volatile uint16_t B0PAR
; /* B0PAR */
44 volatile uint8_t dummy499
[2]; /* */
45 volatile uint16_t B0RSA
; /* B0RSA */
46 volatile uint8_t dummy500
[2]; /* */
47 volatile uint8_t B0CDR
; /* B0CDR */
48 volatile uint8_t dummy501
[3]; /* */
49 volatile uint8_t B0TCD
; /* B0TCD */
50 volatile uint8_t dummy502
[3]; /* */
51 volatile uint8_t B0RCD
; /* B0RCD */
52 volatile uint8_t dummy503
[3]; /* */
53 volatile uint8_t B0DLR
; /* B0DLR */
54 volatile uint8_t dummy504
[3]; /* */
55 volatile uint8_t B0TDL
; /* B0TDL */
56 volatile uint8_t dummy505
[3]; /* */
57 volatile uint8_t B0RDL
; /* B0RDL */
58 volatile uint8_t dummy506
[3]; /* */
59 volatile uint8_t B0CKS
; /* B0CKS */
60 volatile uint8_t dummy507
[3]; /* */
61 volatile uint8_t B0TMS
; /* B0TMS */
62 volatile uint8_t dummy508
[3]; /* */
63 volatile uint8_t B0PCR
; /* B0PCR */
64 volatile uint8_t dummy509
[3]; /* */
65 volatile uint16_t B0BSR
; /* B0BSR */
66 volatile uint8_t dummy510
[2]; /* */
67 volatile uint8_t B0SSR
; /* B0SSR */
68 volatile uint8_t dummy511
[3]; /* */
69 volatile uint8_t B0USR
; /* B0USR */
70 volatile uint8_t dummy512
[3]; /* */
71 volatile uint8_t B0ISR
; /* B0ISR */
72 volatile uint8_t dummy513
[3]; /* */
73 volatile uint8_t B0ESR
; /* B0ESR */
74 volatile uint8_t dummy514
[3]; /* */
75 volatile uint8_t B0FSR
; /* B0FSR */
76 volatile uint8_t dummy515
[3]; /* */
77 volatile uint8_t B0SCR
; /* B0SCR */
78 volatile uint8_t dummy516
[3]; /* */
79 volatile uint8_t B0CCR
; /* B0CCR */
80 volatile uint8_t dummy517
[3]; /* */
81 volatile uint8_t B0STC0
; /* B0STC0 */
82 volatile uint8_t dummy518
[3]; /* */
83 volatile uint8_t B0STC1
; /* B0STC1 */
84 volatile uint8_t dummy519
[3]; /* */
85 volatile uint8_t B0DR
; /* B0DR */
89 #define IEB (*(struct st_ieb *)0xFCFEF000uL) /* IEB */
92 #define IEBB0BCR IEB.B0BCR
93 #define IEBB0PSR IEB.B0PSR
94 #define IEBB0UAR IEB.B0UAR
95 #define IEBB0SAR IEB.B0SAR
96 #define IEBB0PAR IEB.B0PAR
97 #define IEBB0RSA IEB.B0RSA
98 #define IEBB0CDR IEB.B0CDR
99 #define IEBB0TCD IEB.B0TCD
100 #define IEBB0RCD IEB.B0RCD
101 #define IEBB0DLR IEB.B0DLR
102 #define IEBB0TDL IEB.B0TDL
103 #define IEBB0RDL IEB.B0RDL
104 #define IEBB0CKS IEB.B0CKS
105 #define IEBB0TMS IEB.B0TMS
106 #define IEBB0PCR IEB.B0PCR
107 #define IEBB0BSR IEB.B0BSR
108 #define IEBB0SSR IEB.B0SSR
109 #define IEBB0USR IEB.B0USR
110 #define IEBB0ISR IEB.B0ISR
111 #define IEBB0ESR IEB.B0ESR
112 #define IEBB0FSR IEB.B0FSR
113 #define IEBB0SCR IEB.B0SCR
114 #define IEBB0CCR IEB.B0CCR
115 #define IEBB0STC0 IEB.B0STC0
116 #define IEBB0STC1 IEB.B0STC1
117 #define IEBB0DR IEB.B0DR