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New keymap of PC98
[tmk_keyboard.git] / converter / pc98_usb / config.h
1 /*
2 Copyright 2012 Jun Wako <wakojun@gmail.com>
3
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #ifndef CONFIG_H
19 #define CONFIG_H
20
21 #define VENDOR_ID 0xFEED
22 #define PRODUCT_ID 0x9898
23 #define DEVICE_VER 0x0100
24 #define MANUFACTURER t.m.k.
25 #define PRODUCT PC98 keyboard converter
26 #define DESCRIPTION converts PC98 keyboard protocol into USB
27
28
29 /* matrix size */
30 #define MATRIX_ROWS 16
31 #define MATRIX_COLS 8
32
33 /* To use new keymap framework */
34 #define USE_KEYMAP_V2
35
36 /* key combination for command */
37 #define IS_COMMAND() ( \
38 host_get_first_key() == KC_CANCEL \
39 )
40
41
42 /* PC98 Serial(USART) configuration
43 * asynchronous, positive logic, 19200baud, bit order: LSB first
44 * 1-start bit, 8-data bit, odd parity, 1-stop bit
45 */
46 #define SERIAL_BAUD 19200
47 #define SERIAL_PARITY_ODD
48 #define SERIAL_BIT_ORDER_LSB
49 #define SERIAL_LOGIC_POSITIVE
50
51 /* PC98 Reset Port shared with TXD */
52 #define PC98_RST_DDR DDRD
53 #define PC98_RST_PORT PORTD
54 #define PC98_RST_BIT 3
55 /* PC98 Ready Port */
56 #define PC98_RDY_DDR DDRD
57 #define PC98_RDY_PORT PORTD
58 #define PC98_RDY_BIT 4
59 /* PC98 Retry Port */
60 #define PC98_RTY_DDR DDRD
61 #define PC98_RTY_PORT PORTD
62 #define PC98_RTY_BIT 5
63
64 /* RXD Port */
65 #define SERIAL_RXD_DDR DDRD
66 #define SERIAL_RXD_PORT PORTD
67 #define SERIAL_RXD_PIN PIND
68 #define SERIAL_RXD_BIT 2
69 #ifdef SERIAL_LOGIC_NEGATIVE
70 #define SERIAL_RXD_READ() ~(SERIAL_RXD_PIN&(1<<SERIAL_RXD_BIT))
71 #else
72 #define SERIAL_RXD_READ() (SERIAL_RXD_PIN&(1<<SERIAL_RXD_BIT))
73 #endif
74 /* RXD Interupt */
75 #define SERIAL_RXD_VECT INT2_vect
76 #define SERIAL_RXD_INIT() do { \
77 /* pin configuration: input with pull-up */ \
78 SERIAL_RXD_DDR &= ~(1<<SERIAL_RXD_BIT); \
79 SERIAL_RXD_PORT |= (1<<SERIAL_RXD_BIT); \
80 /* enable interrupt: INT2(falling edge) */ \
81 EICRA |= ((1<<ISC21)|(0<<ISC20)); \
82 EIMSK |= (1<<INT2); \
83 sei(); \
84 } while (0)
85 #define SERIAL_RXD_INT_ENTER()
86 #define SERIAL_RXD_INT_EXIT() do { \
87 /* clear interrupt flag */ \
88 EIFR = (1<<INTF2); \
89 } while (0)
90
91 /* TXD Port */
92 #define SERIAL_TXD_DDR DDRD
93 #define SERIAL_TXD_PORT PORTD
94 #define SERIAL_TXD_PIN PIND
95 #define SERIAL_TXD_BIT 3
96 #ifdef SERIAL_LOGIC_NEGATIVE
97 #define SERIAL_TXD_ON() do { SERIAL_TXD_PORT &= ~(1<<SERIAL_TXD_BIT); } while (0)
98 #define SERIAL_TXD_OFF() do { SERIAL_TXD_PORT |= (1<<SERIAL_TXD_BIT); } while (0)
99 #else
100 #define SERIAL_TXD_ON() do { SERIAL_TXD_PORT |= (1<<SERIAL_TXD_BIT); } while (0)
101 #define SERIAL_TXD_OFF() do { SERIAL_TXD_PORT &= ~(1<<SERIAL_TXD_BIT); } while (0)
102 #endif
103 #define SERIAL_TXD_INIT() do { \
104 /* pin configuration: output */ \
105 SERIAL_TXD_DDR |= (1<<SERIAL_TXD_BIT); \
106 /* idle */ \
107 SERIAL_TXD_ON(); \
108 } while (0)
109
110 #endif
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